Sandeep Gangadharaiah
|
b5383dbae3
disp: msm: dp: add pll params table for 4nm PHY pll settings
|
3 年之前 |
Soutrik Mukhopadhyay
|
bbc87c5dde
disp: msm: dp: add support for 4nm DP PLL
|
3 年之前 |
Sudarsan Ramesh
|
e66a2089f4
disp: msm: dp: update pll driver to fix clock names per target
|
4 年之前 |
Tatenda Chipeperekwa
|
37412f5add
disp: msm: dp: add support for PLL programming
|
5 年之前 |