Gráfico de commits

263 Commits

Autor SHA1 Mensagem Data
GG Hou
e29493c71d disp: msm: avoid using #ifdef for configurations
Use #if IS_ENABLED() instead of #ifdef for configurations as vendor module
guidelines.

Use #if IS_ENABLED(CONFIG_XXX) instead of #ifdef CONFIG_XXX to ensure that
the code inside the #if block continues to compile if the config changes
to a tristate config in the future.

The differences are as follows:
	1.#if IS_ENABLED(CONFIG_XXX) evaluates to true when CONFIG_XXX is set to
		module (=m) or built-in (=y).
	2.#ifdef CONFIG_XXX evaluates to true when CONFIG_XXX is set to
		built-in(=y) , but doesn't when CONFIG_XXX is set to module(=m).
		Use this only when you're certain you want to do the same thing
		when the config is set to module or is disabled.

Change-Id: Ia806b9b01ad8414d0e4de027a382cb68e7fb4a6a
Signed-off-by: GG Hou <quic_renjhou@quicinc.com>
2022-01-17 10:10:04 +08:00
qctecmdr
355017e478 Merge "disp: msm: sde/dsi: reduce display cyclomatic complexity" 2022-01-10 20:44:01 -08:00
qctecmdr
27a32126fe Merge "display: driver: default post start if SBLUA DMA exist" 2022-01-10 20:09:09 -08:00
GG Hou
644927312e disp: msm: sde/dsi: reduce display cyclomatic complexity
msm/sde/sde_encoder.c
	_sde_encoder_update_rsc_client()
	sde_encoder_prepare_for_kickoff()

msm/dsi/dsi_drm.c
	dsi_bridge_mode_fixup()

Lower the cyclomatic complexity for this function by splitting
the work into helper functions.

Change-Id: I2285809a33078e29989a6b44800c18342aa24170
Signed-off-by: GG Hou <quic_renjhou@quicinc.com>
2022-01-10 19:05:50 -08:00
Veera Sundaram Sankaran
56862f8118 disp: msm: use pm_runtime_resume_and_get instead of pm_runtime_get_sync
pm_runtime_get_sync increases the usage_count refcount immaterial of
success/failure of the call, leading to invalid refcount on failures.
Use pm_runtime_resume_and_get instead, which takes care of reducing the
refcount on failure cases before returning from the function.

Change-Id: Ib96050d5d7ecbd717e58b8a0dde2d03312444e15
Signed-off-by: Veera Sundaram Sankaran <quic_veeras@quicinc.com>
2022-01-05 17:28:41 -08:00
GG Hou
4d5ae8084e display: driver: default post start if SBLUA DMA exist
Keep posted start as default configuration in driver
if SBLUT is supported on target.
Do not allow HAL to override driver's default frame trigger mode.

Change-Id: I46ad5c87abfb05446592b0e497a23a3a3fc62ca7
Signed-off-by: GG Hou <quic_renjhou@quicinc.com>
2021-12-14 22:58:29 -08:00
Jeykumar Sankaran
cf39b00660 Merge branch 'display-kernel.lnx.5.10' into display-kernel.lnx.1.0
Change-Id: I5d2b08380b6b0eb09492b950fb38cd9a0b3196c1
2021-12-08 12:37:35 -08:00
Jeykumar Sankaran
fe83c42f56 disp: msm: sde: add support for mdp vsync timestamp
MDSS.9.0 adds support for mdp vsync based HW timestamps
on top the existing support for panel vsync based timestamps.

This allows us to enable vsync timestamp calculations for all the
use cases including a few corner cases (e.g. programmable fetch)
which we couldn't support with the existing HW.

This change adds the new HW register support and modifies the
timestamp read logic to use mdp vsync on supporting targets.

Change-Id: I2cb1b56ca9154174331c4fc1d8f82319b6989247
Signed-off-by: Michael Ru <mru@codeaurora.org>
Signed-off-by: Jeykumar Sankaran <quic_jeykumar@quicinc.com>
2021-12-06 11:06:41 -08:00
Jeykumar Sankaran
39e7775bff disp: msm: sde: add support for CTL done irq
From Kalama, the HW scheduler abstracts the low level
PP_DONE/WB_DONE interrupts and generates a common
CTL_DONE interrupt per hw ctl. This saves the software
the irq latency delays to process the frame complete
operations when multiple encoders are involved.

If supported, this change enables and waits for the
CTL_DONE interrupt instead of PP_DONE and WB_DONE.

This change adds support to wait for CTL_DONE irq in
only command mode panels as we don't drive two WB blocks
with single CTL.

Change-Id: I084d6bfb6a9fb0b48f912fe5787401c460ec5b56
Signed-off-by: Jeykumar Sankaran <quic_jeykumar@quicinc.com>
2021-12-06 11:03:22 -08:00
Veera Sundaram Sankaran
3cebf0853a disp: msm: sde: add idle power collapse support for writeback
Extend idle power-collapse support for writeback.

Change-Id: I9b85f367dc7489c1e3c927cbd6040be8b879057e
Signed-off-by: Veera Sundaram Sankaran <veeras@codeaurora.org>
2021-12-01 15:11:16 -08:00
Veera Sundaram Sankaran
88c9a184f9 disp: msm: sde: use dnsc_blur src w/h for calculating crtc/lm w/h
When downscale blur feature is enabled, calculate the mixex and crtc
width and height using the dnsc_blur's src width & height. Update the
sde_crtc_get_mixer width/height functions to return the correct size
based on the features enabled.

Change-Id: I52dd88cc52e1ca5cb37e381e92e0e3032e7b090f
Signed-off-by: Veera Sundaram Sankaran <veeras@codeaurora.org>
2021-12-01 15:11:16 -08:00
Veera Sundaram Sankaran
cc23729c87 disp: msm: sde: configure the dnsc_blur hw block
Add changes to configure the downscale blur hardware block based on
the conifgs set by user-mode. Program the ctl's writeback flush and
active bits when dnsc_blur is enabled. Bind the pingpong block that
feeds pixels to dnsc_blur hw block. Disable the active bits and unbind
the pp block binding during wb disable.

Change-Id: I1961ab437e344b13d0c186c1675a5bf79b84ea74
Signed-off-by: Veera Sundaram Sankaran <veeras@codeaurora.org>
2021-12-01 15:11:16 -08:00
Veera Sundaram Sankaran
76e7c6acd3 disp: msm: sde: use crtc_width instead of hdisplay for crtc/lm
The interface resolution can be different from crtc/layer-mixer WxH
when certain features like destination scaler are enabled. Use the
sde_crtc_get_width/sde_crtc_get_mixer_width functions throughout
to get the correct crtc/lm size based on different features enabled.
This will help in validating/configuring lm & plane correctly.

Change-Id: I45de5844bf7465a3389cf723479c5449a835fb0a
Signed-off-by: Veera Sundaram Sankaran <veeras@codeaurora.org>
2021-11-17 14:56:19 -08:00
Veera Sundaram Sankaran
0cf7ba9a4a disp: msm: sde: add all frame-trigger modes support for writeback
Currently, writeback frame-triggers are serialized by default. Add
logic to support the different frame-trigger modes which can be set
through the connector property or encoder debugfs node.

- default: waits for frame(N-1) completion (wb-done-irq) before
  configuring current frame(N) and releases the commit-thread on
  frame-start (ctl-start-irq)
- posted-start: no previous frame(N-1) completion wait. Configures
  frame(N) and releases the commit-thread on frame-start (ctl-start-irq)
- serialize: no previous frame(N-1) completion wait. Configures frame(N)
  and releases the commit-thread on frame(N) completion (wb-done-irq)
  (wb-done-irq) before configuring the next frame.

Restrict wb posted-start support only for MDSS 9.x+ targets, with older
targets defaulted to default-mode.

Change-Id: Id441378fd79ecbfcfb820da1ff23b14ccfd8e798
Signed-off-by: Veera Sundaram Sankaran <veeras@codeaurora.org>
2021-11-17 14:54:41 -08:00
Veera Sundaram Sankaran
30d5ac5184 disp: msm: sde: remove vblank support for writeback
Avoid drm vblank on/off for virtual displays to allow drm framework to
ignore the vblank requests. Vblanks are unnecessary for writeback as it
is triggered based on the frame-updates and not on any defined interval.
In addition, avoid vblank callback registration for concurrent writeback
encoder.

Change-Id: I205734e2e3076469dc7f775566cf5e104bac4082
Signed-off-by: Veera Sundaram Sankaran <veeras@codeaurora.org>
2021-11-17 14:54:18 -08:00
Steve Cohen
d9794d82cd disp: msm: sde: remove sde_hw_blk
The sde_hw_blk was meant to be a generic base object for all
SDE HW blocks, however, it enforces using a common set of ops
which is not practical when blocks have different capabilities.
Since this object was never used as intended and is not doing
anything functional today, remove the dead weight.

Change-Id: If76006c1ae5c62e8d7d77b100837dbaf6c661bd3
Signed-off-by: Steve Cohen <quic_cohens@quicinc.com>
2021-10-26 11:34:59 -07:00
Steve Cohen
7f0c843da4 disp: msm: sde: move boolean flags in catalog to a bitmap
Move all the individual boolean flags from HW catalog into a
"features" bitmap. These flags are used to specify support of
various target specific features.

Change-Id: I2334b3b873f3737f91bbae4ef576408247710156
Signed-off-by: Steve Cohen <quic_cohens@quicinc.com>
2021-10-26 11:21:33 -07:00
Prabhanjan Kandula
35f07ca601 disp: msm: fix rsc static wakeup time calculation
Currently RSC timer register programming is optimized for updating
only during timing param changes and not during RSC state changes
with same timing. Static wakeup time computation should consider
panel jitter for RSC clk state too, else it can result in RSC hang.
This change also removes extra logic for video mode prefil lines
computation for rsc config as video mode does not enable RSC solver.

Current issue scenario exposing the hang is in dual dsi display scenario
where RSC is in clock state and static wakeup time is programmed by
not considering panel jitter, after suspend/pmsuspend while waking up
if RSC switches to command state if primary enabled first and vsync
may arrive much early based on the panel jitter. RSC hw can not handle
if TE arrives earlier than static wakeup time causing RSC hang.

Change-Id: I1434fdd71eb04fdbe22b3601500493c818e9126d
Signed-off-by: Prabhanjan Kandula <pkandula@codeaurora.org>
2021-10-22 10:55:26 -07:00
Dhaval Patel
daa4273e02 disp: msm: sde: disable vsync_in to update tear check
Commit b67da33a6307 ("trigger tx_wait if panel
resolution switch") increases the mode switch latency.
Alternatively, single buffer tear check registers can be
updated when vsync_in is disabled. It allows mode switch
frame trigger as posted start frame trigger.

Change-Id: I8068736b2ea01f6e4160e765fc39d7fc2a8590c9
Signed-off-by: Dhaval Patel <pdhaval@codeaurora.org>
2021-10-08 13:29:45 -07:00
qctecmdr
fba8cf7c57 Merge "disp: msm: sde: reset dsc mux config in encoder disable" 2021-10-07 21:23:56 -07:00
Prabhanjan Kandula
9e988121fc disp: msm: sde: reset dsc mux config in encoder disable
During display encoder disable, reset the dsc control
mux configuration during null commit to ensure dsc hw
blocks are cleanly freed up.

Change-Id: I02e2f074450e4d7b49dc8fec14777f380786c63e
Signed-off-by: Prabhanjan Kandula <pkandula@codeaurora.org>
2021-10-07 00:09:06 -07:00
Dhaval Patel
b696aa3b24 disp: msm: sde: trigger tx_wait if panel resolution switch
Trigger tx_wait if command mode panel resolution
switches during mode switch to avoid early single buffer
tear check programming.

Change-Id: Ib747df8250c714248a44b596c2c8aeef006ea4fc
Signed-off-by: Dhaval Patel <pdhaval@codeaurora.org>
2021-10-04 13:16:00 -07:00
Nilaan Gunabalachandran
711eabbf43 disp: msm: sde: account for pref lm when exposing avail resources
If an external display, such as DP, requests for the available
resources, resource manager (RM) will provide a count of all unused
mixers. If the primary/secondary display(s) are not active, the RM
will report the associated preferred mixers as free resources.
However, RM will not allow preferred mixers to be allocated to other
displays. DP driver could look at these available resources and assume
a high resolution mode is possible and fail during resource allocation.

This change updates the available resources info API to account for
primary/secondary preferences while exposing available resources.

Change-Id: I134a1047f24ac9f1fcee695aa14a1d3e43c1571f
Signed-off-by: Nilaan Gunabalachandran <ngunabal@codeaurora.org>
2021-09-27 12:13:37 -04:00
Dhaval Patel
fc2226ea25 disp: msm: reset lm blend stages for missing vsync
MDSS INTF HW block does not generate vsync if controller
turns off the link clock prematurely. This leads to
frame trigger timeout and SDE driver triggers the retire
fence after 84ms to recover gracefully. A client may switch
source pipe from one CTL path to another CTL path based
on delayed retire fence. It can lead to other ctl path
hang. This can be resolved by resetting the lm blend
stages for each missing vsync frame trigger.

Change-Id: I5a6ed03afbdad83d8fd6decc593d39e04bef62e4
Signed-off-by: Dhaval Patel <pdhaval@codeaurora.org>
2021-09-22 09:46:32 -07:00
Nilaan Gunabalachandran
95a41081eb disp: msm: sde: clear intf mux select on slave encoders
When disabling an encoder with multiple physical encoders, the
intf mux must be cleared on all interfaces. Currently only the master
physical encoder is being cleared, leading to possible DSI
underflow errors. This change ensures that the mux is cleared
on all interface blocks.

Change-Id: Idb1b96fd65545e3599100e70ace22bc3837d7233
Signed-off-by: Nilaan Gunabalachandran <ngunabal@codeaurora.org>
2021-09-17 17:11:19 -04:00
Yashwanth
6619470eb6 disp: msm: dsi: add qsync min fps val in dsi display mode priv info
In the current code for finding the qsync min fps for a
mode, entire mode list is iterated which involves acquiring
dsi display_lock. During conn tx debugfs commands, if
qsync min fps is required, we try to acquire dsi
display_lock twice which results in hang state. This change
adds qsync min fps value in dsi_display_mode_priv_info
struct in order to get the qsync fps from the
msm_display_mode present in connector state instead of
looping through all the modes to find the mode qsync fps.

Change-Id: Ifded40d1f12462bb50fc7bdafb746ae5b8d9512a
Signed-off-by: Yashwanth <yvulapu@codeaurora.org>
2021-09-15 12:09:35 +05:30
qctecmdr
bb36f9fd40 Merge "disp: msm: sde: add helper to check VM hw availability" 2021-08-18 16:48:48 -07:00
qctecmdr
88877f3037 Merge "disp: msm: sde: add sde data to va minidumps" 2021-08-15 18:31:12 -07:00
qctecmdr
4ec64c1672 Merge "disp: msm: sde: compute timeouts based on refresh rate" 2021-08-13 20:50:46 -07:00
Steve Cohen
7f3b2f0a4b disp: msm: sde: add helper to check VM hw availability
Add a utility function to check if HW has been handed over to
another VM.

Change-Id: Ic36ca1e7f15f7608e69d69fc3f4e7ad40be15704
Signed-off-by: Steve Cohen <cohens@codeaurora.org>
2021-08-12 22:58:30 -04:00
qctecmdr
7ec82f88a8 Merge "disp: msm: add qsync refresh rate support per mode" 2021-08-12 14:10:43 -07:00
Steve Cohen
9690b545df disp: msm: sde: prevent custom ioctls from accessing unowned HW
Early wakeup ioctls from perf HAL driver can access display HW
registers and come as a sideband to atomic commits. Since the
atomic validate checks are not part of this code path it's
possible for HW access to occur during a trusted UI session.
Prevent this whenever the HW is not under this VM's ownership.
Also, move the VM ownership check for the register/deregister
event ioctl to cover both the CRTC and connector events since
new connector events are being added which can access HW.

Change-Id: I39660ae60e7e8f8a405e819c43ec42fbac3f492a
Signed-off-by: Steve Cohen <cohens@codeaurora.org>
2021-08-11 15:38:27 -04:00
Prabhanjan Kandula
642c86fee9 disp: msm: sde: compute timeouts based on refresh rate
Current timeout values in sde driver for vblank, kickoff and
frame complete timeouts are fixed and can be much lower than
a vsync incase of low refresh rate display. Compute timeouts
based on refresh rate for low refresh rate displays.

Change-Id: I9dda41feb15446de7451824e185321de421ad575
Signed-off-by: Prabhanjan Kandula <pkandula@codeaurora.org>
2021-08-10 14:51:41 -07:00
Lei Chen
b151e6660b disp: msm: sde: remove clearing cur_master in encoder enable function
SDE IRQ callback can run in parallel thread to modeset after removing
pp_done wait before pre_modeset.
If cur_master is cleared in encoder enable function and irq callback
is triggered at the same time, the irq callback could not be handled
properly as cur_master is NULL.
So remove clearing cur_master in encoder enable function to avoid the
race condition between modeset and irq callback.

Change-Id: I2059c699a68838b3c9f6a7dd658a35f178b18c42
Signed-off-by: Lei Chen <chenlei@codeaurora.org>
2021-08-09 10:58:38 +08:00
Yashwanth
64b732f335 disp: msm: add qsync refresh rate support per mode
This change adds support for qsync min refresh rate per
timing mode and populates qsync min refresh rate based
on the current fps when qsync is enabled.

Change-Id: I191d1d72e95dd065c8c0b56a6100104c00c6d8f6
Signed-off-by: Yashwanth <yvulapu@codeaurora.org>
2021-08-05 15:37:20 +05:30
Andhavarapu Karthik
76d171e611 disp: msm: sde: add sde data to va minidumps
VA minidumps supports to add any allocated variable or data to
minidumps. Add panic notifier and wrapper function to add
sde data to minidump va. Add event log, register log, register dumps,
debug bus and different sde variables and states info to minidump.

Change-Id: If54da0b7067df17877e4da645d82f1705baa3f6d
Signed-off-by: Andhavarapu Karthik <kartkart@codeaurora.org>
2021-07-19 16:00:57 +05:30
Steve Cohen
a42fd877c7 disp: msm: sde: cancel delayed work items during TUI transition
Delayed work items may touch HW registers. If these work items
run while HW is not owned by this VM it will lead to invalid
access. This happens in video mode as HAL does not disable idle
power-collapse in this mode. It can also happen with ESD status
if lastclose or TUI transition failure occurs.

Although there is a contract with user mode to turn off certain
features, kernel cannot rely on it to always do the right thing.
Prevent potential crashes from certain corner cases by
cancelling all delayed work items when the HW ownership is
transferred.

Change-Id: I08da17f2ce72bf2fddf71924c3e8edd2e2715be8
Signed-off-by: Steve Cohen <cohens@codeaurora.org>
2021-07-16 20:45:42 -04:00
Jayaprakash Madisetty
436efb403c disp: msm: sde: modify in_clone_mode after wb_reset is done
Add changes to modify the phys_enc->in_clone_mode variable
post wb_reset_state since this is a shared variable used
during atomic_check and atomic_commit. In current issue case,
wb_atomic_check has set in_clone_mode to true in commit N,
and in commit N-1 CWB is being disabled and re-sets the
in_clone_mode variable to false causing pp_done timeouts in
primary in commit N.

Change-Id: I8159bbdb5622a351d76bdc4dba75d48df20f4365
Signed-off-by: Jayaprakash Madisetty <jmadiset@codeaurora.org>
Signed-off-by: Samantha Tran <samtran@codeaurora.org>
2021-07-14 13:43:21 -07:00
Lei Chen
79d30e7fba drm/msm/sde: add check to fix null pointer dereference
Check if sde_enc->crtc exists before using the variable
to avoid possible NULL dereferences.

Change-Id: If7b56c3b3ad3525b3efc22b6536a2dc5c865da48
Signed-off-by: Lei Chen <chenlei@codeaurora.org>
2021-07-07 23:04:45 -07:00
Lei Chen
be82344413 disp: msm: sde: remove unused variable topology from sde_encoder
Topology in sde_encoder is no longer used, so remove this
variable from sde_encoder.

Change-Id: Iba02ae690d81d39252d0df83882a72e35f2916ec
Signed-off-by: Lei Chen <chenlei@codeaurora.org>
2021-06-29 14:17:59 +08:00
qctecmdr
4f79a6ceef Merge "disp: msm: sde: cancel delayed_off_work before reinitialization" 2021-06-09 10:00:48 -07:00
Lei Chen
9d4d003e30 disp: msm: sde: cancel delayed_off_work before reinitialization
Canceling delayed_off_work in encoder pre_modeset might not be
executed in all cases, but the following encoder enable might
initialize the work.
This will lead to list corruption as delayed_off work list node
is reinitialized before removing from linked list.
Move canceling delayed_off_work to start of encoder mode_set to
ensure work is canceled before reinitialization.

Change-Id: I38687604f2eedced308ea02019c162022725534e
Signed-off-by: Lei Chen <chenlei@codeaurora.org>
2021-06-07 17:03:31 +08:00
qctecmdr
97b1db8547 Merge "disp: msm: sde: set watchdog TE when panel fails ESD check" 2021-06-04 13:29:20 -07:00
Samantha Tran
11f2efbe16 disp: msm: sde: set watchdog TE when panel fails ESD check
In the event of panel dead scenario, it is possible to receive a
mode set call before the panel has recovered. When this happens,
display should select watchdog TE as the vsync source.

Similarly when detecting a write pointer timeout, if the panel is
dead then watchdog TE should be or has already been configured and
display should not make a change to this vsync selection.

Change-Id: I732c75e54d734b00889151b914b0749ae1f27d08
Signed-off-by: Samantha Tran <samtran@codeaurora.org>
2021-06-04 09:59:44 -07:00
qctecmdr
028a432785 Merge "disp: msm: sde: update perf cpu dma latency votes on idle in video mode" 2021-06-04 09:24:46 -07:00
qctecmdr
ce2c7ef6f3 Merge "disp: msm: sde: disable RSC solver mode during HFR cases" 2021-06-02 15:18:00 -07:00
qctecmdr
8bbc6f2698 Merge "disp: msm: sde: flush commit thread queue during pm suspend" 2021-06-01 20:21:34 -07:00
Andhavarapu Karthik
5df7014990 disp: msm: sde: update perf cpu dma latency votes on idle in video mode
In video mode for fps greater than 60, perf cpu dma latency votes
are not removed during idle fallback. Made changes to remove and
add the perf cpu dma latency votes during idle fallback and idle
exit scenarios respectively.

Change-Id: I8dffc743bd48c96a6022935f71057a0223d9696e
Signed-off-by: Andhavarapu Karthik <kartkart@codeaurora.org>
2021-06-01 17:19:16 -07:00
Dhaval Patel
cfa81fdcaf disp: msm: sde: fix uidle disable configuration
Fix uidle disable setting when panel fps is beyond supported
FAL1 and FAL10 limit.

Change-Id: If76f1789f5f2677e503375234e8d4029c455d455
Signed-off-by: Dhaval Patel <pdhaval@codeaurora.org>
2021-05-27 12:27:03 -07:00
Samantha Tran
f5a91ba3b3 disp: msm: sde: pass disp info to setup vsync source
While setting up vsync source, display info is used to decide whether
or not watchdog TE should be used. This change passes display info
as a parameter to vsync setup rather than using the encoder's display
info which is not updated in the case of panel dead error.

Change-Id: I928ee2012eec7bf63f4ba3538082bc3e47d5e99d
Signed-off-by: Samantha Tran <samtran@codeaurora.org>
2021-05-24 16:24:39 -07:00