Gráfico de commits

8 Commits

Autor SHA1 Mensaje Fecha
Pavankumar Nandeshwar
4db1255f94 qcacmn: Add debug for Umac reset time consumption
Add debug to calculate the time consumed on host during
Umac reset handling.

Change-Id: I1697f61abf13980182a89ae0674f344f93943b86
CRs-Fixed: 3300163
2022-09-30 01:41:05 -07:00
Shiva Krishna Pittala
8641a158f3 qcacmn: Hook the UMAC reset in the target attach path
Call UMAC reset initialization API from soc_attach_target().
FW exposes a service bit for this feature, use that to conditionally
enable this feature. Also, add default log levels for this feature.

CRs-Fixed: 3253464
Change-Id: Ia7c9cf07a7ab7b000ebe452ab074a82173b70129
2022-08-03 07:35:26 -07:00
Shiva Krishna Pittala
68c2b67520 qcacmn: Add support to populate and send UMAC reset setup command
UMAC reset prerequisite setup command contains the following information.
- Interrupt number to be used for raising the UMAC reset interrupt
- Address of the shared memory
This is an HTT command. Send this command as part of the UMAC reset
initialization sequence.

Change-Id: I7a08f48b420580b5e3dbb9b46f6605d986f8fd89
CRs-Fixed: 3244930
2022-07-21 16:09:51 -07:00
Shiva Krishna Pittala
12964fb1de qcacmn: Add Host to target communication for UMAC HW reset
UMAC HW reset is expected to send the following Tx commands to the target.
- PRE_RESET_DONE
- POST_RESET_START_DONE
- POST_RESET_COMPLETE_DONE

Add the necessary logic for the same.

Change-Id: I2450ed9281691abcc064661d4481ae78f48a0f3d
CRs-Fixed: 3244895
2022-07-21 16:09:44 -07:00
Shiva Krishna Pittala
8ebf77e3aa qcacmn: Add UMAC HW reset event handler
UMAC HW reset is expected to receive the following 3 events from FW.
- DO_PRE_RESET
- DO_POST_RESET_START
- DO_POST_RESET_COMPLETE
Add necessary logic to handle these events.

Change-Id: I786ecf6ed2925fd7fcc0934fdce65c76784f4f67
CRs-Fixed: 3244865
2022-07-21 14:27:54 -07:00
Shiva Krishna Pittala
053f59e4f0 qcacmn: Interrupt handling changes for UMAC HW reset interrupt
Create a HIF context for UMAC reset handler, register the datapath UMAC HW
reset callback handler with HIF layer, request for UMAC HW reset interrupt,
and schedule a high priority tasklet to process the interrupt in which
call the registered DP callback handler.

CRs-Fixed: 3184312
Change-Id: Iefc811bf0d1b093c3c63bf2238c94a1448f4f139
2022-07-13 15:25:24 -07:00
Shiva Krishna Pittala
f853241025 qcacmn: Interrupt assignment for UMAC HW reset feature
UMAC HW reset feature will be using the last interrupt context in each
DP interrupt combination i.e., on a system with more than 8 MSIs for DP,
UMAC HW reset will be assigned a dedicated interrupt context.
Add the necessary support for the same.

CRs-Fixed: 3163900
Change-Id: I26abd01e4261661ed95e1aa3cb2a774e78b50d9f
2022-06-27 05:29:10 -07:00
Shiva Krishna Pittala
df606bea4e qcacmn: Add init path changes for UMAC HW reset feature
Add the changes to initialize UMAC HW reset context at SOC level.

Change-Id: I89afca81945ead67fb1a6454240281d89bec3ab9
CRs-Fixed: 3162080
2022-04-19 08:38:42 -07:00