Delay write of SRNG regs may happen on different CPUs.
Sometimes wmb may not sufficient to protect the update
in sequence. Change is aimed to buy more time for the
update of different CPUs.
Change-Id: I4149decf5a29ea213aa38abd2bef062f25d7858d
CRs-Fixed: 3591457
1. add more function pointers for the remainder functions which are
generic
2. assign functions to per chip level
3. prevent using generic rx_pkt_tlv struct and using at a per soc
specific instead
Change-Id: I1cefb10c7a70f04dbf8b110fcfee6f1c9f4ab1a0
CRs-Fixed: 3533521
Currently hal_info and hif_info logs levels are set to
QDF_TRACE_LEVEL_INFO, which results in prints being logged
to dmesg buffer.
To prevent prints logging into dmesg buffer, changes logging
level to QDF_TRACE_LEVEL_INFO_HIGH.
Change-Id: I039c5e7b6b47f1ffda8e32ff44322d1963648c41
CRs-Fixed: 3577831
Currently in monitor mode, links are released to WBM through the
SW2WBM_RELEASE ring and WBM will feed the links back to RXDMA
through the WBM2RXDMA_LINK_RING.
WCN6450 uses SOFTUMAC architecture where WBM is not present.
Hence the WBM2RXDMA_LINK_RING is repurposed to SW2RXDMA_LINK_RING
where host will directly release the links to RXDMA using this ring.
Change-Id: I110f607e38c4c2ab10eb1bd7b1f5a7bce2f03692
CRs-Fixed: 3493368
Direct link refill ring HTT setup fails due to srng
ring id mismatch. IPA uses a max of two RXDMA_BUF
rings but the hal srng ring id has a max of 3 RXDMA
ring ids which is causing the ring id mismatch for
direct link refill ring.
The fix is to remove the addition IPA related hal srng
ring id and move the macros appropriately to make
it consistent for both IPA enabled and disabled
cases.
Change-Id: Ieb4bbf646f5f0360e4013ae3e235cc7368087731
CRs-Fixed: 3523851
ring history array size is large. Change is aimed
to split the allocation into small trunks to avoid
memory allocation failure.
Change-Id: If977baab23718d0186ad2ce6d33319b52096f2f9
CRs-Fixed: 3479226
MC/BC frames are routed to FW ring based on routing config for MC/BC
data as SRC: FW2RXDMA and DST: RXDMA2DFW.
Data offload features in FW will take care of routing the MC/BC frames
to FW in both active and low power modes.
Make this change only for kiwi/peach using hal ops.
Change-Id: Id8665261a512c9db3e808f95082ff82b47f01ade
CRs-Fixed: 3464036
1. Check Tx halt during umac reset and avoid halt if set already.
2. Perform SRNG disable only in case of umac reset
Change-Id: Id364a6460a64e83002b5c96e08031ad2a0bc8fd7
CRs-Fixed: 3459427
Add srng pointer register writing history, it is helpful
for debugging srng HP/TP update issue from host side.
(1) if host faced UMAC source ring, record the HP value and timestamp
when host write the register.
(2) if host faced UMAC destination ring, record the TP value and
timestamp when host write the register.
Change-Id: Ib98e48e1d32defb0d8b30b854b5b0c23691cca59
CRs-Fixed: 3427908
Added change,
1. Define new DBR module DBR_MODULE_CBF to handle TxBF
standalone sounding CV data and corresponding ring
initialization.
2. API to extract new meta data TLV added for CV data.
3. API to handle standalone sounding complete.
Change-Id: Id28c5561bb8b3bf08de7ddd9aa2365e2ae99f1c2
CRs-Fixed: 3415627
Support REO2SW ring pointer update threshold configuration,
it is helpful for PCIe utilization improvement.
timer based threshold - M: issue pointer updates when M micro
seconds has elapsed.
number based threshold - N: issue pointer updates when N entries
updates occur.
Change-Id: I49ed388520fd52e97e303d6ea9c04ced6cb5cf5f
CRs-Fixed: 3420101
The kernel-doc script identified a number of kernel-doc issues in the
hal/wifi3.0 folder, so fix them.
Note that there are a number of instances where public functions have
their implementation documented in addition to having their interface
documented, so remove the duplicate documentation since only the
interfaces should be documented.
Change-Id: Ic238c0f53658e8754882c83204ffae5ad713ec6b
CRs-Fixed: 3410624
The kernel-doc script identified some documentation issues in the
hal/wifi3.0/kiwi folder, so fix them. For one public function make
sure the interface is documented, and not the implementation.
Change-Id: Ie38a909407d5c2a727c0800ef1a39b89b4ee5e61
CRs-Fixed: 3390484
change allocation location for reo qref table.
per probe allocation results in mem alloc failure when
frame is fragmented
Change-Id: I5922bddebcd0577ba38734ae7d4194d726d825aa
CRs-Fixed: 3326520
In STA mode ast idx override approach is used. In DSc to use ast idx
Need to configure a search idx register with ast idx and cache set number.
Added needed logic to instantiate search index register and
use it for STA mode in DSC path.
Change-Id: I6b3fb7c01a39b16ff1d473381c6155436fe2b27a
CRs-Fixed: 3375219
Add changes to move ioremap of PMM SCRATCH register outside
interrupt context, as ioremap in interrupt context in not valid.
Change-Id: I0fa645c55e10a5241011a1f4ffdccdca48c50d29
CRs-Fixed: 3371194
In case of memory allocation failures,
return appropriate failure to the caller in hal attach.
Change-Id: Ifc319bbc274d8a13836968d460eb8067857363b8
CRs-Fixed: 3357203
Add a new api to read tsf2 and tqm scratch register for qca5332.
The function to read these registers are different from that of qcn9224
since qca5332 is a AHB radio and reading register involves ioremap of
address range.
Change-Id: Ib05df2ddf528594ae67109f8bcb409424a4350a2
CRs-Fixed: 3331476
Retain ds ring indices across wifi restart to avoid
edma hang. Fetch the indices from ds module and set
the corresponding ds ring indices.
Change-Id: Ia299a7006166aef096c7d2c1f65f6bef65415a37
CRs-Fixed: 3332152
The MSI address and data information for Direct Link
copy engines will be available once the WiFi driver
on LPASS is initialized. Add support to configure the
IPCC address and data values into Direct Link copy
engines at runtime.
Change-Id: I5e7dff90c2f1ff764462c235deb5795ed019a16b
CRs-Fixed: 3316679
Add support and ops for initialization and
deinitialization of Direct Link refill ring.
Change-Id: I2c7018c4f8411fb7a590cfbb8b991f9152b22397
CRs-Fixed: 3316656
Add support to read TSF2 and TQM scratch regitser in the HAL layer
for WKK v1 and v2 board.
Change-Id: I0ef5e8cf4e06c0b5c98169252a81f70989285d2d
CRs-Fixed: 3321782
Currently the monitor mode filter settings are set
for both the PMAC. Hence it is possible that the
non-monitor PMAC (the PMAC on which monitor vdev
is not running), can receive packets and forward them
to the monitor destination ring.
The above scenario will lead to a ppdu_id mismatch
when reaping the monitor status ring and comparing
the ppdu_id in status ring with the one in monitor
destination ring, since monitor status ring will
have ppdu_id from the PMAC on which monitor vdev is
running, whereas monitor destination ring will have
packets from both the PMAC.
In order to mitigate the above issue, detect the
packets in the monitor destination ring, which are
not from the PMAC where monitor vdev is running, and
drop them.
Change-Id: I32392ceeadffd9cb7a4dd76336004a9dcbb99404
CRs-Fixed: 3318036
certain BE specific HAL APIs were only initialized for
KIWI chipset but not for WKK. Now moved all these APIs
under beryllium generic initialization.
These APIs are mainly used in de-frag pkt handling.
CRs-Fixed: 3294784
Change-Id: I6611f1b7ef80b432d24a490ba65880dd55539137
1. Changes to get correct write address in hal_get_window_address_5332.
2. Fix for monitor init crash - Added dummy entries to match the
ring_id.
Change-Id: If59b1c231d4595a95e7c1f02de1dbe0ce27a8805
CRs-Fixed: 3268933
When FW was enabling WOW, a ring HP update interrupt is seen
which led to fw crash.
This change records any PCI writes that went through during
runtime suspend from host.
Change-Id: I3c44760ebaf49a131b483813522fe3e451957215
CRs-Fixed: 3280166
For Beryllium LMAC rings, hal_get_srng_ring_id() provides the ring IDs
separately per each LMAC only if that LMAC ring is a destination ring
(This is done to use a common source ring for the DMAC rings).
But the ring IDs for LMAC source rings like DIR_BUF_RX_SRC_DMA_RING are not
being provided separately per LMAC. As a result, these ring IDs in
split-PHY mode are colliding for the 2 LMACs.
Fix this by doing the following.
- Mark the DMAC common rings within the LMAC rings.
- Provide ring ID separately per each LMAC if the ring is an LMAC ring
but not a DMAC common ring.
Change-Id: Ifdae085b5784a03763abfc4edb42d94593e3ea21
CRs-Fixed: 3282702
set register WCSS_UMAC_REO_R0_MISC_CTL 6th bit to 1
to enable reo wref from fw side.
Change-Id: Ib8d4a2f6e7f598d45ba2b2c628ed6f3929fc3337
CRs-Fixed: 3273558
Hal layer changes to handle Umac post reset
and post reset complete events from firmware.
Change-Id: Ib25427930aab25650731c87b38e2ef7e47ae98d9
CRs-Fixed: 3267222
In QCN9224 fetch the peer meta data from the msdu end tlv
instead of MPDU start
Change-Id: Icd9420cd83e06abe5e54e9e05cc8cbf8d8312ae1
CRs-Fixed: 3245626
Add support and handle tx monitor full buffer payload and
other minior fix include change of name for uniformity.
Change-Id: If401ecd5e1c6263584fa7013df672459c883ca8b
CRs-Fixed: 3215244
Change macro IPA_WDI3_RX_TWO_PIPES to IPA_WDI3_VLAN_SUPPORT to represent
the feature supported under this macro
Change-Id: Ie1e387d641052cd5690c63f0c1216f4852544605
CRs-Fixed: 3250264
1. Changes to move hal_tx_config_rbm_mapping_be function from common to
device specific as it has ppe related snippets.
2. Changes to remove all PPE related codes in QCA5332 hal code.
3. Changes to correct macros according to fw_hrs.
4. Changes to move functions with device specific Macros to header files
so that it gets compiled with respective device's FW headers and gets
correct Macros
Change-Id: I479b406f318aa42d2b1032349aaf42d95b8c18e5
CRs-Fixed: 3235966
