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Pavankumar Nandeshwar
a9d8a404fc qcacmn: Handle special tx descriptor pool cases
Fix the missing special tx descriptor pool cases

Change-Id: Ie6a7539e77b805483c32cb7bcfbc3143f9ef8034
CRs-Fixed: 3610126
2023-09-13 14:20:33 -07:00
Chaithanya Garrepalli
31c9403303 qcacmn: Add TX global desc pool per arch type
As cookie format is different between LI and BE have
different global descriptor pool for Lithium and
Beryllium

Change-Id: Idd222f4009c017a1bc4bc4b14043b36d927a9e27
CRs-Fixed: 3608792
2023-09-09 12:57:16 -07:00
Neha Bisht
5e70737f80 qcacmn: Handle special descriptor cases for global tx pool
Handle special descriptor cases for global tx desc pool

Change-Id: I33253b726b1b8a2e7438b3bc1dddcac43ad8fb25
CRs-Fixed: 3592887
2023-08-30 13:40:05 -07:00
Neha Bisht
82e9711f5b qcacmn: Move Tx desc pool to global context level
Move Tx descriptor pool to global context level.

Change-Id: Iff13a41f3bebbaa93e559c38842a596d47f4e534
CRs-Fixed: 3534184
2023-08-30 13:39:55 -07:00
Jeff Johnson
9ce54cdba4 qcacmn: Fix dp_tx_tso_num_seg_pool_init_by_id() stub
The dp_tx_tso_num_seg_pool_init_by_id() stub implementation has an
incorrect semicolon, so remove it.

Change-Id: Ie70aafdb83116e3e3fb7bd96223b0c770e80eb7f
CRs-Fixed: 3500205
2023-07-26 21:24:51 -07:00
Hariharan Ramanathan
ab649e0622 qcacmn: Featurization of DP_TX_DESC_POOL_OPTIMIZE
1. In lowmem profiles the number of tx_desc in 4th pool is reduced to
quarter for memory optimizations.
Added new API dp_get_updated_tx_desc which will return the desc value
from INI based on the flag DP_TX_DESC_POOL_OPTIMIZE.

2. Changes to introduce new INI to get reduced desc value for 4th tx
desc pool.

This helps optimize 0.75M per SOC in lowmem profiles.

Change-Id: I033fcaeb843019fb03bb77e0d05a3ebf60fa806a
CRs-Fixed: 3557483
2023-07-25 00:19:37 -07:00
Naveen S
450a3d2fa4 qcacmn: Fix for qdf spinlock destroyed twice or never created
Fix for qdf_spinlock_destroy being destroyed twice or never created.

Change-Id: Ib45843ecd1c859be112fb75d218aa3d01e6ccdcf
CRs-Fixed: 3471529
2023-05-30 02:57:53 -07:00
Yeshwanth Sriram Guntuka
4dc955351e qcacmn: Move prealloc DP descriptor types to QDF
Move prealloc DP descriptor types to QDF so that
the macros can be used in HIF layer.

Change-Id: I3de60876735e5aa37d80e9e698a86503b18574c1
CRs-Fixed: 3502615
2023-05-26 16:06:57 -07:00
Pavankumar Nandeshwar
5981600c3a qcacmn: Account for global tx desc count during pool flush
Make sure global tx desc count is decremented during
tx desc pool flush

Change-Id: I5ba21cd9a4b1dbd3dbaf55e56a5852fe7703e36c
CRs-Fixed: 3501063
2023-05-23 06:59:50 -07:00
Manikanta Pubbisetty
6758a546bc qcacmn: Add TX descriptor changes for WCN6450
WCN6450 is a chip based on Rhine architecture. Unlike LI/BE targets,
chipsets based on Rhine (RH) do not have host facing UMAC HW blocks.
Their corresponding SRNG interfaces are also removed. The functionality
of these UMAC HW blocks is replaced with a software implementation in
the firmware. Communication between the driver and firmware will happen
over copy engine (CE).

Although there are no host facing UMAC HW blocks, the CE hardware used
in WCN6450 expects the host driver to use the TX descriptor (HW) format
of LI targets during TX packet enqueue. Therefore it is required to
create a new pool of TX descriptors (HW) pool for WCN6450 that is used
during TX.

The logic to create/free/init/deinit these descriptors is specific
to WCN6450/Rhine, therefore it is implemented in architecture specific
Rhine code.

Introduce new APIs in struct dp_arch_ops {} to allocate and free
arch specific TX descriptors. These ops will be no-op for LI/BE
architectures.

Also for Rhine targets, allocate/free other TX descriptors like TX EXT &
TSO descriptors as part of the arch APIs.

Change-Id: I452ac69143395881ab8580355a0f75571dc3e929
CRs-Fixed: 3381711
2023-03-16 09:30:15 -07:00
Manikanta Pubbisetty
24a8216db2 qcacmn: Refactor TX descriptor alloc/free/init/deinit logic
Currently, memory for all kinds of TX descriptors (TX EXT,
TSO etc) are allocated/initialised at once during the driver
init and freed/deinitialised during the driver deinit.
This logic is not suitable for WCN6450.

In the case of WCN6450, the size of the TX descriptor pool is
not known to the driver during load time; Firmware provides
the size of the descriptor pool via HTT_T2H_MSG_TYPE_FLOW_POOL_MAP
message post VDEV creation.

In order to add the support of WCN6450, it is required to
refactor the TX descriptor alloc/free/init/deinit logic.

Changes will not have any impact on the other supported hardware.

Change-Id: Iaa66fd5e118f0486bd618394fad070502bac34a0
CRs-Fixed: 3381705
2023-03-16 03:11:18 -07:00
Jeff Johnson
b2294c287e qcacmn: Fix dp/wifi3.0/dp_tx_desc.* documentation
The kernel-doc script identified a large number of documentation
issues in dp/wifi3.0/dp_tx_desc.[ch], so fix those issues. In
addition, there are a number of instances where public functions have
their implementation documented instead of having their interface
documented, so move that documentation.

Change-Id: I349f0e9d9336ae632fb31e88ddc34ecacc4a1f68
CRs-Fixed: 3373161
2023-02-13 16:16:31 -08:00
Jeff Johnson
357a7f62b7 qcacmn: Make dp_tx_desc_clean_up() static
The function dp_tx_desc_clean_up() is currently a public function.
However this function is only called from within the file where it is
defined, so make it static.

Change-Id: I23d55584453218776703101e9a5abaf9805efb03
CRs-Fixed: 3371794
2023-01-19 09:32:00 -08:00
Pavankumar Nandeshwar
fd6fed3e07 qcacmn: Cleanup the tx desc cleanup logic
Cleanup the tx desc clean up logic used in
direct switch and umac reset cases.
The excess code being removed tries to
get the next descriptor address in boundary
conditions is not useful, as the descriptor
extracted this way will be overwritten
immediately in the beginning of next iteration
of the loop.

Change-Id: Ibcd873719929b94147152ff48205774d3ed4f452
CRs-Fixed: 3371831
2023-01-10 05:31:53 -08:00
Jeff Johnson
ebfbc0d927 qcacmn: dp: Fix misspellings
Fix misspellings in dp/...

Change-Id: I6ef7a19ee03104ae38a8a77e229b90aa80329592
CRs-Fixed: 3304682
2022-10-07 22:42:22 -07:00
Pavankumar Nandeshwar
67de6bcbfd qcacmn: Handle Umac post reset at host
Handle Umac post reset and post reset complete
events from firmware.

Change-Id: I76ac1b96f01f026535d31edcbd245b3643ecf6ee
CRs-Fixed: 3267222
2022-08-21 00:37:46 -07:00
Ming Jiang
53537c67e1 qcacmn: Support none 4k page size kernel
DP uses multi page allocation for tx/rx descriptor.
ID and offset mask of decriptor is based on 4096 which
couples with Kernel's MMU PAGE_SIZE. This cause trouble
when deploy driver on none-4K page size kernel.
Set qdf_dp_blockmem_size to 4096 so that DP won't
depend on kernel page size.

Change-Id: I17f5c10b394e8709e6b4b153f3dd094cf792787f
CRs-Fixed: 3235246
2022-08-03 05:29:55 -07:00
Nandha Kishore Easwaran
cf10304673 qcacmn: Add provision to set desc to higher value
Add support to change the tx_desc value to 65536. Some changes
to make the function argument as u32 type us made

Change-Id: I7cbde1b7ed4ab4e278c25c1ecfa94b7f673197f2
CRs-Fixed: 3130833
2022-03-15 03:41:58 -07:00
Jinwei Chen
4083155141 qcacmn: Add support for HW cookie conversion
Support HW cookie conversion for BE platform.

Change-Id: I39058fbf256266557f5e734ba376db4db0731b24
CRs-Fixed: 2929533
2021-06-23 23:32:49 -07:00
Anirban Sirkhell
eb9acd92fe qcacmn: Fix loop index for freeing desc memory
Fix the index used for looping over descriptors
to free the memory that was already allocated, in the
event of an allocation failure.

Change-Id: I791cdf0b040664a5d39bb52f416d7aab7f3b6bf4
2021-02-03 01:50:20 -08:00
Jinwei Chen
18989f8ede qcacmn: support multiple pages prealloc for descriptor
Support multiple pages prealloc for DP descriptor

Change-Id: I66d4cef3acf69acf4b6fc8e5a6d01c3d67921dca
CRs-Fixed: 2751338
2020-09-21 01:33:16 -07:00
phadiman
1f3652debc qcacmn: Datapath init-deinit changes
Do a logical split of dp_soc_attach and
dp_pdev_attach into Allocation and initialization
and dp_soc_detach and dp_pdev_detach into
de-initialization and free routines

Change-Id: I23bdca0ca86db42a4d0b2554cd60d99bb207a647
2020-05-02 21:59:42 -07:00
Varun Reddy Yeturu
83a31a34b0 qcacmn: Add debug log in dp_tx_delete_flow_pool
Add debug log in dp_tx_delete_flow_pool() to know if
all available tx descriptors have been released to the
pool or not

Change-Id: Id0684effd5c5c0b531bb2d4b3f08d929aaa85b5c
CRs-Fixed: 2463632
2019-06-12 17:46:01 -07:00
Varun Reddy Yeturu
a7c21dc7f3 qcacmn: Allocate multi page memory for dp_rx_desc_pool_alloc
Allocate memory in multiple smaller chunks for dp_rx_desc_pool_alloc,
and link the pages instead of allocating one big contiguous memory to
avoid memory allocation failures.

Change-Id: Id81de10727555c4ca78963a6f01ed3b992ce9924
CRs-Fixed: 2443999
2019-05-23 20:35:07 -07:00
phadiman
a1f798250d qcacmn: Provide API for dp soc reinit
dp_soc_reinit is a flag to check if the
Rx descriptor memory can be reused across
WiFi up/down

Provide an API which checks the flag and
returns either true or false based on the
value set

CRs-Fixed: 2354186
Change-Id: I8c1afbfe0f743d7c9ab37a42a9ef0c6ac1fbf39c
2019-02-27 09:56:10 -08:00
Anish Nataraj
e9d4c3bf33 qcacmn: Reorganise DP init-deinit path to reuse memory
Avoid memory fragmentation that happens during
attach-detach flow.
- Reuse transmit allocated static pool memory across soc up/down.
 These memories are allocated during soc attach.
- Reuse DP source ring memory, DP soc context, DP pdev context
  across soc up/down.
- Reorganise structure members of DP soc and DP pdev so that
  we can zero out structure members across soc up/down
- Add cdp soc init/deinit and cdp pdev init/deinit that
  will be active across soc up/down

Change-Id: I5732453f617bdc16995fda916b645c41845c3ecb
2018-11-30 03:40:43 -08:00
Kiran Venkatappa
08bf93bbaf qcacmn: Use multi-page alloc for tso descs
Regular allocs usually result in allocation of size aligned to
slab boundary resulting in more memory than the requested. Use
multi-page allocation to avoid allocation of more memory than
requested.

Change-Id: Id6562f2fe419179e27206ff5b1d543090b931607
CRs-Fixed: 2294213
2018-09-03 05:11:16 -07:00
Balamurugan Mahalingam
f72cb1f1ff qcacmn: include hal_hw_headers.h header file
macros and fw cmn headers included in hal_internal.h is moved
to a new hal_hw_headers.h to avoid these getting included in hif
layer. Include the new hal_hw_headers.h file

Change-Id: I3390ae9e71ca561d94a265e1fdf4d9354e7b2474
2018-07-21 00:03:27 -07:00
Jinwei Chen
15da8a56d7 qcacmn: fix tx desc allocate from freed pool issue
The avail_desc is not set to 0 when the tx desc pool is
freed, later if still try to allocate tx desc by judgement
of avail_desc, panic happens.

Change-Id: Ia4565da1caa6898c6d4293e2658cf4ccf89563fa
CRs-Fixed: 2246328
2018-06-04 00:55:39 -07:00
Soumya Bhat
dbb8530245 qcacmn: Tx desc counter changes
Add following Tx desc counter changes:
1. Initialize tx_desc allocated counter
2. Initialize tx desc free counter
3. Use per pool tx desc counter num_allocated to populate desc_in_use
   counter

Change-Id: I4d80d0acfbbdd32a9f7d66e938e0a0f4e2cd7048
CRs-Fixed: 2239623
2018-05-21 06:06:17 -07:00
Manjunathappa Prakash
ddf07405c5 qcacmn: Fix ext Tx descriptor pool lock issue
Replace internal spin_lock macros with qdf_spin_lock APIs for lock
operating on TSO/EXT descriptor pools.
TX_DESC_LOCK_* APIs are used only by the flow_control V2 support
to by pass them.

Change-Id: I926c279de3878b6f48efd798194fa896072c1f6d
CRs-Fixed: 2142815
2017-12-08 06:22:32 -08:00
Om Prakash Tripathi
fcb34c7f2c qcacmn: Fix different lock being released than taken
1. Fix a case in dp where lock is taken on tso segment but
   released on tso desc.
2. Increment dma alloc size if allocation is successful

Change-Id: I73d54026a1c268597105096925d138008c2d8c1e
CRs-Fixed: 2131278
2017-11-23 01:34:40 -08:00
Jeff Johnson
3f217e2a81 qcacmn: dp: Replace instances of unadorned %p
Replace instances of unadorned %p in dp.

Change-Id: I8d9c0f6efe5f03a582a36d7ff39a905a5de576a7
CRs-Fixed: 2111274
2017-09-28 04:48:10 -07:00
Manjunathappa Prakash
ced7ea6cf2 qcacmn: Add changes for Napier flow control
Adds support for flow control on convergence branch.
Allocate Tx descriptors dynamically when vdev comes up.
Tx queue is paused and unpaused internally in host based on the
stop and start thresholds.
Changes are added under compilation flag QCA_LL_TX_FLOW_CONTROL_V2.

Change-Id: I0ccb80b0099f39efad52ccd7d47f2709fdee2a93
CRs-Fixed: 2040457
2017-07-18 23:35:05 -07:00
Venkata Sharath Chandra Manchala
99868ac3ca qcacmn: Unlock the tso segment descriptor pool
Unlock the tso segment and tso common segment descriptor
pool if there are no descriptors available in the freelist.

Change-Id: I5c09e381769cdaa914e03ced24dccae8aea90897
CRs-Fixed: 2042950
2017-06-08 15:23:19 -07:00
Venkata Sharath Chandra Manchala
35503cce26 qcacmn: TSO fixes
1. Unmap tso common segment only after receiving
   completions for all the tso segments for a given
   skb.
2. Keep a track of num of free tso descriptors available
   in the pool of tso descriptors.

Change-Id: I01bdbb9e40b7259f77dbcfeec22c6d8cd0c0a6dd
CRs-Fixed: 2042950
2017-05-22 17:05:21 -07:00
Pamidipati, Vijay
1b63ac6bf5 qcacmn: Fix a compilation issue in TSO DP code
THis issue is seen only when FEATURE_TSO is enabled

Change-Id: Ife12f6c3c7ed2310ce7cc1b566c1ff70aa360072
CRs-Fixed: 2004658
2017-03-31 04:25:59 -07:00
Ishank Jain
5122f8fc48 qcacmn: Enable TSO support for QCA8074/6290 DP
Add TSO support for transmit datapath of QCA8074/6290

Change-Id: Id7254859372aa43e3ed16f80c0240d1b78ae63cc
CRs-Fixed: 2004658
2017-03-17 00:36:45 -07:00
Ishank Jain
2f81e9605e qcacmn: Increase size of MSDU EXT DESC
Size of MSDU Extension descriptor increased to accomodate HTT Meta data.

Change-Id: Iaaf87f2f184ec9f144501b9a508bf91d08cad791
CRs-Fixed: 1114769
2017-03-07 21:48:46 -08:00
Leo Chang
c2a7b763d1 qcacmn: add tx descriptor handle
Add memory optimized tx descriptor alloc, free and handle code

Change-Id: Iabd499b7690bbf8bc09223ea7e72e8f81818482a
CRs-fixed: 1076601
2016-10-31 09:54:11 -07:00