This snapshot change adds downstream support
for drm 5.x+(msm_lahaina branch) linux kernel.
Change-Id: Ia691c95da155a00e449c91a2f1a5b20a8e71aed4
Signed-off-by: Narendra Muppalla <NarendraM@codeaurora.org>
This change ensures that if the dsi clock rate is not specified
in the timing modes, setting clkrate_change_pending is not bypassed.
Change-Id: I2475da1e548f29c68a6a4466c5ef540f7f11d553
Signed-off-by: Satya Rama Aditya Pinapala <psraditya30@codeaurora.org>
The current solution triggers the DMA command and waits till
the command dma done and ISR signals completion. This change
introduces asynchronous wait after a DCS command has been
triggered. Enable this mode only during pre kickoff, so as to not
block commit thread.
Change-Id: Iead7b6328883e844147d47ff68dc878943879553
Signed-off-by: Satya Rama Aditya Pinapala <psraditya30@codeaurora.org>
Bypass setting clkrate_change_pending flag if the current mode
and the mode to be set has the same preferred clock rate.
Change-Id: Id1f6c45e822492427cf3555beeaa5f0e7ea3243c
Signed-off-by: Vara Reddy <varar@codeaurora.org>
DSI PHY timings must be committed every time the values
are updated after a dynamic mode switch.
Change-Id: Id605c76dfe75ec41ceb89000f24baccda189e82f
Signed-off-by: Satya Rama Aditya Pinapala <psraditya30@codeaurora.org>
There can be a scenario where dynamic mode set can come
for first commit also, allocate memory for current mode
before checking for DMS.
Change-Id: Ief856a372629112380f199bc336160b3fa278eef
Signed-off-by: Vara Reddy <varar@codeaurora.org>
Add changes to support avr mode config update during
prepare commit which happens before gpu fence wait
for the input buffers.
Change-Id: Ib2cb5b7e1f10501914c003f6cf066b85048f79d4
Signed-off-by: Kalyan Thota <kalyant@codeaurora.org>
Signed-off-by: Jayaprakash <jmadiset@codeaurora.org>
Change adds flag to identify dynamic mode switch with same
resolution and different fps. Block sending PPS command
if we hit this scenario, this optimizes mode switch time.
Change-Id: If5c86084cde641952fe294b512e937cfd1bb5479
Signed-off-by: Vara Reddy <varar@codeaurora.org>
With this change, mdp transfer time updated to userspace
will be the preferred dtsi entry, when both dsi clock
and mdp transfer time nodes are set.
Change-Id: I37cd55e3d6f3f0f78f4ca4bddf921f6cf743c1b9
Signed-off-by: Vara Reddy <varar@codeaurora.org>
This change moves the panel null check to the beginning of the function
so panel can be used throughout the function. This change also replaces
looping through display ctrls with proper display_for_each_ctrl.
Change-Id: I0014ee7ad6d8514734f9233a1abb314e60d29b5f
Signed-off-by: Samantha Tran <samtran@codeaurora.org>
DSI driver sends nolp commands when DSI connector power
modes is set SDE_MODE_DPMS_ON or SDE_MODE_DPMS_OFF. This
is invalid panel configuration. It should only send nolp
commmand to panel when it is in LP1/LP2 mode.
Change-Id: Ie94eaef6899d292fd20f42c1b7ef2c7a99178d13
Signed-off-by: Wenjun Zhang <wjzhan@codeaurora.org>
Signed-off-by: Yuan Zhao <yzhao@codeaurora.org>
Video and command mode will be included in same timing node
when POMS is enabled, but DFPS is only applicable for video
mode, so add this change to differentiate panel mode, and fill
display mode according to panel mode.
Change-Id: I6aa0f8572f23f0612684ed7cdf406b20ab3df822
Signed-off-by: Lei Chen <chenlei@codeaurora.org>
Add check for max controller count while iterating through
display ctrl structure to avoid out of bounds access.
Change-Id: If4d32c648e7d34591726286226600a92a357479a
Signed-off-by: Vishnuvardhan Prodduturi <vproddut@codeaurora.org>
During an ESD trigger, a check must be done to ensure
that ESD is enabled on the particular panel. If not the
panel might end up in a bad state, if the trigger is
propagated successfully instead of reporting a failure.
Change-Id: I310578e7136301ab75ba7f44f14d36ed7e6a519c
Signed-off-by: Satya Rama Aditya Pinapala <psraditya30@codeaurora.org>
Adding debug, info and error prefix for log messages
in dsi files. To enable debug logs
run "echo 0x1 > /sys/module/drm/parameters/debug"
Change-Id: I438ac16954bd1d39450f8adeb7fb17f9ea6f8140
Signed-off-by: Satya Rama Aditya Pinapala <psraditya30@codeaurora.org>
A new API to get drm_panel from dsi_display.
The drm_panel was defined as a member of drm_connector.
When doing connector initialize, can set drm_panel to
drm_connector. So this API is needed to get drm_panel
from dsi_dsiplay.
Change-Id: I0ec9de5a9407085048a8fef421b7b28d466085ed
Signed-off-by: Yuan Zhao <yzhao@codeaurora.org>
When there is a change in resolution or FPS, a new clock rate is
calculated. During such a Dynamic Mode Switch, the clock rate
change pending flag needs to be set after it has been calculated.
This flag is later checked before kickoff and the clocks are updated
accordingly.
Change-Id: Iec102796d5c61d01c567f0b6676e9a6d4ed94268
Signed-off-by: Satya Rama Aditya Pinapala <psraditya30@codeaurora.org>
This change is a snapshot of dsi files taken of 4.14
as of commit 764f7c2 (Merge remote-tracking branch
'quic/dev/msm-4.14-display' into msm-4.14)
Change-Id: I8361a844c35a4450f7800964a8da2741676fd6c7
Signed-off-by: Satya Rama Aditya Pinapala <psraditya30@codeaurora.org>
DFPS validation doesn't update DSI_MODE_FLAG_DMS when there is
only refresh rate change but not resolution change. This is not
expected. DMS should be able to support this use case if DFPS
is not enabled.
Change-Id: I738bce68b1dc098338281ac95156a483769608c4
Signed-off-by: Ray Zhang <rayz@codeaurora.org>
Create a data structure to maintain available hardware resources
and track capabilities. This data structure is used to send
the current available resources and caps information to
connector ops get_mode_info, get_modes and validate_mode to
process the display mode.
Change-Id: If38fc628ee5ab4729821f88c0050ab45375187b8
Signed-off-by: Nilaan Gunabalachandran <ngunabal@codeaurora.org>
Change updates frame transfer time calculations. Frame threshold
is provided as input to decide on the final transfer time.
Panel dsi clock node followed by mdp transfer time node
will take priority in selecting final transfer time than frame
threshold time.
Change-Id: I40c3abfc635cd9b338b705535612ac32e047ce6e
Signed-off-by: Vara Reddy <varar@codeaurora.org>
The change adds a check to make sure the length of bytes being
copied don't exceed the size of the destination buffer
causing an overflow.
Change-Id: Ib3ca3705e4179ccda1af11279e96e167baee6a3b
Signed-off-by: Satya Rama Aditya Pinapala <psraditya30@codeaurora.org>
Continuous splash enabled displays are identified by reading
the MDP ctl registers. DSI cont-splash init settings are
called based on this. Additionally, DSI reads the DSI-CTL
scratch register set by bootloader to detect cont-splash.
This change removes the redundant mechanism in DSI to
detect cont-splash.
Change-Id: Ic58be1e62eda239fcea5e82d9d356905dc552a73
Signed-off-by: Veera Sundaram Sankaran <veeras@codeaurora.org>
Currently the dynamic bit clock switch trigger for command mode
is supported via sysfs node. This might lead to unnecessary
race conditions, when dsi driver is enabling the dsi bit clock
as part of commit and at the same time if bit rate change via
sysfs happens. So make the trigger happens via kernel mode set
call as done for video mode.
Change-Id: I17acb408d2b6dbd6fa41994e56262e31e43d088b
Signed-off-by: Ritesh Kumar <riteshk@codeaurora.org>
Signed-off-by: Yujun Zhang <yujunzhang@codeaurora.org>
This change adds support for dynamic switching of dsi clocks
to avoid RF interference issues. Also with dynamic dsi clock
switch feature coming into picture, now populate the supported
refresh rate as list instead of providing a range. Modify the
logic to enumerate all the modes in dsi driver, taking dynamic
bit clocks, resolutions and refresh rates into account.
Change-Id: I5b6e62bc935cf2234bdd96fcb3c7537b4e735fff
Signed-off-by: Sandeep Panda <spanda@codeaurora.org>
Signed-off-by: Ritesh Kumar <riteshk@codeaurora.org>
Signed-off-by: Yujun Zhang <yujunzhang@codeaurora.org>
This change ports the missing changes from 4.14 to 4.19
that were missed. It includes changes up until
commit 0f8fb25421ff ("cnss2: Add device version to
SOC info structure").
Change-Id: Idfdfe891f146e389e3c65cc3fc4c98d93220e789
Signed-off-by: Samantha Tran <samtran@codeaurora.org>
Currently dynamic mode-switch is allowed only after
the cont-splash handoff is handled during the first
frame. Remove this restriction for cmd-mode alone as
it can handle the use-case.
Change-Id: I5f9dc758f50a91fec0b9f710c74f2ea78c4e75eb
Signed-off-by: Veera Sundaram Sankaran <veeras@codeaurora.org>
Primary and secondary displays should have first priority
when reserving lms. Static reservation can potentially block
higher resolutions for the required displays. This patch gets
the layer mixer requirement for primary or secondary display
if available. It reserves those layer mixers dynamically
for the respective display when connector is registered.
Change-Id: Id69dac4c72d6b20008049f4aeb71c0f97d0a426b
Signed-off-by: Nilaan Gunabalachandran <ngunabal@codeaurora.org>
Add support to selectively enable clock gating for supported
DSI clocks using a new debugfs node - config_clk_gating. This
new node would be created for every display node. See below
for usage examples:
To enable clock gating only for BYTE clock:
echo 1 > /sys/kernel/debug/<display_name>/config_clock_gating
To enable clock gating only for PIXEL clock:
echo 2 > /sys/kernel/debug/<display_name>/config_clock_gating
To enable clock gating only for PHY clock:
echo 4 > /sys/kernel/debug/<display_name>/config_clock_gating
To enable clock gating only for all clock:
echo 7 > /sys/kernel/debug/<display_name>/config_clock_gating
To disable clock gating for all clocks:
echo 8 > /sys/kernel/debug/<display_name>/config_clock_gating
To go back to default setting:
echo 0 > /sys/kernel/debug/<display_name>/config_clock_gating
Change-Id: I83713d86eb1b9675d40d51fc20de81cca0aeb1c0
Signed-off-by: Aravind Venkateswaran <aravindh@codeaurora.org>
If we set esd check mode as TE signal check for video mode panels
the panel will be continuously reset. This change doesn't allow
TE signal check as ESD check mode.
Change-Id: I42a09d605b259d9f06c67cb126d3684ed4489699
Signed-off-by: Satya Rama Aditya Pinapala <psraditya30@codeaurora.org>
