2 次代码提交

作者	SHA1	备注	提交日期
Shiva Krishna Pittala	f853241025	qcacmn: Interrupt assignment for UMAC HW reset feature ... UMAC HW reset feature will be using the last interrupt context in each DP interrupt combination i.e., on a system with more than 8 MSIs for DP, UMAC HW reset will be assigned a dedicated interrupt context. Add the necessary support for the same. CRs-Fixed: 3163900 Change-Id: I26abd01e4261661ed95e1aa3cb2a774e78b50d9f	2022-06-27 05:29:10 -07:00
Shiva Krishna Pittala	df606bea4e	qcacmn: Add init path changes for UMAC HW reset feature ... Add the changes to initialize UMAC HW reset context at SOC level. Change-Id: I89afca81945ead67fb1a6454240281d89bec3ab9 CRs-Fixed: 3162080	2022-04-19 08:38:42 -07:00