Refactor the function '_sde_encoder_phys_wb_update_cwb_flush' to
reduce its complexity.
Change-Id: I91b5fd5409617d06c3c17799d6af128578c3ba16
Signed-off-by: Shamika Joshi <quic_shamjosh@quicinc.com>
Add DSI CTL MISR support for ctl 2.2 version. Reuse the same
debugfs nodes to setup/collect misr.
Change-Id: I3d8dfab093659ce53817d9511999c0c03cc33f62
Signed-off-by: Veera Sundaram Sankaran <quic_veeras@quicinc.com>
Install default panel mode for connector panel_mode property
so that the panel mode can be changed to default mode accordingly
when SDM is restarted.
Change-Id: I3229a1b8e60da9030d6e20112f6b1f3071b5f988
Signed-off-by: Lei Chen <quic_chenlei@quicinc.com>
Currently, driver enforces the allocated WB output buffer to be 256 bits
aligned in memory in order to optimize DDR access and meet maximum system
bandwidth requirements.
Since there are no functional failures with using a 256 bits unaligned
buffer, this change removes this unnecessary check.
Change-Id: I23476e8a28e970f2e1853bbcc0c1d1042d9fdfe2
Signed-off-by: Amine Najahi <quic_anajahi@quicinc.com>
msm-ext-display module is moved out of the kernel to display
driver after waipio release. This change will import these
msm-ext-display symbols only for a non-waipio variant.
Change-Id: I3cb30f666120e29c13405b98c98cc540198fa651
Signed-off-by: Sandeep Gangadharaiah <quic_sandgang@quicinc.com>
Set a flag to avoid multiple reading of sde_dbg info, that
reduces devcoredump reading time.
Change-Id: I83f77dea35bb818d51b0982124a54ffeef7db8af
Signed-off-by: Bruce Hoo <quic_bingchua@quicinc.com>
Enable trusted vm flag for kalama target
Change-Id: I2f2c0a838914d5fccf6642690c082c592e04e38d
Signed-off-by: Raviteja Tamatam <quic_travitej@quicinc.com>
SID registers and offsets are changed in display
MDSS 9.0.0. Changes are made to program these new registers.
Also, added new revision check for backward
compatibility.
Change-Id: I4e1ea374f38c95a4d1019c2596418bb6bb7c5347
Signed-off-by: Raviteja Tamatam <quic_travitej@quicinc.com>
Update HFC layer checks to handle partial update. Layer checks
should compare against ROI when partial update is enabled.
Layer checks should compare against full panel height when
destination scaler is enabled. Destination scaler and PU
concurrency is not supported.
Change-Id: I3435370a81f05a492411433054ae09f2125c6bf7
Signed-off-by: Anjaneya Prasad Musunuri <quic_aprasad@quicinc.com>
This change adds the programming of the master interface
register for single interface configurations.
Setting this register is required by hw-fencing feature
to distinguish primary interfaces vs wb.
Change-Id: I84936ebd6a9f2d67cf98c19a51ce3a132c648a2d
Signed-off-by: Ingrid Gallardo <quic_ingridg@quicinc.com>
Signed-off-by: Christina Oliveira <quic_coliveir@quicinc.com>
Because of changes to ref clock frequency, few of the pll
reg values are different for kalama compared to palima.
This change differentiates between these two 4nm versions,
based on pll revision and also introduces a pll reg table
to differentiate the values.
Change-Id: I016330ded10ab334012daa8cc288a8cd5c039f58
Signed-off-by: Sandeep Gangadharaiah <quic_sandgang@quicinc.com>
This change avoids null pointer dereference in different APIs.
Change-Id: I01eba9d64fa4ba2fd81f7f39f586867e22d66771
Signed-off-by: Narendra Muppalla <quic_nmuppall@quicinc.com>
Refactor the function 'dsi_display_get_modes' to
reduce its complexity.
Change-Id: I1a8ecaa780e5070bac7fa40404677c0a8a5d7cd8
Signed-off-by: Shamika Joshi <quic_shamjosh@quicinc.com>
Mitigate errors to debug logs on non-parsed regulator look ups. Callers
can make use of the return value to handle failures.
Change-Id: Ib0ed869e92104ac7e859484b247ac99bf332fa5c
Signed-off-by: Jeykumar Sankaran <quic_jeykumar@quicinc.com>
MDSS 9.0.0 added support for logging MDP_VSYNC timestamp. Use it for
video-mode panels and rely on PANEL_VSYNC timestamp for cmd-mode panels
as it relies on external panel TE.
Change-Id: I09b25d893075bee7cb2da98d4c4b4e54eb09bd6e
Signed-off-by: Veera Sundaram Sankaran <quic_veeras@quicinc.com>
With MDSS 9.0.0, s/w relies on the ctl-done-irq which signifies the
frame done for the ctl path. Avoid unnecessary waits during
tx-done/commit-done on the individual physical encoders when ctl-done
feature is enabled.
Change-Id: Ie5e8b08c47a4778dfa03a87dbbae8daf6a738e6a
Signed-off-by: Veera Sundaram Sankaran <quic_veeras@quicinc.com>
Fix the Watchdog timer load value calculation with jitter feature.
Change the long term jitter value check to have jitter < 10.
Change-Id: If834e16d3b8fad5009642e479f529fa5b7cf2d17
Signed-off-by: Veera Sundaram Sankaran <quic_veeras@quicinc.com>
SPR hardware can be configured by user-space clients in bypass or
normal mode. Change adds support to allow clients to enable spr
in bypass or normal mode.
Change-Id: I04641774de91ec2b40af00c665ceffd72a255eea
Signed-off-by: Gopikrishnaiah Anand <quic_agopik@quicinc.com>
DP PLL driver is the clock provider for link_clk and pixel_clk source
clocks. Once the PLL is configured, the clock rates for these output
clocks must be explicitly set using the clk_set_rate() API so that
the clock framework can correctly compute any MND values required
to satisfy the requested rate at the branch clocks that source from
the PLL output clocks.
Change-Id: I14f8f58333ac5ba3f547d12a123cb5e5f05c6005
Signed-off-by: Aravind Venkateswaran <quic_aravindh@quicinc.com>
Change removes the dependency of reading MVID and NVID settings
from dispcc registers and calculates the values locally in displayport
driver.
Change-Id: I9ad66aea44a3cbc0f739060c49e23d389022a48a
Signed-off-by: Vara Reddy <quic_varar@quicinc.com>
Swing/Pre-emph, SSC, and CLKBUFLR values updated to match
latest changes as per kalama HPG.
Change-Id: Iae96b38f0f8c39280081ae43b41f73ea10f6ddb7
Signed-off-by: Sandeep Gangadharaiah <quic_sandgang@quicinc.com>
Signed-off-by: Vara Reddy <quic_varar@quicinc.com>
Enable DP and DP_MST compilation flags for Kailua.
Disable ext audio and HDCP until validated.
Change-Id: I7f05e370aed1df07beff568b87cf12ff57b96d63
Signed-off-by: Sandeep Gangadharaiah <quic_sandgang@quicinc.com>
Signed-off-by: Vara Reddy <quic_varar@quicinc.com>
msm_external_display module should be linked as an
additional dependency for display drivers. This change
includes the respective module.
Change-Id: Id16f22f073f596f360d576147e4a0d96c16505e7
Signed-off-by: Sandeep Gangadharaiah <quic_sandgang@quicinc.com>
Signed-off-by: Vara Reddy <quic_varar@quicinc.com>
On kailua onwards USB3 DP SSPHY power is control using GDSC.
This change adds support to vote for GDSC when displayport
driver is active.
Change-Id: I2e741f2091018f5dae9a1e7e886179bc6b982d40
Signed-off-by: Vara Reddy <quic_varar@quicinc.com>
Add check to avoid more than 1 CWB active per commit as
hardware doesn't support multiple CWB even if they are
on different OP.
Change-Id: I13416cc2af881de0d8bdd6544a4fdc180fb7a050
Signed-off-by: Amine Najahi <quic_anajahi@quicinc.com>
Avoid read/update for WD_TIMER_0_CTL2 register as the default value changed
from MDSS 9.x.x to disable clock granularity and this leads to issues with
VSYNC generation. Instead program the necessary configs directly.
Change-Id: Id545ad772480f94cf432bff8e8bfeb2b679f8aa9
Signed-off-by: Veera Sundaram Sankaran <quic_veeras@quicinc.com>
