Commit Graph

1103 Commits

Author SHA1 Message Date
Samantha Tran
5a12f8b0df disp: msm: sde: add default calculations and settings for pre-downscale
This change introduces pre-downscaling values to the path where
these values are not provided by userspace. Currently, pre-downscaling
is only allowed by a factor of 2.2 in the x direction. With this
change pre-downscaling will support >2.2 up to 4 in the x direction.

Change-Id: I04d1b07243a5973e9338ea2a212280985b31b6a3
Signed-off-by: Samantha Tran <samtran@codeaurora.org>
2020-04-20 17:24:15 -07:00
Krishna Manikandan
6d81ae22c1 disp: msm: sde: add xlogs for secure usecases
Add xlogs to capture the secure state information of
each of the planes during mixer setup.

Change-Id: I5d60fb4287b13b3ba5a78c6b858dd244ebeb18aa
Signed-off-by: Krishna Manikandan <mkrishn@codeaurora.org>
Signed-off-by: Narendra Muppalla <NarendraM@codeaurora.org>
2020-04-20 14:32:35 -07:00
Raviteja Tamatam
2d1980b2b3 disp: msm: sde: avoid drm_crtc_vblank_on during seamless transition
When there is a race condition between DMS seamless transition and
drm_wait_vblank_ioctl, the latter gets deregistered for vblank
handle as drm_crtc_vblank_on call in crtc enbale increments vblank
count. This change avoids drm_crtc_vblank_on call during seamless
transition when crtc is already enabled as it is not required.

Change-Id: I0b9327a98cef00405b5b94e24a3fd15205339cfc
Signed-off-by: Raviteja Tamatam <travitej@codeaurora.org>
2020-04-20 14:32:32 -07:00
Raviteja Tamatam
54b2d6810a disp: msm: sde: avoid secure display to secure camera transition
During stability tests there are cases where smmu faults are
seen due to direct transition from secure display to secure
camera without smmu ATTACHED state. Added atomic check to avoid
such transitions.

Change-Id: I307e342f35c6e7dab82902fa77e3a5c0c082f4e4
Signed-off-by: Raviteja Tamatam <travitej@codeaurora.org>
2020-04-20 14:32:28 -07:00
qctecmdr
60b0ca7dba Merge "disp: msm: sde: update check flags to handle CONFIG_DEBUG_FS" 2020-04-20 14:23:29 -07:00
Samantha Tran
50c2183779 display: fix compilation when CONFIG_DEBUG_FS is disabled
Fix compilation error when CONFIG_DEBUG_FS is disabled in
kona-perf_defconfig.

Change-Id: I7f6e942e4af9fab1e3cb9fe053401a241597a81f
Signed-off-by: Prateek Sood <prsood@codeaurora.org>
Signed-off-by: Samantha Tran <samtran@codeaurora.org>
2020-04-20 10:14:35 -07:00
Lipsa Rout
e009f7f81f disp: msm: dsi: Update mode population logic for POMS feature
This change adds support to populate one command mode for
video mode panels supporting panel operating mode switch
feature.

Change-Id: I850b889ebfa8c2ee1406ad946061b96143537b09
Signed-off-by: Lipsa Rout <lrout@codeaurora.org>
Signed-off-by: Satya Rama Aditya Pinapala <psraditya30@codeaurora.org>
2020-04-20 09:59:22 -07:00
Lipsa Rout
d59451d9e9 disp: msm: dsi: Add support to skip constant fps for command mode
VFP or HFP is adjusted to achieve constant fps during dynamic
DSI clock switch. This feature is not supported for command
mode. So, add check to skip porch calculation for command mode.

Change-Id: I5fa76d6536a55b2a19f24c0e14b6861e1f4c8f25
Signed-off-by: Lipsa Rout <lrout@codeaurora.org>
Signed-off-by: Satya Rama Aditya Pinapala <psraditya30@codeaurora.org>
2020-04-20 09:59:18 -07:00
Lipsa Rout
9cf9c8e99b disp: msm: dsi: Fix the total number of modes calculation
This change updates the parsing of timing nodes to check
the mode of operation as video or command. In command mode,
for each timing node, num of supported dfps rate is always
one. Accordingly, update the num_dfps_rate to 1 for
command mode.

Change-Id: I5098c7e0d4d2320609d6e10031eaef78c1d8b3c1
Signed-off-by: Lipsa Rout <lrout@codeaurora.org>
Signed-off-by: Satya Rama Aditya Pinapala <psraditya30@codeaurora.org>
2020-04-20 09:59:14 -07:00
Rajeev Nandan
4f53bc1569 disp: msm: dsi: fix physical size truncation of large panel
Panel's physical width/height larger than 255mm is getting
truncated due to type conversion into smaller type.

Change-Id: I826fb2db542146c07d8379951563430b7da8288c
Signed-off-by: Rajeev Nandan <rajeevny@codeaurora.org>
Signed-off-by: Satya Rama Aditya Pinapala <psraditya30@codeaurora.org>
2020-04-20 09:59:09 -07:00
Harigovindan P
1b9802c099 disp: msm: dsi: modify handling of debugfs initialization
Add support to allow creation of debugfs node only if
CONFIG_DEBUG_FS is enabled.

Change-Id: I1ae2c4188a99e3ed88f59fc021efc01407bf942d
Signed-off-by: Harigovindan P <harigovi@codeaurora.org>
Signed-off-by: Satya Rama Aditya Pinapala <psraditya30@codeaurora.org>
2020-04-19 14:20:12 -07:00
Krishna Manikandan
eaa0b9cc15 disp: msm: dsi: avoid seamless request for cwb transitions
There are some scenarios where a dfps request
during cwb session will result in cwb
encoder not getting disabled once the cwb
session is over. Add support to fail the
commit if any VRR or dynamic clock change
request is received during CWB transitions
to handle this.

Change-Id: Id3f192f79eac4ad0d7301bd34f7151fec243d685
Signed-off-by: Krishna Manikandan <mkrishn@codeaurora.org>
Signed-off-by: Satya Rama Aditya Pinapala <psraditya30@codeaurora.org>
2020-04-19 14:13:35 -07:00
Lei Chen
92ecce2873 disp: msm: Subtract DSI interrupt count after interrupt was destroyed
DSI interrupt may be destroyed before it is disabled, it will cause to
the interrupt count can't be cleared, so subtrace DSI interrupt count
in disable function even it was destroyed.

Change-Id: I430b0281957db588c7405d5775d0c10f2f498b36
Signed-off-by: Lei Chen <chenlei@codeaurora.org>
Signed-off-by: Satya Rama Aditya Pinapala <psraditya30@codeaurora.org>
2020-04-19 14:13:20 -07:00
Nilaan Gunabalachandran
a5cae7c0f3 disp: msm: dsi: make panel commands async for vid to cmd switch
Optimize pre mode switch panel command by transferring async. This
removes the time waited until subsequent dma_done irq.

Change-Id: I2e2516fdd641e85d1f1b221a6ea7999c868edf00
Signed-off-by: Nilaan Gunabalachandran <ngunabal@codeaurora.org>
Signed-off-by: Satya Rama Aditya Pinapala <psraditya30@codeaurora.org>
2020-04-19 14:13:13 -07:00
Nilaan Gunabalachandran
41f52e3987 disp: msm: dsi: maintain validated dsi msg flags
This change fixes the usecase where dsi msg flags validated only
during command transfer. This fix maintains the flags between
transfer and trigger calls. It also adds a new async override
flag to be used to bypass validate function.

Change-Id: Ie12acd3d7b01099bba65ca37cec61091408b81c5
Signed-off-by: Nilaan Gunabalachandran <ngunabal@codeaurora.org>
Signed-off-by: Satya Rama Aditya Pinapala <psraditya30@codeaurora.org>
2020-04-19 14:12:58 -07:00
Samantha Tran
18d29a5b7b disp: msm: sde: update check flags to handle CONFIG_DEBUG_FS
Add support to handle disabling of CONFIG_DEBUG_FS.

Change-Id: I8c07434afc36edfae9bd9bc7880d07264eca7650
Signed-off-by: Krishna Manikandan <mkrishn@codeaurora.org>
Signed-off-by: Samantha Tran <samtran@codeaurora.org>
2020-04-16 23:55:58 -07:00
Samantha Tran
22923230ef disp: msm: modify handling of debugfs initialization
Add support to allow creation of debugfs node only if
CONFIG_DEBUG_FS is enabled.

Change-Id: Iaeaf51b3654c9458cf8131a9756e6b905007c4ae
Signed-off-by: Krishna Manikandan <mkrishn@codeaurora.org>
Signed-off-by: Samantha Tran <samtran@codeaurora.org>
2020-04-16 23:55:48 -07:00
Satya Rama Aditya Pinapala
e0a892dcd5 disp: msm: dsi: fix dsi pll debugfs errors
Remove duplicate calls to devm_regmap_init and change configuration
names for regmap creation to prevent attempts to create duplicate
debugfs entries.

Change-Id: Id108c97fa2583460e0a585e2c852205680029e2c
Signed-off-by: Satya Rama Aditya Pinapala <psraditya30@codeaurora.org>
2020-04-16 22:04:21 -07:00
qctecmdr
a1143d12be Merge "disp: msm: sde: remove unnecessary DSPP HW resource check" 2020-04-16 15:32:21 -07:00
qctecmdr
265642fa46 Merge "disp: msm: sde: restart idle power collapse timeout every kickoff" 2020-04-16 15:32:20 -07:00
qctecmdr
da0b8d3812 Merge "disp: msm: sde: skip power events when cont-splash is enabled" 2020-04-16 14:02:26 -07:00
qctecmdr
76c75d3441 Merge "disp: msm: dsi: disable ESD while using swte" 2020-04-15 21:36:04 -07:00
Amine Najahi
8f00f9a40a disp: msm: sde: remove unnecessary DSPP HW resource check
The color-processing partial update check wrongly
assumes that all pipes in a CRTC have a DSPP attached.
This inhibits the use of any LMs without a valid DSPP.

Fix the issue by removing this invalid check since whenever
a DSPP feature is required, the HW resource availability is
already confirmed during the color-processing property validation.

Change-Id: I5b4565865644e4a0fa3d0542a299067f21756863
Signed-off-by: Amine Najahi <anajahi@codeaurora.org>
2020-04-15 17:56:00 -07:00
Steve Cohen
f95824d0ec disp: msm: sde: restart idle power collapse timeout every kickoff
Restart the timeline for the idle power collapse delayed work
timer for every resource control kickoff instead of only during
a power state change. This will prevent entering mode2 at
unexpected times during active scanouts.

Change-Id: I001157ff7e6b6246e26d537e30d8617cab9cb463
Signed-off-by: Steve Cohen <cohens@codeaurora.org>
2020-04-14 14:22:17 -07:00
qctecmdr
6947c549ba Merge "drm: msm: sde: Allow reservation of odd number of DSCs" 2020-04-14 10:55:05 -07:00
qctecmdr
a6caceab89 Merge "disp: msm: update sde rscc mode2 sequence" 2020-04-14 06:26:47 -07:00
qctecmdr
55ca989cd8 Merge "disp: msm: hdcp: fix compilation of msm_hdcp module on GKI" 2020-04-13 20:54:42 -07:00
Thomas Dedinsky
b4d4eae01c drm: msm: sde: Allow reservation of odd number of DSCs
Add a check to escape the DSC allocation once the requested
number of DSCs has been reached and a pair is not required
for the last DSC allocated. This issue was introduced when
trying to allow for quad DSC, which broke single DSC use.

Change-Id: I4bc368004f92570d588e76ceb832d63fd3bb15d7
Signed-off-by: Thomas Dedinsky <tdedinsk@codeaurora.org>
2020-04-13 16:02:09 -04:00
Satya Rama Aditya Pinapala
23505c9d70 disp: msm: dsi: disable ESD while using swte
While running the panel in simulation mode using sim-swte, ESD check is
invalid. The change doesn't set the ESD capabilities if watchdog timer
is being used for TE.

Change-Id: I375f369ad4602f21da6151e526e7b6e78fcea524
Signed-off-by: Satya Rama Aditya Pinapala <psraditya30@codeaurora.org>
2020-04-13 12:22:31 -07:00
Prabhanjan Kandula
ebc5d6c7da disp: msm: sde: add partial update support for spr block
This change adds support for regdma accelerated programming of
partial update offsets for SPR hw block and validation of ROI
during atomic check based on SPR hw block limitations.

Change-Id: I9e20af4ba7752e8a4af5e9738612c57603163744
Signed-off-by: Prabhanjan Kandula <pkandula@codeaurora.org>
2020-04-13 11:04:03 -07:00
qctecmdr
d94c7aef02 Merge "disp: msm: sde: add pm QoS vote on CPU receiving display IRQ" 2020-04-12 23:31:30 -07:00
Steve Cohen
4dbf721a24 disp: msm: sde: reduce complexity in sde_plane_sspp_atomic_check
Lower the cyclomatic code complexity by moving some logic into
a helper function.

Change-Id: If15a4eaaecb0f6eec512671d47e4da20f9a31670
Signed-off-by: Steve Cohen <cohens@codeaurora.org>
2020-04-11 22:11:27 -04:00
qctecmdr
697315b082 Merge "disp: msm: sde: correct line time to include compression ratio" 2020-04-11 15:53:27 -07:00
qctecmdr
a6128a06ce Merge "disp: msm: sde: fix vsync wakeup time" 2020-04-11 14:36:34 -07:00
Samantha Tran
7401ef1995 disp: msm: sde: correct line time to include compression ratio
Current computation of line time does not include compression ratio
from either DSC or VDC. This change stores source bpp and target bpp in
sde_crtc during sde encoder mode set to be used while calculating line
time.

Change-Id: Ib1e045dce17fcf006447d4562b402cc3f214ed8c
Signed-off-by: Samantha Tran <samtran@codeaurora.org>
2020-04-10 16:23:38 -07:00
qctecmdr
25062d1965 Merge "disp: msm: dsi: add return code to probe deferral error logs" 2020-04-10 09:39:57 -07:00
qctecmdr
7f3ea3bfbb Merge "disp: msm: dsi: add widebus support for DSI" 2020-04-10 07:07:32 -07:00
Rajkumar Subbiah
56e041919c disp: msm: dsi: add widebus support for DSI
From Lahaina onwards, for compressed DSI output, widebus should be enabled.
In widebus mode, 6 bytes of data are transmitted per pclk.
For uncompressed output, widebus must be disabled to transmit 3 bytes
of uncompressed data per pclk.

Change-Id: I7fc0bdb2e1678152d57b4cbb8295063a2ba8ae73
Signed-off-by: Rajkumar Subbiah <rsubbia@codeaurora.org>
2020-04-09 14:15:13 -04:00
Rajkumar Subbiah
c0d4857a81 disp: msm: sde: adjust intf timing for widebus
From Lahaina onwards, widebus is enabled for compressed DSI stream.
This change adjusts interface timing parameters to account for widebus.

Change-Id: Ie6b739ed2cdb515064e3a94404b3e0fe07755d7e
Signed-off-by: Rajkumar Subbiah <rsubbia@codeaurora.org>
2020-04-09 14:14:55 -04:00
Satya Rama Aditya Pinapala
f93224bc4b disp: msm: dsi: add return code to probe deferral error logs
This change adds return code -EPROBE_DEFER to DSI error logs during
a probe deferral.

Change-Id: I59971ebc319e90d65f64e73149e34ba691441741
Signed-off-by: Satya Rama Aditya Pinapala <psraditya30@codeaurora.org>
2020-04-09 10:39:20 -07:00
Thomas Dedinsky
5be3c7a8ce disp: msm: sde: fix vsync wakeup time
Current wakeup time is surpassing next vsync and not being used.
This change will use mdp transfer time calculated by dsi to compute
line time in command mode. In video mode, fps will be used to compute
the line time. This line time will be used with current interface
line count to calculate time until the next vsync.

Change-Id: I0b6fc396711ade95ecf95755a907280309af223e
Signed-off-by: Thomas Dedinsky <tdedinsk@codeaurora.org>
2020-04-09 12:52:45 -04:00
Samantha Tran
e85a88ea01 disp: msm: sde: add pm QoS vote on CPU receiving display IRQ
Add a QoS vote on CPU receiving display interrupt. QoS vote
will prevent that CPU from going into low power mode avoiding
possible interrupt latency. Using irq notifier, display will
receive notification when display IRQ has switched CPUs and
will adjust the vote accordingly. The vote is also removed and
requested whenever display IRQ is enabled or disabled.

Change-Id: I94b4501896b4b20b37deaca90d6b5ff883d56621
Signed-off-by: Samantha Tran <samtran@codeaurora.org>
Signed-off-by: Lei Chen <chenlei@codeaurora.org>
2020-04-09 22:56:18 +08:00
qctecmdr
15cb70c77f Merge "disp: msm: get reg-bus vote values from device node property" 2020-04-08 09:25:17 -07:00
Tatenda Chipeperekwa
cf0e14d185 disp: msm: hdcp: fix compilation of msm_hdcp module on GKI
Add stub functions for msm_hdcp module in order to prevent
linker issues when CONFIG_HDCP_QSEECOM is not defined, marked
as not disabled or defined as module. Furthermore, a Kbuild
entry for the msm_hdcp.h file so that it is exported.

Change-Id: I0f102bf4c9722d95b897facdab94d83e32f7d29f
Signed-off-by: Tatenda Chipeperekwa <tatendac@codeaurora.org>
2020-04-07 23:15:53 -07:00
qctecmdr
a703569e0f Merge "disp: msm: fix data bus bandwidth vote units" 2020-04-07 17:52:00 -07:00
qctecmdr
50e358b5e5 Merge "disp: msm: hdcp: reset authentication state for client initiated abort" 2020-04-07 12:24:24 -07:00
Rajat Gupta
84424a93e3 disp: msm: hdcp: reset authentication state for client initiated abort
Return EINVAL upon early exit/abort of authentication and
reset the authentication state.

Change-Id: I4862bbe55301eabef2a83849a551eb948f73569b
Signed-off-by: Rajat Gupta <rajatgu@codeaurora.org>
Signed-off-by: Tatenda Chipeperekwa <tatendac@codeaurora.org>
2020-04-07 11:03:08 -07:00
qctecmdr
f30a033ad5 Merge "disp: msm: hdcp: abort queued tasks while processing PM suspend" 2020-04-06 21:56:42 -07:00
Steve Cohen
e3184000c5 disp: msm: get reg-bus vote values from device node property
Get the register bus AB/IB vote values for each supported mode
from the device node to allow flexibility in adjusting these
settings for various different targets.

Change-Id: I258320d4847accfa8043f5f9fc4ccc791c16dddd
Signed-off-by: Steve Cohen <cohens@codeaurora.org>
2020-04-06 21:55:15 -04:00
qctecmdr
fbb802950c Merge "msm: sde: SW workaround for REG_BLK_LUT_WRITE HW limitation" 2020-04-06 17:06:19 -07:00