Commit Graph

2670 Commits

Author SHA1 Message Date
Savita Patted
21afcb7a0d Snap for drop 06/07/2022 mainline 782 LA.VENDOR.13.2.0.AU237
camera-kernel:
a37d03c Merge "msm: camera: icp: Update HFI cmdq/msgq size" into camera-kernel.lnx.dev
6d3cd8d Merge "msm: camera: uapi: Add interface for DRV config" into camera-kernel.lnx.dev
1200063 Merge "msm: camera: memmgr: Set name for dma buffer to help profiling" into camera-kernel.lnx.dev
05c9d49 Merge "msm: camera: isp: Use spin lock bh to avoid thread preemption" into camera-kernel.lnx.dev
f047884 Merge "msm: camera: sync: Add support for dma fences" into camera-kernel.lnx.dev
38f0dfc Merge "msm: camera: reqmgr: SAT switch latency optimization" into camera-kernel.lnx.dev
5707a77 Merge "msm: camera: isp: Configure UBWC registers during stream on" into camera-kernel.lnx.dev
8998637 Merge "msm: camera: reqmgr: Fix out of sync issue after flashing" into camera-kernel.lnx.dev

Change-Id: I2ce11c70eea644e14f1a9a8f9dde6ea73e95be6e
Signed-off-by: Savita Patted <quic_spatted@quicinc.com>
2022-06-08 13:07:34 -07:00
Mukund Madhusudan Atre
9dcca711f8 msm: camera: uapi: Add interface for DRV config
Add interface to configure DRV settings and vote levels.

CRs-Fixed: 3065551
Change-Id: I07ff6f25bffcfb11671436d64f917fc49cb73cc2
Signed-off-by: Mukund Madhusudan Atre <quic_matre@quicinc.com>
2022-06-08 13:07:25 -07:00
Stark Lin
38c78b4c8d msm: camera: reqmgr: SAT switch latency optimization
To optimize SAT switch latency, Link handles will be passed along
with OpenRequest so that KMD can get sync link info per request and
UMD don't need to wait all pending requests to be done before activing
new links.

CRs-Fixed: 3094388
Change-Id: Ia52a95d9eaf444bd982a288bacf1e62b276130f2
Signed-off-by: Stark Lin <quic_starlin@quicinc.com>
Signed-off-by: Depeng Shao <quic_depengs@quicinc.com>
2022-06-08 13:07:15 -07:00
Wang Kan
de722f884d msm: camera: reqmgr: Fix out of sync issue after flashing
In bokeh mode, if we set flash on one link and flash off
on the other link, will lead to out of sync between these
two links. So keep them in sync by syncing the according
req table slot info on the sync link.

CRs-Fixed: 3199523
Change-Id: I11ae4df36aa4363d136112284e1c94cadff323db
Signed-off-by: Wang Kan <quic_wkan@quicinc.com>
2022-06-08 13:07:07 -07:00
Gaurav Jindal
58b2b012f3 msm: camera: isp: Use spin lock bh to avoid thread preemption
Use spin_lock_bh utility to avoid the preemtpion of recovery thread
in ISP context. This can come in rare conditions when IRQ is received
on same CPU which is handling the thread.
Such cases will result in deadlock conditions.

CRs-Fixed: 3208733
Change-Id: I25fde15b484fd72fa779aed393ef94d4fbb183b6
Signed-off-by: Gaurav Jindal <quic_gjindal@quicinc.com>
2022-06-08 13:06:59 -07:00
Karthik Anantha Ram
f00b977871 msm: camera: icp: Update HFI cmdq/msgq size
Increase cmdq/msgq size to 8K. Update HFI read API to
reflect the bump in size.

CRs-Fixed: 3190507
Change-Id: I70f5ded8e6155534cf2fa0fe94d3fdd1a378b5f7
Signed-off-by: Karthik Anantha Ram <quic_kartanan@quicinc.com>
2022-06-08 13:06:48 -07:00
Karthik Anantha Ram
a130199cd3 msm: camera: sync: Add support for dma fences
Add support to create, release, signal and import
a dma fence. When a sync object is imported for a dma fence
signal the dma fence when signaling the sync object with
appropriate status. This is achieved by implementing
generic fence scheme. The change also adds support
for batched fences.

CRs-Fixed: 3207212
Change-Id: I23fbc0992281cfee0303e213a30bce138ae7bdff
Signed-off-by: Karthik Anantha Ram <quic_kartanan@quicinc.com>
2022-06-08 13:06:40 -07:00
Fengjie Chen
cf223fa7b3 msm: camera: memmgr: Set name for dma buffer to help profiling
For dma buffer profiling,we don't konw the owner of one dma
buffer. So we add it's name to show it's owner.
If you use v1 struct to alloc/map dma buffer it will use
default buffer name "UNKNOWN". For v2 struct you can set dma
buffer name at UMD side.

CRs-Fixed: 3131442
Change-Id: I24ce6aa1d97cd9fc26d9bd8796ab2367607008f6
Signed-off-by: Fengjie Chen <quic_fengjiec@quicinc.com>
2022-06-08 13:06:24 -07:00
Gaurav Jindal
2e6c254487 msm: camera: isp: Configure UBWC registers during stream on
In some cases while using scratch buffer UBWC registers are not
configured even after receiving the update blob from Userland.
This results in constraint errors at bus side.
This commit configures the UBWC registers at stream on if the
blob was received for the ports which are UBWC enabled.

Change-Id: Icf9a66808432052c84f52bbf470880fde082cee3
CRs-Fixed: 3108015
Signed-off-by: Gaurav Jindal <quic_gjindal@quicinc.com>
2022-06-08 13:06:13 -07:00
Savita Patted
e2da237e2e CAMX: Snap for drop 06/03/2022 mainline 781 LA.VENDOR.13.2.0.AU237
Change-Id: I259b1c982a2c32f7cd18152841e4f15d6d01c305
Signed-off-by: Savita Patted <quic_spatted@quicinc.com>
2022-06-03 17:06:15 -07:00
Savita Patted
83392426a6 Snap for drop 06/01/2022 mainline 779 LA.VENDOR.13.2.0.AU221
camera-kernel:
e3b23a4 Merge "msm: camera: icp: Add unified dev type field in icp ctx struct" into camera-kernel.lnx.dev
8fd344f Merge "msm: camera: isp: Update condition check for SFE pix port acquire" into camera-kernel.lnx.dev
b3dce54 Merge "msm: camera: csiphy: Add support to handle new cmd buffers" into camera-kernel.lnx.dev
a1db9e4 Merge "msm: camera: uapi: Add UAPI for new CPHY cmd buffers" into camera-kernel.lnx.dev
631aed9 Merge "msm: camera: isp: Pack the data for plain128" into camera-kernel.lnx.dev
cd81cd2 Merge "msm: camera: isp: Update buf-done IRQ handler for CSID-Lite 880" into camera-kernel.lnx.dev
fd950da Merge "msm: camera: isp: Add irq index to RDI resource" into camera-kernel.lnx.dev
9225bbb Merge "msm: camera: cdm: Fix the memory handle passed to presil API" into camera-kernel.lnx.dev
6fea65d Merge "msm: camera: isp: Add logic to support 3rd SFE in CSID" into camera-kernel.lnx.dev
e18a27f Merge "msm: camera: isp: Fix IRQ register sets for csid lite" into camera-kernel.lnx.dev
e170602 Merge "msm: camera: reqmgr: Correct log of applied req id" into camera-kernel.lnx.dev
7616629 Merge "msm: camera: isp: Add debugfs mask to print SFE Cache info" into camera-kernel.lnx.dev

Change-Id: I6fe64bc07acd6067d659ce8a4336c38a05905fc7
Signed-off-by: Savita Patted <quic_spatted@quicinc.com>
2022-06-01 19:36:19 -07:00
Sokchetra Eung
b646e60a24 msm: camera: icp: Add unified dev type field in icp ctx struct
Add a unified dev type field in icp hw ctx struct to store unified
dev type value. The unified dev type is for logical usage in kernel.
UMD sent dev type has more variations (IPE/IPE_RT/IPE_SEMI_RT...)
It's used for debugging/printing.

CRs-Fixed: 3204811
Change-Id: Ic6c93fc6238aab7fe56d6beab55f4bcfcd1f81fb
Signed-off-by: Sokchetra Eung <quic_eung@quicinc.com>
2022-06-01 18:42:22 -07:00
Karthik Anantha Ram
c4a442ddad msm: camera: csiphy: Add support to handle new cmd buffers
The change adds support to handle new cmd buffer blobs.
Add support for CDR sweep. Also add support to read/write
data rate aux mask for a given phy from a provided output buffer.

CRs-Fixed: 3186732
Change-Id: Id18715c6778dfb1a1586e7297da70f36587f13d9
Signed-off-by: Karthik Anantha Ram <quic_kartanan@quicinc.com>
2022-06-01 18:42:10 -07:00
Karthik Anantha Ram
480abd8930 msm: camera: isp: Update condition check for SFE pix port acquire
Only for FE use-cases, allow SFE pix ports to be acquired when the
input resource is RDI0-2.

CRs-Fixed: 3207073
Change-Id: Ic190d6ba1fb8cb63db5fef63bda05a7cac9c0c51
Signed-off-by: Karthik Anantha Ram <quic_kartanan@quicinc.com>
2022-06-01 18:41:57 -07:00
Karthik Anantha Ram
d3d9f214b6 msm: camera: uapi: Add UAPI for new CPHY cmd buffers
Add new cmd buffer types to support CDR sweep
and auxiliary settings update.

CRs-Fixed: 3186732
Change-Id: I46924d188521617d6b179cf6f89311d9f4179bf2
Signed-off-by: Karthik Anantha Ram <quic_kartanan@quicinc.com>
2022-06-01 18:40:49 -07:00
Jigar Agrawal
f29c2857d0 msm: camera: cdm: Fix the memory handle passed to presil API
Fix the memory handled passed to the Presil API while
submitting the gen irq BL.

CRs-Fixed: 3185684
Change-Id: Icbc702c70cae5e301d3f646f903fc761bb0bc6e5
Signed-off-by: Jigar Agrawal <quic_jigar@quicinc.com>
2022-06-01 18:40:16 -07:00
Chandan Kumar Jha
e38933c9bf msm: camera: isp: Update buf-done IRQ handler for CSID-Lite 880
Update buf-done irq handler for CSID-Lite 880.

CRs-Fixed: 3168727
Change-Id: I69661d869be5ed79e9d0d23ffee6563c565feaad
Signed-off-by: Chandan Kumar Jha <quic_cjha@quicinc.com>
2022-06-01 18:39:28 -07:00
Chandan Kumar Jha
b06504ab4b msm: camera: isp: Add logic to support 3rd SFE in CSID
Add input core selection logic to support 3rd SFE in CSID.

CRs-Fixed: 3168727
Change-Id: If208a589848f0444e33511ac6831babf3256dab6
Signed-off-by: Chandan Kumar Jha <quic_cjha@quicinc.com>
2022-06-01 18:39:16 -07:00
Depeng Shao
94ac5049af msm: camera: isp: Pack the data for plain128
If csid doesn't give unpacked msb out, packing needs
to be done at csid side for plain128 in order to
enable RPP subpath.

CRs-Fixed: 3198208
Change-Id: I9b228382804a9eb41d45b6d7bf6433bcfd4b4e40
Signed-off-by: Depeng Shao <quic_depengs@quicinc.com>
2022-06-01 18:37:56 -07:00
Mukund Madhusudan Atre
5a407ddbd7 msm: camera: isp: Fix IRQ register sets for csid lite
Currently, the IRQ reg set is not having an empty RDI4 entry,
causing an out of bounds access during probe. Add empty
entry to reg set in headers to enable correct irq register
info to be retrieved in driver.

CRs-Fixed: 3198089
Change-Id: If963ed4295c902651d3d62158cc6c0546cd8e470
Signed-off-by: Mukund Madhusudan Atre <quic_matre@quicinc.com>
2022-06-01 18:37:37 -07:00
Gaurav Jindal
19fab831ca msm: camera: isp: Add irq index to RDI resource
While printing the resource name in path irq handler, RDI resource
is pointing to TOP Irq index. This prints the wrong IRQ tag.
This commit fixed the issue by assinging correct IRQ index to RDI
resource.

CRs-Fixed: 3197257
Change-Id: I25db915ff427838ae429a86a698424314c3264f6
Signed-off-by: Gaurav Jindal <quic_gjindal@quicinc.com>
2022-06-01 18:37:19 -07:00
Gaurav Jindal
73ee3cd098 msm: camera: isp: Add debugfs mask to print SFE Cache info
This commit adds debugfs mask(Bit 30) to print SFE Cache
information. This helps to check the SCID settings on SFE
bus read and write master.

Change-Id: I75355bbc167763a09442114f43b23dd1b82e0960
CRs-Fixed: 3197257
Signed-off-by: Gaurav Jindal <quic_gjindal@quicinc.com>
2022-06-01 18:36:53 -07:00
Stark Lin
98375cb446 msm: camera: reqmgr: Correct log of applied req id
Correct log of applied req id in case the highest pd dev ranks last in
send sequence.

CRs-Fixed: 3198237
Change-Id: I5b12828e4dbf03c01b0b06bbcd21f384b7373333
Signed-off-by: Stark Lin <quic_starlin@quicinc.com>
2022-06-01 18:36:16 -07:00
Savita Patted
81435e56d6 Snap for drop 05/26/2022 mainline 777 LA.VENDOR.13.2.0.AU221
camera-kernel:
7702c8f Merge "msm: camera: memmgr: Avoid TOCTOU buffer access during multiple use of same fd" into camera-kernel.lnx.dev
56c738e Merge "msm: camera: sensor: Fix the sensor code for missing symbol" into camera-kernel.lnx.dev

Change-Id: I79b3a6dd994050a49a978abb7e881ba2f8b5bc3e
Signed-off-by: Savita Patted <quic_spatted@quicinc.com>
2022-05-26 19:06:11 -07:00
Yash Upadhyay
86a7e8992a msm: camera: memmgr: Avoid TOCTOU buffer access during multiple use of same fd
Fd is a user-accessible value, referring it multiple times
leads to TOCTOU issues. Dma_buf can be freed after the 1st
use of fd and userspace can create another dma_buf but with
same fd. In such scenario, during 2nd use of fd, we may get
a different dma_buf with different length. To avoid this, we
can use same dma_buf instead of retrieving it twice using same
fd. In this change FD is accessed only once in syscall.

CRs-Fixed: 3159446
Change-Id: I00eb6dd3d798165f5c6c0bd59feabe80a68592b1
Signed-off-by: Yash Upadhyay <quic_yupadhya@quicinc.com>
2022-05-26 15:36:12 -07:00
Wasim Khan
bd883bdd5d msm: camera: sensor: Fix the sensor code for missing symbol
Fix the sensor code failure for i3cdev_to_dev API
which is missing the symbol in the kernel allow list.

CRs-Fixed: 3200508
Change-Id: I2ffc28d20e5e0e1e454e187299f61c983801d05c
Signed-off-by: Jigar Agrawal <quic_jigar@quicinc.com>
Signed-off-by: Wasim Khan <quic_wasikhan@quicinc.com>
2022-05-25 16:11:34 -07:00
Wasim Khan
e66155bc96 Merge changes I6682d41e,Ifc57987a into camera-kernel.lnx.6.0
* changes:
  Snap for drop 05/23/2022 mainline 776 LA.VENDOR.13.2.0.AU221
  msm: camera: common: Add support for variable fps feature
2022-05-25 12:45:45 -07:00
Abhijit Trivedi
e1dbbcb3fe m: camera: sensor: Fix the sensor code for missing symbol
Fix the sensor code failure for i3cdev_to_dev API
which is missing the symbol in the kernel allow list.
CRs-Fixed: 3200508
Change-Id: I99f1ae98e322ae4116cccb9cc7ba42fcc7b8a89a
Signed-off-by: Jigar Agrawal <quic_jigar@quicinc.com>
Signed-off-by: Depeng Shao <quic_depengs@quicinc.com>
Signed-off-by: Abhijit Trivedi <quic_abhijitt@quicinc.com>
2022-05-24 17:17:25 -07:00
Savita Patted
0faabede40 Snap for drop 05/23/2022 mainline 776 LA.VENDOR.13.2.0.AU221
camera-kernel:
30618c2 Merge "msm: camera: common: Add support for variable fps feature" into camera-kernel.lnx.dev

Change-Id: I6682d41e71ac8a95a5e89b27b8674df2a61a24a4
Signed-off-by: Savita Patted <quic_spatted@quicinc.com>
2022-05-23 23:06:16 -07:00
Depeng Shao
34bf7c2b95 msm: camera: common: Add support for variable fps feature
This change adds supoort for variable fps feature, this
feature needs to stream off the sensor at EOF. So, this
change sends an EOF event to sensor to do the streamimg
off. Since sensor only outputs one frame every round, so
we need to apply the IFE packet to HW immediately, then
the every frame will be valid frame.

CRs-Fixed: 3178221
Change-Id: Ifc57987aac11c9655edd979734e5568c19262571
Signed-off-by: Wang Kan <quic_wkan@quicinc.com>
Signed-off-by: Depeng Shao <quic_depengs@quicinc.com>
2022-05-23 19:36:12 -07:00
Savita Patted
f5d587f8b0 Snap for drop 05/19/2022 mainline 775 LA.VENDOR.13.2.0.AU221
camera-kernel:
6e71f8d Merge "msm: camera: isp: Differentiate between page fault and bus overflow" into camera-kernel.lnx.dev
47c4c02 Merge "msm: camera: icp: Change default clock voting level to SVS" into camera-kernel.lnx.dev

Change-Id: I5b1ef3d4121eafc7afd71048830d299b5e241a2c
Signed-off-by: Savita Patted <quic_spatted@quicinc.com>
2022-05-19 15:36:12 -07:00
Chandan Kumar Jha
c29b985223 msm: camera: icp: Change default clock voting level to SVS
Default clock rate is hardcoded to 400 MHZ.
This change will fill svs clock level from dtsi dynamically.

CRs-Fixed: 3189984
Change-Id: I3ef5a0d119bc4ff97f72aa0389e83b540307993d
Signed-off-by: Chandan Kumar Jha <quic_cjha@quicinc.com>
2022-05-19 14:06:26 -07:00
Karthik Anantha Ram
6099cf407d msm: camera: isp: Differentiate between page fault and bus overflow
When a page fault is encountered by IFE/SFE, as a side affect
a bus overflow is also seen, which results in CSID overflow.
In this change, CSID driver registers a callback with CPAS,
and on camnoc slave error irq notification CSID will
skip processing the overflow. This will avoid resetting
the SFE/IFE pipeline and all necessary logs for PF debug
will be available. With this change kernel will post only
one error event to userland for PF as opposed to two
for PF and bus overflow.

CRs-Fixed: 3175797
Change-Id: I9789314452075e2b943cf08b19002a645eafb16b
Signed-off-by: Karthik Anantha Ram <quic_kartanan@quicinc.com>
2022-05-19 14:06:17 -07:00
Savita Patted
6a670bbec2 Snap for drop 05/17/2022 mainline 774 LA.VENDOR.13.2.0.AU215
camera-kernel:
1b2d3fa Merge "msm: camera: sensor: Add i3c bus support" into camera-kernel.lnx.dev
076c4e8 Merge "msm: camera: cdm: check irq status on hang detection" into camera-kernel.lnx.dev

Change-Id: I2204cb4fcfc6b174f4d33f625b1aa66ab8a4c26d
Signed-off-by: Savita Patted <quic_spatted@quicinc.com>
2022-05-17 17:36:11 -07:00
Jigar Agrawal
609d228234 msm: camera: sensor: Add i3c bus support
Add i3c bus support for qup i3c based
I3C target.

CRs-Fixed: 3169593
Change-Id: I0209f799d800daf9afe7a846310a3d4f4f2ee420
Signed-off-by: Jigarkumar Zala <quic_jzala@quicinc.com>
Signed-off-by: Jigar Agrawal <quic_jigar@quicinc.com>
2022-05-17 15:36:30 -07:00
Shardul Bankar
17e95f5f2f msm: camera: cdm: check irq status on hang detection
Check IRQ status on hang detection; if the inline IRQ
is set then the cdm has triggered IRQ but there is a
workqueue scheduling delay which is causing the cdm
config timeout. To prevent the timeout due to
scheduling check the work record and irq status.

Change-Id: Id3d224d6393b69638b27c82ebf0933a6a3dce231
CRs-Fixed: 3163828
Signed-off-by: Shardul Bankar <quic_sharbank@quicinc.com>
2022-05-17 15:36:18 -07:00
Savita Patted
bc0179e7ce Snap for drop 05/11/2022 mainline 771 LA.VENDOR.13.2.0.AU202
camera-kernel:
bc23703 Merge "msm: camera: smmu: Add debugfs to invoke panic on Page Fault" into camera-kernel.lnx.dev
f8db56a Merge "msm: camera: isp: Improve support for bus read/write error debug" into camera-kernel.lnx.dev
df4d890 Merge "msm: camera: common: Fix TFE and OPE compilation errors" into camera-kernel.lnx.dev

Change-Id: I035a9fcbde764257e908f045b0542b27ed0af00e
Signed-off-by: Savita Patted <quic_spatted@quicinc.com>
2022-05-11 19:36:10 -07:00
Sokchetra Eung
1b0e011bf3 msm: camera: smmu: Add debugfs to invoke panic on Page Fault
Add debugfs to invoke kernel panic on Page Fault for specified
context bank index upon encountering Page Fault on non-fatal
property.

CRs-Fixed: 3190298
Change-Id: I0b68d70ec893c93d1ba0df4ee6b6484fba8e31d1
Signed-off-by: Sokchetra Eung <quic_eung@quicinc.com>
2022-05-11 18:39:44 -07:00
Sokchetra Eung
ed138ccd45 msm: camera: common: Fix TFE and OPE compilation errors
Fix syntactical errors that resulted in failed compilation
for TFE and OPE.

CRs-Fixed: 3179075
Change-Id: Iec4dc104160651fb46b18be17a556356dce3b3c0
Signed-off-by: Sokchetra Eung <quic_eung@quicinc.com>
2022-05-11 18:39:35 -07:00
Sokchetra Eung
2928607744 msm: camera: isp: Improve support for bus read/write error debug
Add support for new bus rd ccif violation on SFE v880. Add bus rd
constraint violation description and infrastructure to print the
description. Update constraint violations desc for bus wr on SFE
v880 header. Move the irq err mask to the headers, this way the
mask will be dependent on the error bits for a given target. Add
cons_chk_en_avail to indicate if constraint checker needs to be
activated. Cons checker needs to be enabled on Lanai to get cons
violation irq. Add support to skip false alert of constraint
violation of bus write on image address unalign and image width
unalign error bits.

Move macros for bus rd RUP and BUF done to bus_rd.h file.

CRs-Fixed: 3186604
Change-Id: Ifa48ca8de7666a044e9c9b3641de0915b6f16587
Signed-off-by: Sokchetra Eung <quic_eung@quicinc.com>
2022-05-11 18:36:14 -07:00
Savita Patted
bb5f1e99fb Snap for drop 05/09/2022 mainline 770 LA.VENDOR.13.2.0.AU202
camera-kernel:
a88c309 Merge "msm: camera: isp: Add support for CSID and CSID-Lite 880" into camera-kernel.lnx.dev
f0a708b Merge "msm: camera: csiphy: Add new register param for 2.1.2/2.2 header" into camera-kernel.lnx.dev
97e0c0f Merge "msm: camera: uapi: Add support for using dma fences" into camera-kernel.lnx.dev
6db4344 Merge "msm: camera: smmu: Populate fault properties for CBs" into camera-kernel.lnx.dev

Change-Id: I44a5c1864aa4046c115664c699f7992e4ece125e
Signed-off-by: Savita Patted <quic_spatted@quicinc.com>
2022-05-09 22:36:17 -07:00
Chandan Kumar Jha
1d12a01d8e msm: camera: isp: Add support for CSID and CSID-Lite 880
Add support for CSID and CSID-Lite 880. Register header files are updated.

CRs-Fixed: 3168727
Change-Id: Ic8b0a390abc57c169be090d3f222afeb551d30f0
Signed-off-by: Chandan Kumar Jha <quic_cjha@quicinc.com>
2022-05-09 20:06:57 -07:00
Karthik Anantha Ram
1729fa8da9 msm: camera: csiphy: Add new register param for 2.1.2/2.2 header
Add new type for CDR register settings for 2.1.2/2.2 header.

CRs-Fixed: 3186732
Change-Id: I7bb4feef3da9365b2a1723b0c8d0a318fd1b5b9c
Signed-off-by: Karthik Anantha Ram <quic_kartanan@quicinc.com>
2022-05-09 20:06:46 -07:00
Karthik Anantha Ram
fa1a89d565 msm: camera: smmu: Populate fault properties for CBs
Populate fault properties for all the context banks from the
device tree. If the CB has marked faults as non-fatal, return
success to iommu fault handler. This will avoid SMMU from
further logging debug info, and retrying the faulted transaction
again with any different settings, which could potentially
lead to further fault IRQs being triggered.

CRs-Fixed: 3175797
Change-Id: I5624c77bc4205ee916618e32c7595bc5e886502a
Signed-off-by: Karthik Anantha Ram <quic_kartanan@quicinc.com>
2022-05-09 20:06:34 -07:00
Karthik Anantha Ram
6f3469956d msm: camera: uapi: Add support for using dma fences
The change adds infrastructure to perform different operations
such as create/import/release etc. on different types of
fences [sync/dma/synx]. The change also adds provision to
process fences in a batch.

CRs-Fixed: 3179072
Change-Id: Icbddb0ac8cd879f81ff58accdae6d51c35a316b7
Signed-off-by: Karthik Anantha Ram <quic_kartanan@quicinc.com>
2022-05-09 20:06:12 -07:00
Savita Patted
d0c4727052 CAMX: Snap for drop 05/05/2022 mainline 769 LA.VENDOR.13.2.0.AU202
camera-kernel:
ed9ba4d Merge "msm: camera: csid: Get group1 vcdt value from correct register" into camera-kernel.lnx.dev
bd8258c Merge "msm: camera: cpas: Enable camnoc slave error irq" into camera-kernel.lnx.dev

Change-Id: I4e9d4bae30e11c3b4fd4c44e478ed6f10d530e12
Signed-off-by: Savita Patted <quic_spatted@quicinc.com>
2022-05-05 12:36:12 -07:00
Karthik Anantha Ram
0b86e7f627 msm: camera: cpas: Enable camnoc slave error irq
Enable camnoc slave error irq to identify address decode
errors. Also change the camnoc irq clear logic. The change
also avoids dumping error logger info. Also remove
any error logging in client callbacks for slave error
if the client intends to not handle it.

CRs-Fixed: 3175797
Change-Id: Iec2c0c3b50a52a4c61ce2d5f6f263327625a8267
Signed-off-by: Karthik Anantha Ram <quic_kartanan@quicinc.com>
2022-05-05 08:36:23 -07:00
chengxue
af740ba999 msm: camera: csid: Get group1 vcdt value from correct register
The group1 vcdt and decode format value should be got from multi
vcdt cfg0 register address.

CRs-Fixed: 3183661
Change-Id: I155ab823e3d90513c49614802b3f9fabe8fda73c
Signed-off-by: chengxue <quic_chengxue@quicinc.com>
2022-05-05 08:36:13 -07:00
Savita Patted
df79a65c40 CAMX: Snap for drop 05/02/2022 mainline 768 LA.VENDOR.13.2.0.AU202
camera-kernel:
dbb4ca6 Merge "msm: camera: isp: LLCC changes for SFE" into camera-kernel.lnx.dev
ccaaf35 Merge "msm: camera: isp: Add lazy clear register sanitization" into camera-kernel.lnx.dev
9410b3a Merge "msm: camera: isp: Skip writes to clean IRQ clear registers" into camera-kernel.lnx.dev
90ba22e Merge "msm: camera: isp: Skip notification to user space" into camera-kernel.lnx.dev

Change-Id: Ieb4014b20b74ff25ea6da0585722a52d60dadcfb
Signed-off-by: Savita Patted <quic_spatted@quicinc.com>
2022-05-02 23:36:12 -07:00
Gaurav Jindal
315f8d439d msm: camera: isp: LLCC changes for SFE
For Kalama, Low level cache controller can be used
for Long exposures as well. To support this, cache
can be shared among SFEs and a single SFE needs to
toggle between the cache IDs to keep the caches
clean.
This commit adds changes to support above requirements.

Change-Id: I9dadf4655db946254be62116b45e81abdb979b3f
CRs-Fixed: 3153295
Signed-off-by: Gaurav Jindal <quic_gjindal@quicinc.com>
2022-05-02 20:06:30 -07:00