Reset the wb crop configs from hardware, while disabling
concurrent writeback. This avoids stale configs which
affects the subsequent writeback session.
Change-Id: I4927effd0650bcdca2852a5d72c3e5478683a90f
Signed-off-by: Veera Sundaram Sankaran <quic_veeras@quicinc.com>
Add the missing concurrent writeback output resolution setting,
when destination scaler is enabled with demura tap point.
Additionally, move the dnsc_blur enabled check to the top as
that takes precedence.
Change-Id: Id0e851703ce6e1d8b7caffcdda69d7757222fc59
Signed-off-by: Veera Sundaram Sankaran <quic_veeras@quicinc.com>
Add check to validate the writeback roi against mode width & height.
When dnsc_blur, destination_scaler, cwb features are not enabled,
the roi should match with mode width & height.
Additionally, add error log for case where dnsc_blur is set without
the HW block reservation.
Change-Id: I9199d5b127eed892ea134f830ecd6f690cb70f77
Signed-off-by: Veera Sundaram Sankaran <quic_veeras@quicinc.com>
When cwb is triggered on built-in display secondary display
with (1,1,1) topology, improper dcwb_idx value is passed
to pp_dither and CTL registers. This change populates proper
dcwb_idx during pp block dt parsing and passes the same for
programming.
Change-Id: I543eede6f5fd9c2c80799503e3639ea9e89058ca
Signed-off-by: Mahadevan <quic_mahap@quicinc.com>
Add bound check for number of dnsc_blur blocks, while parsing from
device tree. Fix out of bound access while setting the llcc_active
during system cache disable case in writeback.
Change-Id: I7e604db5ebfaa6e8b6f066e0f6efb76e7d78e604
Signed-off-by: Veera Sundaram Sankaran <quic_veeras@quicinc.com>
Add crtc checks to ensure the crtc width is always even number,
so there is no loss while dividing by num_mixers. Add checks in
dnsc_blur to ensure the src is always greater than the dest.
Change-Id: I876f19aa20857dc9ed2649c9cb7569348e7d5fd3
Signed-off-by: Veera Sundaram Sankaran <quic_veeras@quicinc.com>
Toggle LLCC SCID for each consecutive LLCC write
operations and force read allocate when NSE bit
set.
Change-Id: Ice473cb126b627056b7346f142bc84c120e05f0b
Signed-off-by: Amine Najahi <quic_anajahi@quicinc.com>
Avoid various possible nullptr dereferences.
Addresses various issues highlighted by static analysis.
Change-Id: I36d34d610b37bf2799a7e34cd1de8b909b5c0ae4
Signed-off-by: Nisarg Bhavsar <quic_bhavsar@quicinc.com>
Currently only LLCC_DISP SCID is used to read and write to
system cache during static display use case.
This changes adds SCID LLCC_DISP_1 to allow each SCID to
have a dedicated function (read/write).
Change-Id: I5604ec1183d99a8492b005ec06ac94e5db60b5f7
Signed-off-by: Amine Najahi <quic_anajahi@quicinc.com>
Currently a boolean variable is used to track if the system
cache feature is enable for a particular SCID.
This change converts it to use a feature bit instead.
Change-Id: I8461fd9fb837b871c4ac5c67a9ab7613aadea7bb
Signed-off-by: Amine Najahi <quic_anajahi@quicinc.com>
Static display usecase uses concurrent writeback path to compose the
layers and updates the primary display in the next cycle with cwb
output. Use LLCC_DISP scid for system cache in cwb path, to keep it
in sync with the legacy static display path. Use LLCC_DISP_WB for
the offline-wb path. Expose the writeback connector cache property
only when either or both the cache types are enabled.
Change-Id: I8ca4b14828a14ce0bde829136fb4baef272166aa
Signed-off-by: Veera Sundaram Sankaran <quic_veeras@quicinc.com>
Refactor the function '_sde_encoder_phys_wb_update_cwb_flush' to
reduce its complexity.
Change-Id: I91b5fd5409617d06c3c17799d6af128578c3ba16
Signed-off-by: Shamika Joshi <quic_shamjosh@quicinc.com>
Currently, driver enforces the allocated WB output buffer to be 256 bits
aligned in memory in order to optimize DDR access and meet maximum system
bandwidth requirements.
Since there are no functional failures with using a 256 bits unaligned
buffer, this change removes this unnecessary check.
Change-Id: I23476e8a28e970f2e1853bbcc0c1d1042d9fdfe2
Signed-off-by: Amine Najahi <quic_anajahi@quicinc.com>
This change avoids null pointer dereference in different APIs.
Change-Id: I01eba9d64fa4ba2fd81f7f39f586867e22d66771
Signed-off-by: Narendra Muppalla <quic_nmuppall@quicinc.com>
This changes takes pitches into account for alignment check
of destination writeback fb. As per HW recommendation
the stride needs to be a multiple of 256 bits.
Change-Id: Ib823a8d309f7ed579d701a4bf56772ce318fb1f5
Signed-off-by: Jayaprakash Madisetty <quic_jmadiset@quicinc.com>
* quic/display-kernel.lnx.5.10:
disp: msm: sde: avoid error during fal10_veto override enablement
disp: msm: update copyright description
disp: msm: sde: configure dest_scaler op_mode for two independent displays
disp: msm: dp: updated copyright set for 4nm target
Revert "disp: msm: sde: consider max of actual and default prefill lines"
disp: msm: sde: Reset backlight scale when HWC is stopped
disp: msm: dp: avoid duplicate read of link status
disp: msm: dsi: update vreg_ctrl settings for cape
disp: msm: fail commit if drm_gem_obj was found attached to a sec CB
disp: msm: dp: updated register values for 4nm target
disp: msm: sde: update framedata event handling
disp: msm: dsi: Add new phy comaptible string for cape
disp: msm: sde: software override for fal10 in cwb enable
disp: msm: update cleanup during bind failure in msm_drm_component_init
disp: msm: sde: dump user input_fence info on spec fence timeout
disp: msm: sde: add null pointer check for encoder current master
disp: msm: dsi: enable DMA start window scheduling for broadcast commands
disp: msm: sde: avoid alignment checks for linear formats
disp: msm: reset thread priority work on every new run
disp: msm: sde: send power on event for cont. splash
disp: msm: sde: always set CTL_x_UIDLE_ACTIVE register to "1"
disp: msm: use vzalloc for large allocations
disp: msm: sde: Add support to limit DSC size to 10k
disp: msm: sde: add tx wait during DMS for sim panel
disp: msm: dsi: add check for any queued DSI CMDs before clock force update
disp: msm: sde: correct pp block allocation during dcwb dither programming
disp: msm: sde: avoid setting of max vblank count
disp: msm: sde: add cached lut flag in sde plane
disp: msm: sde: avoid use after free in msm_lastclose
disp: msm: sde: update TEAR_SYNC_WRCOUNT register before vsync counter
disp: msm: dsi: Support uncompressed rgb101010 format
disp: msm: sde: update idle_pc_enabled flag for all encoders
disp: msm: sde: flush esd work before disabling the encoder
disp: msm: sde: allow qsync update along with modeset
disp: msm: dp: avoid dp sw reset on disconnect path
disp: msm: sde: consider max of actual and default prefill lines
disp: msm: ensure vbif debugbus not in use is disabled
disp: msm: sde: update cached encoder mask if required
disp: msm: sde: while timing engine enabling poll for active region
disp: msm: enable cache flag for dumb buffer
disp: msm: sde: disable ot limit for cwb
disp: msm: sde: avoid race condition at vm release
disp: msm: dsi: set qsync min fps list length to zero
disp: msm: sde: reset mixers in crtc when ctl datapath switches
disp: msm: sde: update vm state atomic check for non-primary usecases
disp: msm: sde: reset CTL_UIDLE_ACTIVE register only if uidle is disabled
Change-Id: If480e7f33743eb4788549f853ba05e744ecb38d3
Signed-off-by: Narendra Muppalla <quic_nmuppall@quicinc.com>
This change updates copyright description with correct
license marking as per the guidelines.
Change-Id: Ia74b721e78afcc7f8e88bcbccfcf15430111ec37
Signed-off-by: Yashwanth <quic_yvulapu@quicinc.com>
Use #if IS_ENABLED() instead of #ifdef for configurations as vendor module
guidelines.
Use #if IS_ENABLED(CONFIG_XXX) instead of #ifdef CONFIG_XXX to ensure that
the code inside the #if block continues to compile if the config changes
to a tristate config in the future.
The differences are as follows:
1.#if IS_ENABLED(CONFIG_XXX) evaluates to true when CONFIG_XXX is set to
module (=m) or built-in (=y).
2.#ifdef CONFIG_XXX evaluates to true when CONFIG_XXX is set to
built-in(=y) , but doesn't when CONFIG_XXX is set to module(=m).
Use this only when you're certain you want to do the same thing
when the config is set to module or is disabled.
Change-Id: Ia806b9b01ad8414d0e4de027a382cb68e7fb4a6a
Signed-off-by: GG Hou <quic_renjhou@quicinc.com>
This change avoids alignment condition check if the format is
linear because HW can fetch without any restrictions only in linear
usecase.
Change-Id: Ib823a8d309f7ed579d701a4bf56772ce318fb1f5
Signed-off-by: Jayaprakash Madisetty <quic_jmadiset@quicinc.com>
Update the cwb block offset and stride values for kalama
target in sde hw catalog. As part of the change, allow the
ctl wb-flush bit for cwb to be set based on the wb idx used.
Change-Id: Ibf7ccda88cbb47bddacf53b5af9841d381a4766c
Signed-off-by: Veera Sundaram Sankaran <quic_veeras@quicinc.com>
Add support to parse and configure QoS values for offline writeback.
Expose a writeback connector property to allow user-mode to set
the usage type of the writeback block - WFD, CWB, offline-WB.
Change-Id: I864f79c4896ec757ac2d8b0f57a6a5775d164f21
Signed-off-by: Veera Sundaram Sankaran <quic_veeras@quicinc.com>
Update the DT parsing logic to get danger/safe LUT values for
both portrait & landscape for all the usage types.
As part of the change, fix the correct CDP write setting for
CWB usecase.
Change-Id: I4fb6d17537de5df31c9b7f52983c0c3890265174
Signed-off-by: Veera Sundaram Sankaran <quic_veeras@quicinc.com>
Currently ot limits are being set for concurrent writeback,
which is not supported. This change adds a check to correctly
set wfd parameter while applying ot limit settings.
Change-Id: I87c1ca756c1714fec4466cd5a5a820ddf2519975
Signed-off-by: Nilaan Gunabalachandran <quic_ngunabal@quicinc.com>
Signed-off-by: Veera Sundaram Sankaran <quic_veeras@quicinc.com>
Currently ot limits are being set for concurrent writeback,
which is not supported. This change adds a check to correctly
set wfd parameter while applying ot limit settings.
Change-Id: I87c1ca756c1714fec4466cd5a5a820ddf2519975
Signed-off-by: Nilaan Gunabalachandran <quic_ngunabal@quicinc.com>
This change reinitializes the sde_crtc->mixers when CTL
datapath switch occurs during mode set and RM allocation
of CTL hw block is changed. This initialization is required
for CTL_LAYER programming to trigger on the new CTL allocated
from RM.
Issue case:
1. Primary Display is using CTL_0 and it is reserved.
2. Secondary Display is using CTL_1. On suspend, RM adds
CTL_1 into the free list.
3. External Display is powered on, RM allocates CTL_1 hw blk.
4. Secondary Display is powered on, RM allocated CTL_2 hw blk.
5. External Display is suspended/unplugged, RM adds CTL_1 into
the free list.
6. When any mode_set(say fps switch) occurs on secondary, RM
allocates new resources and CTL_1 is allocated.
sde_crtc->num_mixers is non zero, so all the layer programming
happens on CTL_2, but CTL_1_FLUSH bits are programmed causing
hw timeout issue.
Change-Id: I5f1f52b7673740c48b249ab4d36e80b7a1d3db96
Signed-off-by: Jayaprakash Madisetty <quic_jmadiset@quicinc.com>
Add encoder-id and wb-id in all the eventlogs, errors and debug
messages throughout writeback phys encoder to help in debugging.
Add traces to all the IRQs in writeback to track them efficiently.
Change-Id: I919e4d5054407ea5b01889dfd17c8cab6b40ee52
Signed-off-by: Veera Sundaram Sankaran <veeras@codeaurora.org>
Add downscale blur block validations in atomic_check phase of writeback
encoder. Downscale blur along with partial update is not supported.
NV12 output in WB is not supported with downscale blur as CDM block
usage is mutually exclusive with dsnc_blur. If destination scaler is
enabled, the ds src or dst should match with dnsc_blur src based on
the ds tap point chosen.
Change-Id: I1d643dc26738c0e77d8e9181b4c834693153209c
Signed-off-by: Veera Sundaram Sankaran <veeras@codeaurora.org>
Add changes to configure the downscale blur hardware block based on
the conifgs set by user-mode. Program the ctl's writeback flush and
active bits when dnsc_blur is enabled. Bind the pingpong block that
feeds pixels to dnsc_blur hw block. Disable the active bits and unbind
the pp block binding during wb disable.
Change-Id: I1961ab437e344b13d0c186c1675a5bf79b84ea74
Signed-off-by: Veera Sundaram Sankaran <veeras@codeaurora.org>
Add a cache_flag in msm_fb object to store the system cache state hints.
Writeback connector will store cache write hints if system cache write
is enabled while HW is writing into this buffer. Plane in the primary
display path, in a 2-pass composition strategy will use this cache hints
to enable the display HW to use system cache for reading the pixel data
from this buffer.
Change-Id: Iff92a453a36d4a60b5a0162832eebd5e8739b5c3
Signed-off-by: Veera Sundaram Sankaran <veeras@codeaurora.org>
Add a custom cache_enable property in writeback connector to allow
user-mode to control the cache setting on a frame basis. Configure
the hw and activate/deactivate the llcc based on the property. The
custom property is added based on the availability of the system
cache for writeback.
Change-Id: I812b31955eb36c75c33ac279b56502a13f7cdcbf
Signed-off-by: Veera Sundaram Sankaran <veeras@codeaurora.org>
Add support to read and clear the ubwc error status for wirteback.
Log the status during writeback timeout cases to help in debugging.
Change-Id: I11f3827d4a88565b81b21b651971cec55ba06298
Signed-off-by: Veera Sundaram Sankaran <veeras@codeaurora.org>
Add a writeback connector property EARLY-FENCE-LINE to give usermode
the control on when to trigger the retire fence. This option is useful
in 2-pass composition, where the writeback triggers the retire-fence
early based on the prog-line which allows primary to start the fetch
before wb transaction is fully completed. This helps to keep the clks
and bw low. WB hardware generates the line-ptr-irq when wb output reaches
the configured prog-line. Retire fence is triggered based on the irq by
default and wb-done handles for cases where line-ptr-irq is missed.
Change-Id: I20867979693dc3447f77da24cd7e88305947fb6d
Signed-off-by: Veera Sundaram Sankaran <veeras@codeaurora.org>
From MDSS 9.0, writeback supports a programmable lineptr support, which
generates an interrupt when the configured writeback output height is
reached. Add software support to configure the prog_line and to process
the interrupt.
Change-Id: I3293ad2984c51417e4691c5b11e9c9a010067e1c
Signed-off-by: Veera Sundaram Sankaran <veeras@codeaurora.org>
Currently, writeback frame-triggers are serialized by default. Add
logic to support the different frame-trigger modes which can be set
through the connector property or encoder debugfs node.
- default: waits for frame(N-1) completion (wb-done-irq) before
configuring current frame(N) and releases the commit-thread on
frame-start (ctl-start-irq)
- posted-start: no previous frame(N-1) completion wait. Configures
frame(N) and releases the commit-thread on frame-start (ctl-start-irq)
- serialize: no previous frame(N-1) completion wait. Configures frame(N)
and releases the commit-thread on frame(N) completion (wb-done-irq)
(wb-done-irq) before configuring the next frame.
Restrict wb posted-start support only for MDSS 9.x+ targets, with older
targets defaulted to default-mode.
Change-Id: Id441378fd79ecbfcfb820da1ff23b14ccfd8e798
Signed-off-by: Veera Sundaram Sankaran <veeras@codeaurora.org>
Add ctl-start-irq support which serves as an indication the
HW read the current frame's configuration and software is free
to program the next frame.
Change-Id: I9f6b180cf9e47894ca81d2d4b6ac724827d1368c
Signed-off-by: Veera Sundaram Sankaran <veeras@codeaurora.org>
Currently, cwb disable path issues a cleanup flush & waits for the
commit-done. Wait for the tx-done to ensure the transfer is complete.
Change-Id: I509711c157f1d6646646ad96ed140d6bc76d2dba
Signed-off-by: Veera Sundaram Sankaran <veeras@codeaurora.org>
Avoid drm vblank on/off for virtual displays to allow drm framework to
ignore the vblank requests. Vblanks are unnecessary for writeback as it
is triggered based on the frame-updates and not on any defined interval.
In addition, avoid vblank callback registration for concurrent writeback
encoder.
Change-Id: I205734e2e3076469dc7f775566cf5e104bac4082
Signed-off-by: Veera Sundaram Sankaran <veeras@codeaurora.org>
Remove the hw feature flags that are set by default for writeback as
it does not add any value. As part of the change, remove the unused
wb register offsets.
Change-Id: I04376242e764d8d0a1edb763c9f799d7ae5447ac
Signed-off-by: Veera Sundaram Sankaran <veeras@codeaurora.org>
Remove the writeback kickoff_count/frame_count & start/end time
logging. These are redundant counters used for debug purpose. The
pending_retire_fence_cnt and event-logs timestamp can be used for
this purpose. Remove the bypass_irqreg flag as well as its not used.
Change-Id: I1644325afc214f75c76baad615da90c8114836cc
Signed-off-by: Veera Sundaram Sankaran <veeras@codeaurora.org>
The sde_hw_blk was meant to be a generic base object for all
SDE HW blocks, however, it enforces using a common set of ops
which is not practical when blocks have different capabilities.
Since this object was never used as intended and is not doing
anything functional today, remove the dead weight.
Change-Id: If76006c1ae5c62e8d7d77b100837dbaf6c661bd3
Signed-off-by: Steve Cohen <quic_cohens@quicinc.com>
Move all the individual boolean flags from HW catalog into a
"features" bitmap. These flags are used to specify support of
various target specific features.
Change-Id: I2334b3b873f3737f91bbae4ef576408247710156
Signed-off-by: Steve Cohen <quic_cohens@quicinc.com>
Current timeout values in sde driver for vblank, kickoff and
frame complete timeouts are fixed and can be much lower than
a vsync incase of low refresh rate display. Compute timeouts
based on refresh rate for low refresh rate displays.
Change-Id: I9dda41feb15446de7451824e185321de421ad575
Signed-off-by: Prabhanjan Kandula <pkandula@codeaurora.org>
