Soc level exception descriptors limit is sent from FW in WMI service
ready TLV. Using that to check for exception packets limit
Change-Id: I99d20ecbb6a5bfd61b5a8a205775d34749eae880
Add support for processing the start scan response
WMI event. FW provides the necessary information to
segregate FFT bins to pri80, 5 MHz and sec80 in
160/165 MHz. Also, cfreq2 and the channel width is
provided to FW via WMI command.
CRs-Fixed: 2672081
Change-Id: I666b6c18a63d5d01117aa9cbd611691c6f8b2793
In some scenarios, where cfr data is being captured
for maximum supported bandwidth case, memory allocated
in case of streamfs for all 255 buffers is not enough.
Corrections are made for maximum capture length.
Maximum capture length for a single CFR capture should be
(max bandwidth case) 16240B (112 bytes(csi header)
+ 64 bytes(cfr header) + 16064 bytes(cfr payload))
Remove debug logs under spin lock
Change-Id: I7cdc25350f3d85ecb7d0d69431c3c66dbc9b2bed
CRs-Fixed: 2678750
It uses point to 16 bits variable as 32 bits pointer when setting ta
ra configurations to default. This causes memory access out of
bounds.
Change-Id: Ifa7adb0249cb23fdf71e53f04b92b62c1b215632
CRs-Fixed: 2677422
When user disables CFR through INI -
1. Skip CFR SRNG allocations
2. Skip WMI handler registrations for DBR/TX completion events
Change-Id: I4f397e35717dc492aea5af74b167c1111cbc16a9
CRs-Fixed: 2671611
Some targets have a single synthesizer and it allows
a single Spectral detector to scan in 160 MHz /165 MHz.
Enable Agile Spectral scanning in 160 MHz / 165 MHz for
such targets. Agile creq2 will be populated in the WMI
command after WMI interface changes are merged.
CRs-Fixed: 2648480
Change-Id: I8522cbeeab29ac41479e3041eea376b081c0758a
An extension of preCAC feature is Rolling CAC. The distinct difference
between these features is that the FW runs the off channel CAC
timer for a "finite" time for preCAC and runs the timer for "infinite"
time on an off channel. Hence the infrastructure built for
preCAC feature is being modified to accommodate RCAC feature as well.
Following are the modifications done:
1. Add an enum to represent various off-channel CAC modes.
2. Remove the 'static' declaration of few APIS so as to re-use them.
3. Add 'dfs_rcac_ch_params' to DFS PDEV object to store the RCAC
channel params so as to use the channel params after radar detect.
4. Rename DFS APIs to match its functionality.
CRs-Fixed: 2670419
Change-Id: I0bf0d33955706941cffb4e9cf6fcebfb465a6c74
The number of rx chains in target is different to the value in host
side, this change converts the value from target to host.
Change-Id: I86044bf12e958da312924827a3fd1e6799beaf41
CRs-Fixed: 2668403
In target_if_vdev_mgr_rsp_timer_cb host send failure resp to vdev mgr
and then trigger recovery. Thus the next cmd can go to firmware before
recovery and this result in firmware states getting cleaned up and
this it's difficult to get the info from firmware for the timeout.
Thus trigger recovery before sending failure resp for vdev cmd timeout.
Change-Id: I645837e754750969744016f2da78c174308acfad
CRs-Fixed: 2665947
FW requires to receive WMI_CFR_CAPTURE_FILTER_CMDID with the pdev id
which is based on the working band. It requires srng id when looking
up or releasing DMA address. So add this change to check working band
and set mac id. This is MCL only change.
Change-Id: I763a25b4989607128b2b4c75186eb5bdcd204077
CRs-Fixed: 2641268
CFR uses the number of chainmask and bandwidth from DMA and updates to
userspace.
Change-Id: I8f54cdbfdf77d39f9862848d3cacb61eb4924a05
CRs-Fixed: 2644015
Add chip type for QCA6490, and CFR component will indicate chip type
to user space.
Change-Id: Ia3e95e06c8cc86bc30b81906f62f3821606a38f7
CRs-Fixed: 2659553
Populate number of Spectral detectors per BW in the
Spectral capability vendor command response.
CRs-Fixed: 2659587
Change-Id: I2eba5df02a5f70556d65e689aece1f0fbd8bba93
1. MAC does not really consider the expect TA and the
expect RA when the expect TA mask and expect RA mask is 0.
Basically, it checks for the subtype, bandwidth and NSS
as the filter criteria.
2. In the other scenario, if the RA matches with expect
RA and TA matches with expect TA then it does not really
consider the expect TA MASK and expect RA MASK.
With the current default config, since the expect address
mask is 00:00:00:00:00:00 it falls under case 1 and it is
written based on the MAC recipe.
But actual MAC logic is different from what is mentioned
in the recipe. MAC works on below logic:
TA & TA MASK = Expect TA & expect TA mask
RA & RA MASK = Expect RA & expect RA mask
As an additional precaution, we need to modify default
subtype as 0 so that if user enables any group by mistake
and does not give any input for the other RCC
configurations, we can block the RCC to capture CFR data.
Change-Id: I759e8812e4ef0e77f773d0d445134e62d9e8a753
CRs-Fixed: 2649714
Protect access to cfr lookup table, since error handling
mechanism attempts to cleanup CFR entries in timer context,
this leads to contention between bottom-half and timer.
Change-Id: I32a095fc82545ab117ab43a81ef8a3a5602741fc
CRs-Fixed: 2649714
1. Clear cfr_timer_enable flag during wifi down
2. Similar to one-shot capture, report RSSI in metadata for RCC.
Convert SNR in rxtlv to RSSI.
Change-Id: I1802ea25b306faf06be52da60edb5050ff1bea9c
CRs-Fixed: 2649714
TA retrieved from freeze TLV was being over-written by macaddr
from AST search during RXTLV processing.
MACADDR from AST search is essential only for MU PPDUs.
Change-Id: I1a7c46dd11b6cae6049ae70046af849228ba3b47
CRs-Fixed: 2649714
This mode is supported through hw_mode_id 7. A special mode for
IPQ8074 platform alone to bring up single pdev alone on 2G mode.
FW would advertise the mode 7 support through the WMI service
ready message and this mode will be the default mode for AP-HK10 alone.
Added new APIs in tgt_reg to get pdev_id from phy_id and vice versa.
Fixed all places where pdev_id is used to acces psoc regulatory params
and converted them into use phy_id
Change-Id: I14920627f5e4ddafcc37440fa3281150b65ff04f
CRs-fixed: 2653042
This mode is supported through hw_mode_id 7. A special mode for
IPQ8074 platform alone to bring up single pdev alone on 2G mode.
FW would advertise the mode 7 support through the WMI service
ready message and this mode will be the default mode for AP-HK10 alone.
Added a function to update the svc_id mappings for this mode as FW
requires WMI commands to be received through CE 7 for this mode.
Also adjusted the preferred mode precedence to give high precedence
to mode 7.
Change-Id: Id637c59e9528779e38737b7d74b000abf2e9db9d
In function 'target_if_vdev_mgr_multi_vdev_restart_get_ref',
'param->num_vdevs' may have chance to hold values larger than
WLAN_UMAC_PDEV_MAX_VDEVS which will result in OOB
when access array 'vdev_list' and array 'vdev_timer_started'.
This change add sanity check for 'param->num_vdevs'to avoid
OOB.
Change-Id: Iae431fdc7006fe8c80d15d400d8a0423e9284eb7
CRs-Fixed: 2644122
Skip the freeze data and capture type related processing
if freeze data is invalid.
CRs-Fixed: 2637644
Change-Id: I97da3b9dc0d655e47dec534d04e0897af57e33d8
The vdev_resp timer status is a persistent variable that is not reset
after a cycle of send/timeout is completed. This causes the old value to
induce faulty behavior for the next cycle.
For example in the case when vdev_start response is dropped, the timer
status is set to TIMEDOUT and this status remains as such for the next
time vdev_start response is received successfully. In this case, instead
of deleting the timer, as the status is a faulty TIMEOUT - no action is
taken. This causes the kernel to assert.
To resolve the above issue, reset the vdev_resp->timer_status after
stopping the timer.
Change-Id: I8632c117753a7bb1f041d00c4d9395163732f5d9
CRs-Fixed: 2654040
Initialize FFT bin boundaries of primary 80 MHz, 5 MHz
and secondary 80 MHz based on the relative position of
primary 80 MHz and secondary 80 MHz segment.
CRs-Fixed: 2653675
Change-Id: I0c9f1fbb55d1023b437c9787e753f3e154b5e08e
This is part of moving CFR component to hostcmn. Fix compilation
issues in this change.
Change-Id: Ia0a40da1e7e9201ffc5d1700cccea4181b358842
CRs-Fixed: 2637129
Since there are chip differences about channel frequency response. Add
files for QCA6490. This change also adds CFR configure file
Change-Id: Ib200affe4c68dac5535c4a3d65109072559161ff
CRs-Fixed: 2637134
Remove redundant data structure at wmi for vdev delete
response extraction, instead use mlme host data structure.
Change-Id: Iedb4280fb47d6567bc4d7b663ecd6af5e769ddfc
CRs-Fixed: 2641197
Presently, the reason codes for driver to trigger recovery on are
limited in their scope; most of the scenarios are not correctly
capture.
Add new reason codes to cover all the possible scenarios where the
driver has need to trigger recovery.
Change-Id: Ia257855bc30cd0bc7e81b9d0e21e4b84427d546b
CRs-Fixed: 2630951
To undergo self recovery, the driver uses qdf_trigger_self_recovery to
initiate the sequence. Currently, this framework is valid for only a
single psoc driver.
Extend this framework to include support for multiple psoc driver by
providing the psoc on which the recovery has to be undertaken.
Change-Id: I782b505c03819223a914dabe7673b369aa175b7c
CRs-Fixed: 2617707
Remove redundant data structure at wmi for vdev delete all peer
response extraction, instead use mlme host data structure.
Change-Id: Ice91f55e0bf8a23ea1a639a74f6a8ac3b2779a7b
CRs-Fixed: 2641261
Remove redundant data structure at wmi for vdev start
response extraction, instead use mlme host data structure.
Change-Id: Ie0d3e6fa0acb1fea8bc0f50095491dbe803f6810
CRs-Fixed: 2641085
The FW has updated the wmi command wmi_vdev_adfs_ch_cfg_cmd_fixed_param to
configure the Agile channel to enable the 165MHz channel as an Agile
channel by enabling 2 center frequencies.
For a 160MHz and 80MHz channel, the parameter center_freq1 will be the
center of the respective channels. For the 165MHz channel(restricted 80p80)
the parameter center_freq1 will be the center of the left 80MHz channel
(5690MHz) and the parameter center_freq2 will be the center of the right
80MHz channel (5775MHz)..
Update the ADFS parameters across UMAC, TARGET_IF and WMI layes to
update the Agile channel configuration command.
Change-Id: Ie480af9a6bb8dad87dd783ab06e17b449605b1c9
CRs-Fixed: 2642555
When argument '_len' is equal to 0 or less than 0, 'ascii'
array element will be used uninitialized. To fix this case,
add arguemnt sanity check before use.
Change-Id: I2e2a4c199fac72466f831bb4261a6a03ac116e11
CRs-Fixed: 2643354
When 'err' is null pointer, QDF_ASSERT(0) will not return
directly, then null pointer reference will occur. To fix this
issue, return failure when 'err' is null pointer.
Change-Id: I5912571795ae55c6729ae06d5e06496598c21fbb
CRs-Fixed: 2642581
Host driver processes cld80211 vendor sub command
CLD80211_VENDOR_SUB_CMD_GET_CAPS and respond with
NLA type CAP response
CRs-Fixed: 2595140
Change-Id: I5a6aa1fac537ca618404520b81c541a20dafd6fb
QCN9000 has the capability to Spectral scan in 165 MHz/
restricted 80p80 mode of operation. Host filters the FFT bins
corresponding to the additional 5 MHz and exports to the
user space via SMAP message.
CRs-Fixed: 2630960
Change-Id: I54ec36968cb0c8d5a68ff39029004b08936cb91e
Initial changes for ipq5018 compilation.
Added device ID and target type checks for ipq5018 traget.
Change-Id: Ib86a371fbe66749fcb6d114e7a4a9931b684e03d
In a future product, 160MHz mode of operation is acheived through
a single detector, unlike Hawkeye and its variants where 160MHz mode
is acheived using two 80MHz detectors.
Because of this change, the maximum segment ID is 0 in the new chipset,
whereas 1 in Hawkeye and its variants. Also the Agile detector ID
is 1 in the new chipset, 2 in Hawkeye and its variants.
In light of these changes, to identify the true 160MHz capability,
add a new API that checks the target type and returns true 160MHz
capability based on the target type. Also introduce a new dfs
variable that maintains the agile detector ID (based on the
true 160MHz capability).
In the future product, there is a support of restricted-80p80MHz
(a.k.a 165Mhz) where channels 132,136,140,144,149,153,157,161 are
available for operation as an 80p80Mhz channel.
Add a DFS API to check if this support is enabled.
CRs-Fixed: 2623964
Change-Id: If813e9d6fc649ce99c7780c04fbcb61acbd1af86
In the qdf infrastructure the default value used during
the atomic variable initialization is 0, during the flushing
of the vdev response timer during the SSR vdev rsp_timer_inuse
is read to understand whether the timer is initialized or not.
Since the default value is 0 the vdev response timer is not
flushed resulting in different memory leaks.
To resolve this issue, increment the rsp_timer_inuse value
to 1 during the vdev response time initialization.
Change-Id: Ibe47d1175f19b4c62cd5a18cda8b56370b58128a
CRs-Fixed: 2642476
Currently 160 and 80+80 MHz modes are handled together in
Spectral module. Differentiate between 160 and 80+80 MHz
to support new features like restricted 80+80
which are applicable only with 80+80 MHz.
CRs-Fixed: 2630729
Change-Id: I3e9fdd0e2d22a0bca7d37445df7fb1f1bab023c8
