1.Enabling CFR capture for pebble.
2.Clean up redundant check for Pebble while fetching rtt info
3.Clean up redundant check for Miami while fetching rtt info
4.Add 2023 to copyright year
Change-Id: I2ac845a1c5914004a0af4a007264d0cd5f431d3f
CRs-Fixed: 3596397
Delay write of SRNG regs may happen on different CPUs.
Sometimes wmb may not sufficient to protect the update
in sequence. Change is aimed to buy more time for the
update of different CPUs.
Change-Id: I4149decf5a29ea213aa38abd2bef062f25d7858d
CRs-Fixed: 3591457
Fix compilation issues when below macro are undefined
a) WLAN_PKT_CAPTURE_TX_2_0
b) WLAN_TX_PKT_CAPTURE_ENH_BE
c) BE_PKTLOG_SUPPORT
d) DP_RX_MOM_MEM_FRAG.
CRs-Fixed: 3571652
Change-Id: I066ace0b51fd628d31b2d7161765bf9d0c405549
Update TX completion status parsing for WCN6450 based on the latest
firmware interface.
Change-Id: I008631ee23990c7209af075b618bea6c1d602eb8
CRs-Fixed: 3583696
In case of WORD MASK subscribtion enabled, get phy_ppdu_id
from RX pkt hdr tlv in case PKT_TLV_HDR is subscribed.
Change-Id: I40e1b01c2f52404872c39df6d9faa57a95dad5c2
CRs-Fixed: 3582126
Currently for beryllium targets, 64-bit field shift/mask
is used to set REO_CMD entry values.
For peach target, the HW header files provide only 32-bit
shift/mask macros, which does not work with the existing code.
Move the REO_CMD descriptor field set to structure field
dereference instead of bit field shift/mask.
Change-Id: Iec9a1618fc6c995aa0939badb4368a4c389fcbca
CRs-Fixed: 3584239
1. add more function pointers for the remainder functions which are
generic
2. assign functions to per chip level
3. prevent using generic rx_pkt_tlv struct and using at a per soc
specific instead
Change-Id: I1cefb10c7a70f04dbf8b110fcfee6f1c9f4ab1a0
CRs-Fixed: 3533521
RCC mode of CFR capturing was not working on miami as
bb_captured_channel field which is being accessed from
RXPCU_PPDU_END_INFO tlv is not being set in host.
These fields of cfr are fetched from HAL_RX_GET()
which is being failed to read by host as it
follows 32 bit approach and miami uses 64 bit format.
Reading 4 bytes is not enough ,So changing HAL_RX_GET()
to HAL_RX_GET_64() and this will read 8 bytes with
which we get elements properly.
Change-Id: I8c669e5cc78ce856c1bc4b0449125aac45461a9b
CRs-Fixed: 3572563
Host is failing to read few cfr elements by HAL_RX_GET for
pebble as HAL_RX_GET follows 32 bit approach and pebble uses
64-bit format and so reading 4 bytes is not enough.
Used HAL_RX_GET_64 to read those cfr elements and this change
reads 8 bytes and then the elements are properly read.
Change-Id: If6f0b8e2a215719a1e42828764db01fe99a7e48d
CRs-Fixed: 3575631
Currently hal_info and hif_info logs levels are set to
QDF_TRACE_LEVEL_INFO, which results in prints being logged
to dmesg buffer.
To prevent prints logging into dmesg buffer, changes logging
level to QDF_TRACE_LEVEL_INFO_HIGH.
Change-Id: I039c5e7b6b47f1ffda8e32ff44322d1963648c41
CRs-Fixed: 3577831
__reserved_g_0003 is not present for peach platform, remove logging of
it as it is not useful anyway to log reserved field.
Change-Id: I8a7c4df5d6b769387010304d0234932925c1a866
CRs-Fixed: 3580279
Currently RBM id is not assigned properly for RX buffers
in Rhine architecture. Fix this by assigning RBM id during
soc attach in Rhine.
Change-Id: I8f3a781bfaf81366417107f4bd3da61b142ca1e2
CRs-Fixed: 3573342
Hex dump in monitor descriptor processing is causing high
CPU utilization. Since it is not advisable to add prints/debug
in per packet processing, remove hex dump debug log.
Change-Id: Ic98c3608a468cf4665ea94b1ebee725ca7121545
CRs-Fixed: 3571491
Debug logs in per packet tlv processing is causing high CPU utilization.
Remove these debug logs.
Change-Id: I520b3a83c7a5cafefe6f2d25d14ea5c1b9816b11
CRs-Fixed: 3571491
Fix tlv processing code for monitor mode in Big endian mode.
Changed all the 64bit tlv extraction apis and used 32 bit extraction apis.
This is needed in big endian mode since HW supports word swap option and
TLV has to be intepretted using 32bit extraction APIs.
TLV tag, userid and TLV len falls on the first 32 bit and hence using
both 32bit or 64 bit extraction APIs give same result.
Change-Id: I9b9ff78c79f21888964d405016c58c3b5988b254
CRs-Fixed: 3551002
Currently in monitor mode, links are released to WBM through the
SW2WBM_RELEASE ring and WBM will feed the links back to RXDMA
through the WBM2RXDMA_LINK_RING.
WCN6450 uses SOFTUMAC architecture where WBM is not present.
Hence the WBM2RXDMA_LINK_RING is repurposed to SW2RXDMA_LINK_RING
where host will directly release the links to RXDMA using this ring.
Change-Id: I110f607e38c4c2ab10eb1bd7b1f5a7bce2f03692
CRs-Fixed: 3493368
Direct link refill ring HTT setup fails due to srng
ring id mismatch. IPA uses a max of two RXDMA_BUF
rings but the hal srng ring id has a max of 3 RXDMA
ring ids which is causing the ring id mismatch for
direct link refill ring.
The fix is to remove the addition IPA related hal srng
ring id and move the macros appropriately to make
it consistent for both IPA enabled and disabled
cases.
Change-Id: Ieb4bbf646f5f0360e4013ae3e235cc7368087731
CRs-Fixed: 3523851
In WBM2SW Rx Error path for BE
specific functionality
1) HAL API's/Function pointers are replaced
with specific function calls.
2) Efficient read/write of WBM Error Info
from HAL Rx desc.
3) Minimize reading data from Nbuf TLV.
4) Peer_id fix for MLO clients with security
Change-Id: I1c9e6e767bbf6565567d998ae8e1357398de5803
CRs-Fixed: 3486304
Add Tx TLV recording support for monitor 2.0
Also add support to control Rx and Tx TLV
recording
Change-Id: I27a0d2c9ea8bdfacd46e6b7188b45b08ed47bbcd
CRs-Fixed: 3422787
ring history array size is large. Change is aimed
to split the allocation into small trunks to avoid
memory allocation failure.
Change-Id: If977baab23718d0186ad2ce6d33319b52096f2f9
CRs-Fixed: 3479226
Currently QCA_MONITOR_2_0_SUPPORT macro is used for both TX and RX 2.0.
but on MCC side, only RX 1.0 is supported and as part of this feature
TX 2.0 need to be supported.
Enabling QCA_MONITOR_2_0_SUPPORT will enable both RX 2.0 and TX 2.0, but
to support RX 1.0 and TX 2.0, we need to separate out code under
QCA_MONITOR_2_0_SUPPORT to TX and RX 2.0 macro.
As part of this change, introduce separate macros for TX 2.0 and RX 2.0
and move the common code under both macros.
Change-Id: I7ef7e488800934291538a0bca9acd21e28901214
CRs-Fixed: 3415740
In WBM2SW Rx Error path for BE
specific functionality
1) HAL API's/Function pointers are replaced
with specific function calls.
2) Efficient read/write of WBM Error Info
from HAL Rx desc.
3) Minimize reading data from Nbuf TLV.
4) Peer_id fix for MLO clients with security
Change-Id: I760694073a06c1829f28e7e92cd1657560d8eb06
CRs-Fixed: 3472220
MC/BC frames are routed to FW ring based on routing config for MC/BC
data as SRC: FW2RXDMA and DST: RXDMA2DFW.
Data offload features in FW will take care of routing the MC/BC frames
to FW in both active and low power modes.
Make this change only for kiwi/peach using hal ops.
Change-Id: Id8665261a512c9db3e808f95082ff82b47f01ade
CRs-Fixed: 3464036
