커밋 그래프

2139 커밋

작성자 SHA1 메시지 날짜
Amine Najahi
d594991e69 disp: msm: dsi: force VRR on RFI default value setting
Currently on video mode panel, when the RFI bit clock
rate is set back to the default rate, the driver is not
detecting that a VRR operation is necessary due to
unchanged porches value.

This change is forcing a VRR update on video mode panel
whenever the RFI bit clock rate is changed.

Change-Id: I16520b6ca1909f878bff1bb97472b15fe2a3d13b
Signed-off-by: Amine Najahi <anajahi@codeaurora.org>
2021-04-20 17:39:48 -04:00
Linux Build Service Account
6dcf53e7a2 Merge "disp: msm: enable power resources while dumping registers in WQ" into display-kernel.lnx.5.10 2021-04-16 13:53:23 -07:00
Linux Build Service Account
5b2a80d454 Merge "drm: msm: move display mmrm enable config to platform config" into display-kernel.lnx.5.10 2021-04-16 13:53:23 -07:00
Veera Sundaram Sankaran
031b1b5935 disp: msm: enable power resources while dumping registers in WQ
Enable sde power resources while dumping the registers in
SDE_DBG_DUMP_IRQ_CTX context after switching to workqueue.
The call is initiated from IRQ context and queued to workqueue
for execution. The extra vote will make sure the resources are
kept enabled through the register dumping.

Change-Id: I938049f6e2f1504ada2ce34ed4f56abb9c564f10
Signed-off-by: Veera Sundaram Sankaran <veeras@codeaurora.org>
2021-04-12 10:21:14 -07:00
Christina Oliveira
53a934668e drm: msm: move display mmrm enable config to platform config
This change moves mmrm enable flag to the display platform config files.
This allows to selectively enable mmrm in the display driver,
so other platforms not requiring mmrm in their build can compile
with their own config files.

Change-Id: I02415c6a22252dfc483a3da03b623351811ffc01
Signed-off-by: Christina Oliveira <coliveir@codeaurora.org>
2021-04-08 16:38:43 -07:00
qctecmdr
28e834679a Merge "disp: msm: dp: update dp phy settings for waipio" 2021-04-08 00:54:08 -07:00
qctecmdr
65ec8c0551 Merge "disp: msm: sde: reprogram crtc and planes after post enable power event" 2021-04-07 21:41:27 -07:00
qctecmdr
1d8a30b659 Merge "disp: msm: sde: frame data feature" 2021-04-07 18:40:26 -07:00
qctecmdr
ad4c8dc646 Merge "disp: msm: restrict AVR_STEP based on panel requirement" 2021-04-07 14:20:25 -07:00
qctecmdr
9e123e2f79 Merge "disp: msm: dsi: configure pll slave appropriately" 2021-04-07 02:40:20 -07:00
Sudarsan Ramesh
0bc54faad9 disp: msm: dp: update dp phy settings for waipio
This change updates the DP PHY swing/preemphasis values
for Waipio.

Change-Id: I52d6b461f10f5680d62e26ff3f5978e9b90fc0b1
Signed-off-by: Sudarsan Ramesh <sudarame@codeaurora.org>
2021-04-06 14:07:29 -04:00
Tatenda Chipeperekwa
e2b438d88b disp: msm: sde: reprogram crtc and planes after post enable power event
This change reprograms planes and crtc as part of the post enable
power event so that the first commit sequence after this event
does not have to reprogram these.

Change-Id: I2403337b95c70d2a3104aefcc647afa66f4c69a6
Signed-off-by: Tatenda Chipeperekwa <tatendac@codeaurora.org>
Signed-off-by: Samantha Tran <samtran@codeaurora.org>
2021-04-06 09:03:16 -07:00
Nilaan Gunabalachandran
c5835a215e disp: msm: sde: frame data feature
Add support to send a data packet of info, written to
predefined buffers, providing information about each submitted frame.
Add required UAPI definitions for frame data buffers and event
notification.
Add support to read ubwc statistics from hw, based on defined rois.

Change-Id: I51f279de98ae4e2a02b0df6943d334764011d5db
Signed-off-by: Nilaan Gunabalachandran <ngunabal@codeaurora.org>
2021-04-06 08:49:49 -04:00
Nilaan Gunabalachandran
9f954a19ff disp msm: sde: add get gem buffer utility
This change adds a utility for mapping gem buffer objects based
on a frame buffer object. This utility will be used as
a basis for different driver components.

Change-Id: Ia9f2a42a9f8898c98478091b8e1cd06849145417
Signed-off-by: Nilaan Gunabalachandran <ngunabal@codeaurora.org>
2021-04-06 08:48:30 -04:00
Gopikrishnaiah Anandan
0bc7a635f6 disp: msm: sde: fix color processing property update during commit
Some of the color processing features might not have a property node,
add checks to prevent caching values for these category of properties.

Change-Id: I02bfe8e6a6cce8526423c4d50bc2c781fff24efa
2021-04-05 12:14:15 -07:00
Steve Cohen
e5fa459062 disp: msm: restrict AVR_STEP based on panel requirement
Some panels require a fixed step rate for a particular mode.
This change allows DSI panels to specify a single supported
step rate for each nominal fps rate which SDE will enforce
during atomic check of AVR parameters.

Change-Id: I049415449bc88ccd396fced16d4534251eac3a06
Signed-off-by: Steve Cohen <cohens@codeaurora.org>
2021-04-04 18:45:40 -04:00
Steve Cohen
cf86c94f8e disp: msm: sde: add support for AVR_STEP feature
Add AVR step support so SW can trigger a late frame and instead
of immediately triggering, HW will perform the update at the
start of the next step interval. This allows for a fixed SW
vsync timeline to be maintained in userland, eliminating the
usual drift from the actual HW vsync caused by a late frame.

This change adds AVR_STEP support via a DRM property.

Change-Id: I4cf8a296989805f134c2165a3bed0b050bb09c96
Signed-off-by: Steve Cohen <cohens@codeaurora.org>
2021-04-04 18:40:57 -04:00
qctecmdr
ccf41a547c Merge "disp: msm: sde: avoid irq enable/disable during modeset" 2021-04-03 06:52:12 -07:00
qctecmdr
044fa60dd8 Merge "disp: msm: sde: expose skip inline rot threshold property" 2021-04-03 05:48:59 -07:00
qctecmdr
e9b4bb5a43 Merge "disp: msm: sde: trace: copy evtlog array into individual elements" 2021-04-03 03:38:58 -07:00
qctecmdr
2f70c01c06 Merge "disp: msm: dsi: expand matching requirements to find DSI mode match" 2021-04-03 02:35:42 -07:00
qctecmdr
749c899317 Merge "disp: msm: add cwb dither support" 2021-04-02 20:58:22 -07:00
qctecmdr
72fb431a00 Merge "disp: msm: sde: update smmu fault handler to print debug info" 2021-04-02 18:50:47 -07:00
Shashank Babu Chinta Venkata
4ee86a4a81 disp: msm: dsi: configure pll slave appropriately
Configure slave pll before setting dividers.

Change-Id: Ib359187b2739d12ee0fa5ce5f3ed6bc042d5aed8
Signed-off-by: Shashank Babu Chinta Venkata <sbchin@codeaurora.org>
2021-04-02 18:14:00 -07:00
qctecmdr
a8bdcf2e77 Merge "disp: msm: sde: report AVR_STATUS in vsync_event sysfs node" 2021-04-02 17:42:22 -07:00
Prabhanjan Kandula
81ecb37301 disp: msm: add qcom dma mapping header for dma attributes
Refactoring of iommu headers is moving few downstream attributes
defines to new header from dma-mapping.h. This change includes
the qcom header for downstream attribute defines.

Change-Id: Ia1f9f40f2cb8090dc7b7e3cbe0b632449c44c3b0
Signed-off-by: Prabhanjan Kandula <pkandula@codeaurora.org>
2021-04-02 11:24:55 -07:00
Linux Build Service Account
39e9184452 Merge "disp: msm: dsi: fix DSI mode index parsing" into display-kernel.lnx.5.10 2021-04-02 10:35:25 -07:00
Samantha Tran
b2e26167dc disp: msm: sde: expose skip inline rot threshold property
This change exposes whether or not inline rotation threshold
should be taken into consideration or skipped based on
skip_inline_rot_threshold property.

Change-Id: I4108f6ae86039815d28836bfa0e184737aaddd8a
Signed-off-by: Samantha Tran <samtran@codeaurora.org>
2021-04-02 10:09:13 -07:00
Linux Build Service Account
f035d89da8 Merge "disp: msm: sde: fix set property retire fence return code" into display-kernel.lnx.5.10 2021-04-02 09:48:51 -07:00
Linux Build Service Account
e6a3b40d7a Merge "disp: msm: dp: pass correct vdo value to the simulate_attention cb" into display-kernel.lnx.5.10 2021-04-02 08:08:03 -07:00
qctecmdr
6aa0fabaf3 Merge "disp: msm: dsi: change rule to initialize display in firmware" 2021-04-01 22:56:00 -07:00
qctecmdr
b0d2030f38 Merge "display: msm: sde: update qos lut after scaler config" 2021-04-01 22:56:00 -07:00
qctecmdr
de293ac6a9 Merge "disp: msm: sde: do on demand registering for te irq" 2021-04-01 20:45:27 -07:00
qctecmdr
7dd54040fe Merge "disp: msm: dsi: fix DSI PLL configuring sequence" 2021-04-01 15:30:13 -07:00
Satya Rama Aditya Pinapala
95b04d09fe disp: msm: dsi: fix DSI mode index parsing
The change fixes DSI mode index parsing required for setting
preferred node.

Change-Id: I6f91543843e697491c68d89b22103b2ac281e936
Signed-off-by: Satya Rama Aditya Pinapala <psraditya30@codeaurora.org>
2021-04-01 13:13:22 -07:00
qctecmdr
133fc8a6e8 Merge "disp: msm: sde: fix potential race condition" 2021-04-01 11:12:09 -07:00
Amine Najahi
e3597ef9a0 disp: msm: sde: fix set property retire fence return code
Change return code in set property retire fence function
to properly handle the cases when the user value is 0.

Change-Id: I32481ba6bdb13df707cf36a70aa2d49506cd7d7c
Signed-off-by: Amine Najahi <anajahi@codeaurora.org>
2021-04-01 14:05:58 -04:00
Sudarsan Ramesh
3bb21d12c2 disp: msm: dp: pass correct vdo value to the simulate_attention cb
In DPSIM, while calling the hpd callback from dp_sim_host_hpd_irq,
the hpd argument is passed in as false. In the hpd callback, both
the hpd_irq and hpd arguments need to be encoded into the vdo
parameter. Currently, MST DPSIM testcases are broken because this
is not implemented properly.

This change sets the hpd argument to true in the hpd_irq callback, and
encodes the hpd and hpd_irq parameter in the vdo object before passing
it to the simulate_attention callback.

Change-Id: I07155716699aad8554b6e08b446139bcd0d7fa74
Signed-off-by: Sudarsan Ramesh <sudarame@codeaurora.org>
2021-04-01 12:28:44 -04:00
Samantha Tran
ebedf4b7f4 disp: msm: dsi: expand matching requirements to find DSI mode match
This change expands on the checks comparing different dsi modes.
Previously, only h and v active and refresh rate were checked to
decide if a matching mode is found. Now the check will include
all h and v components in dsi_mode_info.

Change-Id: I6a4ca3456138c38615fbd5c50dfd9658cc3a2119
Signed-off-by: Samantha Tran <samtran@codeaurora.org>
2021-04-01 09:21:59 -07:00
Rajeev Nandan
329b8bc7ee disp: msm: dsi: change rule to initialize display in firmware
Request for display in firmware only if no display enabled form
the UEFI.

In the targets supporting dual DSI display having both displays
DT nodes part of the connector list, if only one display is
enabled from the UEFI, then the driver requests for display
in firmware for the second display. Getting the display panel node
from firmware is time taking process, and it can take up to
ten seconds. This causes a delay in adding the component for the second
display, resulting in a delay in bind calls for components of the
msm drm driver.

Change-Id: Ic0aa5ca890fc874d38d3e7eef745f2942e12f9bc
Signed-off-by: Rajeev Nandan <rajeevny@codeaurora.org>
2021-03-31 17:41:05 -07:00
Abhijit Kulkarni
559620308e display: msm: sde: update qos lut after scaler config
This change moves the code of updating the qos lut for qseed3
to each plane after updating the scaler configuration. This
avoids using stale values for qos settings.

Change-Id: I2c55a98e1ba9790d596c55160933cd5afd2388e5
Signed-off-by: Abhijit Kulkarni <kabhijit@codeaurora.org>
2021-03-31 17:32:30 -07:00
Xiaowen Wu
2f36a8f57a disp: msm: sde: add scaler3_cfg and pixel_ext to sde plane
Add scaler3_cfg and pixel_ext to sde plane to avoid updating state
variables in commit thread. This fixes atomic check failure when
scaler lut is not set.

Change-Id: I936b124ca6f90af22a87df31536204e837422a70
Signed-off-by: Xiaowen Wu <wxiaowen@codeaurora.org>
Signed-off-by: Abhijit Kulkarni <kabhijit@codeaurora.org>
2021-03-31 17:31:44 -07:00
Ping Li
7ed51b95a2 disp: msm: sde: fix potential race condition
Move the hist irq handling out of callback function, i.e., the hw
interrupt irq_lock context, to avoid dead lock between crtc spin_lock
and irq_lock. This change also extends crtc spin_lock coverage in
_sde_cp_crtc_enable_hist_irq to prevent null pointer dereference on
event node, which can be deleted during crtc event de-registration.

Change-Id: Iadaed54ab93c4c4abe065a8762d2addccb0c65c6
Signed-off-by: Ping Li <pingli@codeaurora.org>
2021-03-31 16:07:40 -07:00
Ritesh Kumar
b02eea56af disp: msm: dsi: update CPHY command mode clock calculation
In CPHY, packet header and checksum is sent twice and SYNC is
sent in between two headers. So, increase packet overhead used
in clock calculation to 15 bytes. Packet Header: 8 bytes,
CRC: 4 bytes, SYNC: 2 bytes and dcs command: 1 byte.

Change-Id: I7a1160cbb57ba4f1faeb4b36a16c322e6069d58f
Signed-off-by: Ritesh Kumar <riteshk@codeaurora.org>
2021-03-31 16:01:26 -07:00
Yashwanth
0a70e05ee5 disp: msm: sde: remove static access specifier for sde_dbg_base
In DLKM builds, all the display symbols are included as part
of msm_drm.ko and symbols are dynamically linked while
loading ramdumps. This change removes static specifier for
sde_dbg_base in order to access the variable from ramparser
and extract the required logs with the help of ramparser
tool and also in automation stability runs.

Change-Id: I3eae0bc9db3bd285642bf9f7930a31ab47c446e3
Signed-off-by: Yashwanth <yvulapu@codeaurora.org>
2021-03-31 15:25:21 -07:00
Jayaprakash
ef3a66389b disp: msm: sde: fix null dereference in drm_atomic_get_property
Add changes to fix the null dereference in
drm_atomic_get_property caused by connector->state
being NULL. This change allows the drm_mode_config_reset
operation to happen before drm_dev_register to avoid this.
In current scenario, connector->state->crtc is being
accessed due to call to drm_mode_getconnector ioctl with
the drm_mode_config_reset operation pending.

Change-Id: I374d9485819fad85100d1837f4ae22fc2a3ccc40
Signed-off-by: Jayaprakash <jmadiset@codeaurora.org>
2021-03-31 15:25:12 -07:00
Jayaprakash
b769b30b97 disp: msm: sde: add changes to wait for only one WB_DONE irq
With WB encoder added in the drm encoder_list before primary
encoder introduced as part of commit d28ebf05f4 ("disp:
msm: sde: populate WB display encoder list before dsi"),
sde_kms_wait_for_commit_done during CWB usecase is causing
crtc_commit thread to wait for two WB frame done irqs causing
janks on primary. Add changes to unblock crtc_commit thread and wait
for only one WB frame done irq.

Change-Id: Ie298302fea9df8ba5a1c2fa04f5f585ae455e0c9
Signed-off-by: Jayaprakash <jmadiset@codeaurora.org>
2021-03-31 15:25:03 -07:00
Jayaprakash
7f568a8d71 disp: msm: sde: allow delayed_off_work scheduling always
Add changes to allow delayed_off_work scheduling in all cases.
Skip scheduling only in panel_dead cases where delay_kickoff
is enabled. This will fix the issue seen with commit 08d04c2f3bae
("disp: msm: sde: avoid rc restart when triggered from panel dead").

Change-Id: I4c9a7cd26af9d99ecd3f58023a6fb6d041d91e92
Signed-off-by: Jayaprakash <jmadiset@codeaurora.org>
2021-03-31 15:24:55 -07:00
Mahadevan
bc86c9a0cc disp: msm: sde: avoid rc restart when triggered from panel dead
This change prevents scheduling of rc_restart in case of
panel dead. This early return is required to avoid the list
add corruption when a race condition happens between event
thread and commit thread. When event thread is handling
display failure notification if the virt_enable arrives in
commit thread it will reinizialize kthread for
delayed_off_work without deactivating the existing list
which leads to linkage corruption.

Change-Id: I41d08cd47ba6f887f0860e52bcddf414085524bb
Signed-off-by: Mahadevan <mahap@codeaurora.org>
2021-03-31 15:24:48 -07:00
Satya Rama Aditya Pinapala
7471069739 disp: msm: dsi: fix DSI PLL configuring sequence
Change fixes issues with the recalculation and DSI PHY PLL
toggle sequences while using continuous splash.

Change-Id: I6e63dd176e3ad5160b4df9f2da6d981951b696ab
Signed-off-by: Satya Rama Aditya Pinapala <psraditya30@codeaurora.org>
2021-03-31 15:20:15 -07:00