Commit Graph

224 Commits

Author SHA1 Message Date
Samantha Tran
9d67c9da7a disp: msm: sde: do not expose Demura CWB tap point capability
This change removes exposing Demura CWB tap point capability
to userspace.

Change-Id: I7be24a2004ce489fca76593cdb9f75e8b52d4461
Signed-off-by: Samantha Tran <samtran@codeaurora.org>
2021-06-21 15:21:19 -07:00
qctecmdr
8bbc6f2698 Merge "disp: msm: sde: flush commit thread queue during pm suspend" 2021-06-01 20:21:34 -07:00
qctecmdr
ffe21ad278 Merge "disp: msm: sde: fix indexing for frame data" 2021-05-31 08:46:29 -07:00
Linux Build Service Account
deef47dba0 Merge "disp: msm: sde: avoid mixer op setup for virtual LM" into display-kernel.lnx.5.10 2021-05-21 10:05:11 -07:00
Raviteja Tamatam
3789258773 disp: msm: sde: add allowed_dsc_reservation_switch capability
This change adds allowed_dsc_reservation_switch to determine if
dsc seamless switch is supported for DP. Also, based on the
flag, it determines and populates the required number of
available resources for DP.

Change-Id: I9cd7219a50d352369c5bc8386ce7dc25c30b80b6
Signed-off-by: Raviteja Tamatam <travitej@codeaurora.org>
2021-05-20 21:36:05 -07:00
Samantha Tran
ef2525e0cc disp: msm: sde: avoid mixer op setup for virtual LM
This change sets a flag to true if a mixer is a virtual mixer.
Virtual mixers will skip setting up mixer ops and debug register
dumps as their range is not valid. Since mixer ops are no longer
guaranteed to be set, add null checks before using these ops.

Change-Id: Idfe7e1e2b893dadbbe6756d69d0c4ca4fa6ae4ce
Signed-off-by: Samantha Tran <samtran@codeaurora.org>
2021-05-19 19:35:00 -07:00
Andhavarapu Karthik
78b4029179 disp: msm: sde: allow input fence status show only when kickoff in progress
Allow input fence status read only when crtc kickoff is in
progress to avoid race between status read and fence destroy.

Change-Id: I3402bfcb38940628f09f645a3cee31f821daeae9
Signed-off-by: Andhavarapu Karthik <kartkart@codeaurora.org>
2021-05-19 16:35:40 -04:00
Yashwanth
75f3403326 disp: msm: sde: add kickoff_in_progress flag in sde crtc
In dual display usecases, during pm suspend/resume,
commit is scheduled only on primary crtc thread. If idle
timeout value is very short such as in LP2 mode, it might
result in race condition due to idle pc off work getting
scheduled on its crtc thread. This change adds kickoff in
progress flag to handle such cases as crtc frame pending
count is only updated after rc kickoff.

Change-Id: Iebb331d914b23cc5eeadfeb2a488891e88b3202a
Signed-off-by: Yashwanth <yvulapu@codeaurora.org>
2021-05-19 16:35:40 -04:00
Yashwanth
4f8792dfc6 disp: msm: sde: perform only soft reset during timeout scenarios
During wait for commit done failure cases in the current
code in video mode and command mode(posted start), global
atomic state for current crtc state will be assigned NULL
during state swap which will lead to crash while using
drm_atomic_crtc_state_for_each_plane API. Also in such
timeout cases, border color staging and kickoff being
done without any vblank wait might lead to inconsistent
state because of configuration overriding from the next
commit. Since the timeout is observed at the end of commit
cycle, only soft reset should be done here and remaining
in the next commit cycle.

Change-Id: I0d42dc27035f4f79394aeec347d797c99ed76e5f
Signed-off-by: Yashwanth <yvulapu@codeaurora.org>
2021-05-19 16:35:40 -04:00
Yashwanth
8e53d758dd disp: msm: sde: add ctl reset during wait for commit done timeout
During one of the DP timeout usecases, flush doesn't take
effect due to vid vblank wait failure. As a result, smmu
faults are observed because of fetching the previously
staged planes. This change adds ctl reset in the same
DP atomic commit context to recover and avoid
smmu faults.

Change-Id: I2f9aceca56e27f140607317f7596d6fe0d908af8
Signed-off-by: Yashwanth <yvulapu@codeaurora.org>
2021-05-19 16:35:40 -04:00
Yashwanth
e96e5bd074 disp: msm: sde: add pending ctl recovery mask in sde_kms
This change adds pending ctl recovery mask in sde kms
structure to check if there are any ctl paths pending
for recovery and stages only border fill during such
conditions to avoid device crash. Below is the issue
sequence observed during the crash:

1) On one of the ctl path, flush didn't take effect and
flush bits are still pending.

2) It was a NULL flush and last good flush on that
interface has DMA2 pipe staged along with other pipes.

3) Different ctl path re-uses the DMA2 pipe (attached to
ctl path in #1) causing wr_ptr timeout followed by
ppdone timeout.

Change-Id: I07eb9f2fe41f59963dc27655c551c05abe240392
Signed-off-by: Yashwanth <yvulapu@codeaurora.org>
2021-05-19 16:35:40 -04:00
Nilaan Gunabalachandran
cd77cb672d disp: msm: sde: fix indexing for frame data
This change adds a fix to correct indexing logic while
parsing frame data buffers and resets the count correctly.

Change-Id: Ic5a20ecd7093423ea293432c9492eb920acdd6f4
Signed-off-by: Nilaan Gunabalachandran <ngunabal@codeaurora.org>
2021-05-18 17:12:46 -04:00
Anjaneya Prasad Musunuri
163b57e6a8 disp: msm: sde: correct noise and attenuation layers blend stages
Use blend stage to get blend offset instead of z order.

Change-Id: I7924325d19dfbace0fadf4551f696fe222d17115
Signed-off-by: Anjaneya Prasad Musunuri <aprasad@codeaurora.org>
2021-05-04 06:18:38 -07:00
Samantha Tran
0bcdb28eda disp: msm: sde: allow exclusively updating Connector ROI in clone mode
While in clone mode, allow connector ROI property to be set without
setting CRTC ROI property. Currently, both these properties must be
set or else an error is reported.

Change-Id: I516c27a3d31c8d31b967e4c8577f57f1b8b7e327
Signed-off-by: Samantha Tran <samtran@codeaurora.org>
2021-04-30 13:07:26 -07:00
Christopher Braga
a1698f39de Revert "disp: msm: sde: reprogram crtc and planes after post enable power event"
This reverts commit e2b438d88b.

Change-Id: I6d593121e74110fbe790ae4624a1c5df1b1ec731
Signed-off-by: Christopher Braga <cbraga@codeaurora.org>
2021-04-21 16:55:45 -04:00
qctecmdr
65ec8c0551 Merge "disp: msm: sde: reprogram crtc and planes after post enable power event" 2021-04-07 21:41:27 -07:00
Tatenda Chipeperekwa
e2b438d88b disp: msm: sde: reprogram crtc and planes after post enable power event
This change reprograms planes and crtc as part of the post enable
power event so that the first commit sequence after this event
does not have to reprogram these.

Change-Id: I2403337b95c70d2a3104aefcc647afa66f4c69a6
Signed-off-by: Tatenda Chipeperekwa <tatendac@codeaurora.org>
Signed-off-by: Samantha Tran <samtran@codeaurora.org>
2021-04-06 09:03:16 -07:00
Nilaan Gunabalachandran
c5835a215e disp: msm: sde: frame data feature
Add support to send a data packet of info, written to
predefined buffers, providing information about each submitted frame.
Add required UAPI definitions for frame data buffers and event
notification.
Add support to read ubwc statistics from hw, based on defined rois.

Change-Id: I51f279de98ae4e2a02b0df6943d334764011d5db
Signed-off-by: Nilaan Gunabalachandran <ngunabal@codeaurora.org>
2021-04-06 08:49:49 -04:00
qctecmdr
044fa60dd8 Merge "disp: msm: sde: expose skip inline rot threshold property" 2021-04-03 05:48:59 -07:00
qctecmdr
a8bdcf2e77 Merge "disp: msm: sde: report AVR_STATUS in vsync_event sysfs node" 2021-04-02 17:42:22 -07:00
Samantha Tran
b2e26167dc disp: msm: sde: expose skip inline rot threshold property
This change exposes whether or not inline rotation threshold
should be taken into consideration or skipped based on
skip_inline_rot_threshold property.

Change-Id: I4108f6ae86039815d28836bfa0e184737aaddd8a
Signed-off-by: Samantha Tran <samtran@codeaurora.org>
2021-04-02 10:09:13 -07:00
qctecmdr
b0d2030f38 Merge "display: msm: sde: update qos lut after scaler config" 2021-04-01 22:56:00 -07:00
Abhijit Kulkarni
559620308e display: msm: sde: update qos lut after scaler config
This change moves the code of updating the qos lut for qseed3
to each plane after updating the scaler configuration. This
avoids using stale values for qos settings.

Change-Id: I2c55a98e1ba9790d596c55160933cd5afd2388e5
Signed-off-by: Abhijit Kulkarni <kabhijit@codeaurora.org>
2021-03-31 17:32:30 -07:00
Narendra Muppalla
21f527d47d disp: msm: sde: use different spin lock for frame events
Due to lock sequence inconsistency between sde_crtc->spin_lock and
sde_kms->hw_intr->irq_lock can cause deadlock, to avoid this possible
deadlock this change uses different spin lock for frame events.

Change-Id: I51b1184dfa1069c87653099b95b992b277721daf
Signed-off-by: Narendra Muppalla <NarendraM@codeaurora.org>
2021-03-31 15:02:14 -07:00
Veera Sundaram Sankaran
d26e510b77 disp: msm: sde: avoid sde debugfs register access based on HW ownership
Add VM ownership checks before accessing the HW through the debugfs
path in sde crtc/encoder/connector modules to avoid illegal access.

Change-Id: I4ff8f29353835d263beb2091bdeec40125addbf8
Signed-off-by: Veera Sundaram Sankaran <veeras@codeaurora.org>
2021-03-31 14:56:57 -07:00
Steve Cohen
61e6723732 disp: msm: sde: report AVR_STATUS in vsync_event sysfs node
Report the AVR_STATUS which indicates if there's a pending
trigger when Adaptive Variable Refresh feature is enabled.
This allows SW to detect whether the old frame is repeated
or if the new frame was taken when the trigger is very
close to Vsync.

Change-Id: I6b04482e5c4c3bb92bad426c529c1fd3612d41c3
Signed-off-by: Steve Cohen <cohens@codeaurora.org>
2021-03-25 22:59:46 -04:00
Tatenda Chipeperekwa
c6257272d4 disp: msm: fix compilation errors for dlkm compilation
Fix dlkm compilation errors that are due to the use of -Werror
flags used by the build system.

Change-Id: I5e1e9bc63c1361d73e4930aab123212717872ecb
Signed-off-by: Tatenda Chipeperekwa <tatendac@codeaurora.org>
2021-03-22 15:25:36 -07:00
Dhaval Patel
b5cde14bca disp: msm: sde: calculate line_time once during modeset
Calculate line_time once during modeset and allow
each plane to use it instead of calculating for each frame.
It also simplifies the line_time calculation for
command mode display.

Change-Id: I94ce29eec94bfdbee9016fbf93378661ebf79c03
Signed-off-by: Dhaval Patel <pdhaval@codeaurora.org>
2021-03-18 15:03:30 -07:00
Gopikrishnaiah Anandan
1d39b8a5a9 disp: msm: sde: add checks for hfc feature enablement of demura
HFC feature of demura needs a skip blend plane to be set. If skip blend
plane is not set and HFC feature is requested to be enabled, driver
should skip turning on HFC demura feature. Change adds checks to ensure
that HFC is always enabled with skip blend plane staged.

Change-Id: I923359c7cb143867660b4c1e667f56ed42fa51c9
2021-03-17 11:22:08 -07:00
Gopikrishnaiah Anandan
d9187ba0d9 disp: msm: sde: stop crtc features during encoder disable
Encoder is disabling planes and unstaging layers from layer mixer. Some
of the crtc features are dependent on the plane being staged. Change
adds api that encoder can call on crtc to stop the features that are
dependent on source pipes.

Change-Id: I4d875155ceb8f66acfe6ce0096141ca7253bb140
Signed-off-by: Gopikrishnaiah Anandan <agopik@codeaurora.org>
2021-03-17 11:22:08 -07:00
Gopikrishnaiah Anandan
16c3eae807 disp: msm: sde: fix cp state handling
When states are duplicated ensure that payload addresses are not copied
for range overloaded properties. Allocate the memory and copy the
payload so that each state has its own heap pointer.

Change-Id: I0fb8941f69216a48f73aba9b59338ace9916e179
Signed-off-by: Gopikrishnaiah Anandan <agopik@codeaurora.org>
2021-03-17 11:22:08 -07:00
Christopher Braga
dc1af2c9d5 disp: msm: sde: read demura plane status registers on cont-splash boot
Extrapolate the Demura plane configuration from the Demura DSPP block
on cont-splash boot, and pass this information to DRM clients via a
CRTC property. This will allow user-space to be aware of all plane
reservations, and avoid plane mangling in multi display use-cases.

Change-Id: I6d216f555fcddbd19c18b6209dc830c21f6be5a4
Signed-off-by: Christopher Braga <cbraga@codeaurora.org>
2021-03-17 11:22:07 -07:00
Christopher Braga
4815caf222 disp: msm: sde: add DSPP and DEMURA count to CRTC capability blob
Expose overall DSPP and DEMURA counts on CRTC object to allow
DRM clients to make better policy decisions.

Change-Id: I59d795cafc829e8b2fe6a3f2fe597c7d5925105d
Signed-off-by: Christopher Braga <cbraga@codeaurora.org>
2021-03-17 11:22:07 -07:00
Christopher Braga
db39b61a5f disp: msm: sde: populate DRM pipeline setup during cont-splash
Declare the continuous splash pipeline setup to userspace by filling
in the DRM states for all plane, crtc, encoder, and connector objects
in use. This information will be treated as an 'informative' state,
and will be cleared at the start of the first commit to maintain
the DRM methodology of DRM clients being the only controller of
the pipeline. This ensures any configuration provided by userspace
is accepted and applied, even if it may already align with the setup
done by continuous splash.

This DRM state configuration is done via manual modification of the
DRM object states. Modification via the exposed DRM UAPI functions
is not possible due to no drm_atomic_state object linking the DRM
pipeline objects together.

Change-Id: I67650e05aafbb4e799cf60939f0595bc3786fc6e
Signed-off-by: Christopher Braga <cbraga@codeaurora.org>
2021-03-17 11:22:07 -07:00
Gopikrishnaiah Anandan
320ae88cf1 disp: msm: sde: avoid caching color processing properties in validate
Recent investigation shows that color processing properties are
incorrectly being cached in validate. This can result in unwanted
color processing properties being applied if a previous commit
failed or was validate only.

Add color processing properties to sde crtc state instead of marking
them dirty in color processing driver. When atomic commit is called
properties from state will be marked as dirty and applied.

Change-Id: If231a1f028e4cbd0b50eb0a947f4d58f94390a0c
Signed-off-by: Gopikrishnaiah Anandan <agopik@codeaurora.org>
Signed-off-by: Christopher Braga <cbraga@codeaurora.org>
2021-03-17 11:22:07 -07:00
qctecmdr
8308435276 Merge "disp: msm: sde: move DRM_EVENT_CRTC_POWER trigger" 2021-03-10 07:18:44 -08:00
qctecmdr
685a464505 Merge "disp: msm: add check for null pointer dereferencing" 2021-03-10 02:49:06 -08:00
Samantha Tran
10a48e58f6 disp: msm: sde: move DRM_EVENT_CRTC_POWER trigger
Currently, power on and off are being triggered prematurely.
This changes moves both calls to the end of enable and disable
functions to better align with events. It also creates a common
function to simplify event notifications.

Change-Id: I0291747a84991deb139552b2bff476a6436d5409
Signed-off-by: Samantha Tran <samtran@codeaurora.org>
2021-03-09 15:08:18 -08:00
Samantha Tran
e8cbb8822b disp: msm: add check for null pointer dereferencing
Add check for null pointers before accessing.

Change-Id: I33deb1e931098c246326a01e743a2db760320471
Signed-off-by: Samantha Tran <samtran@codeaurora.org>
2021-03-03 09:12:19 -08:00
qctecmdr
60471cb6a1 Merge "disp: msm: sde: enable precise vblank feature support for waipio" 2021-03-02 17:42:49 -08:00
Nilaan Gunabalachandran
8e2e3358d6 Revert "disp: msm: sde: Avoid kcallocs in atomic commit path"
This reverts commit 6886d03e4a.
It tries to memset the pstate from UI thread (crtc atomic check)
and crtc commit thread.

Change-Id: Ic9d3e5555d7085832df76025e53488d2b3365739
Signed-off-by: Nilaan Gunabalachandran <ngunabal@codeaurora.org>
2021-03-02 09:06:22 -05:00
Veera Sundaram Sankaran
b965fdcee5 disp: msm: sde: update retire-fence with precise vsync timestamp
Retire fence for frames are signaled based on vsync. Use the HW
vsync timestamp counter to calculate the precise vsync timestamp
and update the retire fence signal timestamp. This will offset
all IRQ and SW delays and sends the precise timestamp. Avoid
calculating the timestamp on error or panel dead events and
set the current ktime for those cases.

Change-Id: Ic762f7cd6daead9c8fdcb0f8aad6386cf980407d
Signed-off-by: Veera Sundaram Sankaran <veeras@codeaurora.org>
2021-02-26 13:48:57 -08:00
Veera Sundaram Sankaran
3cef1faa29 disp: msm: sde: implement drm hooks to get precise vblank timestamp
Add precise vblank timestamp support through the DRM framework.
Implement the vblank related hooks to get the vblank count and
timestamp. Use MDSS 8.x, hardware feature that supports logging
of the vsync timestamp counter which can be used to derive the
accurate kernel timestamp. The current ktime would be returned
for older targets to support backward compatibility.

Change-Id: I2d35ed4a643a519e602278b6d16e67ccee16a60b
Signed-off-by: Veera Sundaram Sankaran <veeras@codeaurora.org>
2021-02-26 13:48:57 -08:00
Gopikrishnaiah Anandan
e7c7283510 disp: msm: sde: add support for noise layer
DPU has added support for noise injection into the layer stack. Change
adds support for noise layer programming and exposes the hardware block
to the user space modules.

Change-Id: Id176eea54fcdcd5d399457b14133a1ccde07299f
2021-02-23 15:56:36 -08:00
Chandan Uddaraju
4fe3d97078 sde: wb: add changes to support Dedicated-CWB
Add new capture/tap point as CRTC property for
D-CWB feature. Update the hardware blocks and
corresponding APIs to configure D-CWB data path.
Add new hardware pingpong blocks that
are dedicated for CWB.

Change-Id: I22576df1768b50f9f47d8527f62913b01ff4d9a7
Signed-off-by: Chandan Uddaraju <chandanu@codeaurora.org>
2021-02-19 12:52:59 -08:00
Samantha Tran
73373271a7 disp: msm: sde: add multirect error status for ubwc and meta
This change adds support for error checking ubwc and meta error status
based off whether REC0 or RECT1 is used.

Change-Id: I7c39755da99a9d6c0d02b4ef16fa93b8ec7458a9
Signed-off-by: Samantha Tran <samtran@codeaurora.org>
2021-02-09 22:12:38 -08:00
Samantha Tran
6886d03e4a disp: msm: sde: Avoid kcallocs in atomic commit path
To avoid kcalloc for the multirect plane states and plane states will now
be stored sde crtc. These states are populated momentarily and accessed in
a single context for a handful of functions then are not used. This will
clean up parameters passed between functions in the commit path as well.

Change-Id: I6a8116a43c140b3f1c0464734032b8db13c1cfb0
Signed-off-by: Samantha Tran <samtran@codeaurora.org>
2021-01-28 08:04:08 -08:00
Ingrid Gallardo
a005a785fe disp: msm: add support to request mdp core clk through mmrm
For Waipio onwards, mdp core clock rate needs to be requested
through the mmrm driver, which will make sure the requested
rate can be sustained by the its power rail, which is shared
by multiple clients.
Current change adds the support to request the mdp core clk rate
through mmrm driver as well as returns the corresponding failures
to user space during when a rate cannot be supported by the
system.

Change-Id: Icc0e8ab5b71e8c99baf7913bdbd96d9504cc11ae
Signed-off-by: Ingrid Gallardo <ingridg@codeaurora.org>
2021-01-12 14:07:00 -08:00
orion brody
d00d481360 disp: msm: move from drm_mode to msm_mode
Move away from the private and private_flags fields from drm_mode,
as it is being deprecated in latest kernel version. Instead, Add
msm_display_mode as a wrapper to be used in downstream to store these
parameters. Also, store msm_mode in connector_state to be accessed
in commit path.

Change-Id: Ia5bdebe75f00aa15fb7db4dc3a0d50c30894a95c
Signed-off-by: Orion Brody <obrody@codeaurora.org>
2021-01-04 13:18:36 -08:00
Samantha Tran
262099e94a disp: msm: replace kzfree with kfree
This change replaces kzfree with kfree as kzfree has been
renamed.

While moving to the latest 5.10 tip, additional small changes
were required to resolve compilation issues:

set_dma_ops has moved from dma-mapping to dma-map-ops header.
This change includes the new header file required.

drm_panel_add returns void, this change removes the expected
return value check.

drm_prime_pages_to_sg takes an additional parameter. This change
passes in the drm_device pointer the function is looking for.

Remove an unused variable in sde_crtc vblank function.

Change-Id: I47c085c0cb64432873c2e750ae64cbdc2b5340da
Signed-off-by: Samantha Tran <samtran@codeaurora.org>
2020-12-22 10:42:18 -08:00