Fix compilation error due to missing break statement in
dp_rx_err_handler_rh().
Change-Id: I774c46996f01b6d961488e22791c4935c49db743
CRs-Fixed: 3635098
Originally Change-Id: I9fa71bdb6d4e4aa93fc795cc5dd472a181325991
was brought in to fix a race condition between Rx buffers
map/unmapped in dp_ipa_handle_rx_buf_smmu_mapping() and at the
same time map/unmapped from dp rx replenish context.
The fix ensured that rx_desc is unmapped and rx_desc->unmapped=1
flag will be set atomically within a lock.
But Change-Id: Iadb40071fb733cc4de3291784df5075d5a099a8e
introduced a flaw by releasing the lock before setting the flag to 1.
This is currently causing race condition and causing double
unmap calls when IPA smmu pool unmap and dp_rx_replenish unmap
is running in parallel. This change will fix this issue, by setting
the flag before the lock is released.
Change-Id: I3533bb5f6cc0437395149cd3c718826ef0b482a3
CRs-Fixed: 3594252
add new ini to configure skb size and change it in each place its used
correspondingly
Change-Id: Id00c6351bf6bc1b9df5e19064b2057dadd315e9b
CRs-Fixed: 3584462
Currently, fastpath CE RX buffers are not properly getting reset on
WCN6450 due to which driver is reading data at wrong offset leading to
packet drops. Properly resetting the nbufs after every CE RX buffer
processing is fixing the issue.
Change-Id: Ic29740fb1a72a3302752cc457bcf45f8d0094c46
CRs-Fixed: 3601680
Enable interrupts in monitor mode for wcn6450.
Interrupt configuration related code is moved from dp_main.c file to
dp_rings_main.c file as part of 'Ie58eae34a2da77c2d63870fab74b9d2d9d49c14a'
as Evros does not use dp group interrupts.
Move back the interrupt configuration related code from dp_rings_main.c
to dp_main.c to enable interrupts in monitor mode for wcn6450.
Change-Id: I7a3cbbe905072dad1cf38799ac6ef441281f78f9
CRs-Fixed: 3565734
Currently RX nbuf data pointer is reset considering
headroom reserve size of NET_SKB_PAD. So while reattaching
buffer back to H.W always data pointer is reset back to head plus
NET_SKB_PAD offset. But if skb is not allocated with head room
reserve then we should not reset data pointer taking NET_SKB_PAD
as consideration.
Fix this by pushing nbuf data pointer back to the state when
nbuf entered the host.
Change-Id: Ie96f99fdd92deaa921619a45cd5993a42f7b8f6e
CRs-Fixed: 3582873
Currently RBM id is not assigned properly for RX buffers
in Rhine architecture. Fix this by assigning RBM id during
soc attach in Rhine.
Change-Id: I8f3a781bfaf81366417107f4bd3da61b142ca1e2
CRs-Fixed: 3573342
Mark nbuf cb if Rx packet is routed via offloads, this gives the
info whether particular packet rx ring routing info is correct or
whether packet has entered offloads layer and rerouted back.
Change-Id: Ib3ad71216c514381d0bce1fb4744550d91880254
CRs-Fixed: 3540537
To eliminate the use of AST, using net dev to
find the peer related information, which helps
in avoiding the iterations of psoc list.
Passing the peer id as addition parameter to DP
Change-Id: I68e4ad8d5d62b2350ed0c2df66279de3fa9c0d83
CRs-Fixed: 3526799
Add missing rtpm_put() for the corresponding rtpm_get() during
tx ring write index update.
Also, add counter to capture flush count per CE.
Change-Id: Ieeee944b63d574f62d61f0557637cbf8f3b653cd
CRs-Fixed: 3536425
Move prealloc DP descriptor types to QDF so that
the macros can be used in HIF layer.
Change-Id: I3de60876735e5aa37d80e9e698a86503b18574c1
CRs-Fixed: 3502615
Due to a change in proto-type for dp_tx_desc_release, there is
a compilation failure for Rhine targets.
Fix the compilation failure for Rhine targets by passing the
required args for dp_tx_desc_release.
Change-Id: I422c0fe3a4e96c9e2c3cd42963236159a71a244e
CRs-Fixed: 3507470
Logs without meaningful message or values serves no purpose in debugging.
Hence, add more context to the logs.
Change-Id: Ia463d239a9bf26f292a11bcc71cb1379374c45e4
CRs-Fixed: 3492593
Record hardware TX descriptor history during TX enqueue for WCN6450
(Rhine hardware). This will aid in debugging data path issues.
Change-Id: I99c2a88ca161f89d529cba92692811fadee28938
CRs-Fixed: 3462090
Add RX debug history support and first packet marking
after WOW for RHINE architecture based RX path.
Change-Id: Ife719bdc3e5031a63b3f97c5842a220caeda8ffd
CRs-Fixed: 3452940
In the case of WCN6450, WBM HW block is removed in the UMAC.
TX completions come via HTT messages. Add logic to handle
HTT TX completion messages from the firmware.
Changes are specific to WCN6450 and hence implement the logic
in the arch specific code.
Change-Id: I447020354ce26e8948e4b49648c434fb2ed302cd
CRs-Fixed: 3381814
This code helps to initialize and deinitialize new SOFTUMAC
based Rhine architecture.
Change-Id: I374140ccb3b31e9351c6e683c77d81a5a876472a
CRs-Fixed: 3382913
Implement TX enqueue logic for WCN6450. There are no host facing
UMAC HW blocks in WCN6450. Driver enqueues all TX packets to
copy engine (CE) over the copy engine channel that is mapped to
HTT_DATA2_MSG_SVC service.
Changes are specific to WCN6450 and hence implement the logic
in the arch specific code.
Change-Id: Ia366a74b94a4e84c1d4c037c7a99093bb6739178
CRs-Fixed: 3381755
In the case of WCN6450, sizes of the TX descriptor pools are not known
to the driver during load time. The sizes are shared by the firmware
post VDEV creation via HTT_T2H_MSG_TYPE_FLOW_POOL_MAP HTT message.
After the VDEV gets deleted in the firmware, a corresponding flow unmap
HTT message will be sent to the driver to clean up the TX descriptors
of a particular VDEV.
Add logic to handle the flow map/unmap HTT messages for WCN6450. These
messages are specific to WCN6450 and hence the logic is implemented in
arch specific HTT code.
Change-Id: I8edcabbec77abae2c238f487acb7a48b478fd149
CRs-Fixed: 3381751
WCN6450 is a chip based on Rhine architecture. Unlike LI/BE targets,
chipsets based on Rhine (RH) do not have host facing UMAC HW blocks.
Their corresponding SRNG interfaces are also removed. The functionality
of these UMAC HW blocks is replaced with a software implementation in
the firmware. Communication between the driver and firmware will happen
over copy engine (CE).
Although there are no host facing UMAC HW blocks, the CE hardware used
in WCN6450 expects the host driver to use the TX descriptor (HW) format
of LI targets during TX packet enqueue. Therefore it is required to
create a new pool of TX descriptors (HW) pool for WCN6450 that is used
during TX.
The logic to create/free/init/deinit these descriptors is specific
to WCN6450/Rhine, therefore it is implemented in architecture specific
Rhine code.
Introduce new APIs in struct dp_arch_ops {} to allocate and free
arch specific TX descriptors. These ops will be no-op for LI/BE
architectures.
Also for Rhine targets, allocate/free other TX descriptors like TX EXT &
TSO descriptors as part of the arch APIs.
Change-Id: I452ac69143395881ab8580355a0f75571dc3e929
CRs-Fixed: 3381711
RHINE is soft UMAC based architecture which is not having
REO block, all the REO functionality will be implemented
in F.W and host level. Host will get the RX packets in
CE-RX rings in HTT format, to reap RX packets new HTT
messages will be extracted and parsed.
So implement RX handling based on new softumac architecture for RHINE.
Change-Id: If430dd017309e2b2a3eb5e27e1d8b58696abceb4
CRs-Fixed: 3382920
Add HTT changes which are specific to RHINE architecture.
Some of the changes like dedicated TX endpoint service,
fastpath implementation and few other message handling
is different in RHINE. Current change add support for
RHINE specific HTT implementation.
Change-Id: I90c2d1d66cdadc5935e6b819e3f19e635c45cb51
CRs-Fixed: 3382915
This change introduces new RHINE architecture specific DP files.
RHINE is new SOFTUMAC based architecture, unlike LI/BE targets
all the HW UMAC functionality will be replaced with software base
UMAC functionality. So current RHINE arch specific implementation
is aligned to softumac based implementation.
Change-Id: I70baf11130afc07c5c85437d2343d0976ce0ea0a
CRs-Fixed: 3382880
