Commit grafiek

657 Commits

Auteur SHA1 Bericht Datum
qctecmdr
ca2e8c399a Merge "disp: msm: sde: switch to WD vsync on unexpected panel jitter" 2019-10-04 13:05:55 -07:00
Dhaval Patel
96d5b9646d disp: msm: sde: wait for lp2 and pm_suspend frame trigger
PM_SUSPEND API adds extra pm_runtime refcount and calls
the device driver for pm_suspend. At this point display
device may not be in power collapse state. This patch
makes sure that crtc_commit thread is idle and triggers
power collapse also.

Change-Id: Ia21d6a6b6fd32caeb9d16fa5cf998b91ef990e01
Signed-off-by: Dhaval Patel <pdhaval@codeaurora.org>
2019-10-04 09:31:09 -07:00
Dhaval Patel
13a274c947 disp: msm: sde: update max display resolution with scale config
Update max display resolution based on scale ratio support
when decimation support is not present.

Change-Id: If9a87a12c830a700f839fdf47f929e575b66d318
Signed-off-by: Dhaval Patel <pdhaval@codeaurora.org>
2019-10-03 11:30:28 -07:00
qctecmdr
63fc5353ad Merge "disp: msm: sde: Init ltm_buf_busy list head before adding new node" 2019-10-02 22:49:09 -07:00
Gopikrishnaiah Anandan
097da1a65c drm: msm: add support for ltm off event
Clients of local tone mapping engine need to know when hardware block
was turned off, to enable mutually exclusively display features.
Change adds support for ltm off event notification via custom event
interface of drm.

Change-Id: Ibfe2f85eadb0b939deee56194387b51b1e5ca8b9
Signed-off-by: Gopikrishnaiah Anandan <agopik@codeaurora.org>
2019-10-01 14:03:49 -07:00
Veera Sundaram Sankaran
fb54f6e6e7 disp: msm: sde: switch to WD vsync on unexpected panel jitter
Switch to watchdog vsync whenever panel jitter is
identified during frame-transfer on command mode display.
This would allow the HW to finish processing the frame
with watchdog vsync source. Switch back to default vsync
source after the frame-transfer is complete. This would
help in the MDP hang issues in panels that generate TEs
with thresholds greater than the projected jitter.

Change-Id: Ic3fa78d90e7f44cb0186857716ac27e72505fd32
Signed-off-by: Veera Sundaram Sankaran <veeras@codeaurora.org>
2019-10-01 13:32:42 -07:00
Vara Reddy
b712eb76c9 drm/msm/dsi-staging: update mdp transfer time preference
With this change, mdp transfer time updated to userspace
will be the preferred dtsi entry, when both dsi clock
and mdp transfer time nodes are set.

Change-Id: I37cd55e3d6f3f0f78f4ca4bddf921f6cf743c1b9
Signed-off-by: Vara Reddy <varar@codeaurora.org>
2019-10-01 11:31:30 -07:00
qctecmdr
9e60a4854b Merge "disp: msm: sde: add null check for pingpong hw block" 2019-09-30 13:12:15 -07:00
qctecmdr
35048b5165 Merge "drm/msm/sde: Fix UBSan warnings in sde" 2019-09-27 02:06:17 -07:00
Jayaprakash
7ba937c3ea disp: msm: sde: add null check for pingpong hw block
Add null check before accessing pingpong hw block
allocated during mode set to physical encoder.

Change-Id: Ic464e7c7087f280b1198f6b7485bc0763322c532
Signed-off-by: Jayaprakash <jmadiset@codeaurora.org>
2019-09-27 14:17:20 +05:30
qctecmdr
f96023f963 Merge "disp: msm: dsi: Set OLED reugalor mode when exit LP1" 2019-09-26 06:35:28 -07:00
qctecmdr
8dab90d54d Merge "disp: msm: config AB/IBB power when AOD mode enter/exit" 2019-09-26 04:35:18 -07:00
qctecmdr
ccffe7be5f Merge "disp: msm: Set the dsi panel type" 2019-09-26 02:22:44 -07:00
qctecmdr
19e23cd72e Merge "disp: msm: only set nolp command when panel in LP1/LP2 mode" 2019-09-26 00:23:18 -07:00
qctecmdr
09a3f6c0b3 Merge "disp: msm: dsi: add null check for panel and proper ctrl iteration" 2019-09-25 09:06:27 -07:00
Samantha Tran
70a1445d18 disp: msm: dsi: add null check for panel and proper ctrl iteration
This change moves the panel null check to the beginning of the function
so panel can be used throughout the function. This change also replaces
looping through display ctrls with proper display_for_each_ctrl.

Change-Id: I0014ee7ad6d8514734f9233a1abb314e60d29b5f
Signed-off-by: Samantha Tran <samtran@codeaurora.org>
2019-09-24 12:56:50 -07:00
Vara Reddy
4534e1912d drm/msm/dsi-staging: use usleep_range instead of msleep in dsi enable
Use usleep_range api instead of msleep in dsi enable path to
improve accuracy, which improves bootup time.

Change-Id: I5d00d666bfacddea58b824267eb0eb39b5b2641c
Signed-off-by: Vara Reddy <varar@codeaurora.org>
2019-09-24 11:51:57 -07:00
Nilaan Gunabalachandran
d5e0182a1e disp: msm: sde: add pending flush for merge3d
While disabling merge3d block, pending flush mask
needs to be set for merge3d.

Change-Id: Ic7baea278ac62ac1203aad8a33c40874704c85a1
Signed-off-by: Nilaan Gunabalachandran <ngunabal@codeaurora.org>
2019-09-24 09:57:19 -04:00
Yuan Zhao
3b554d4fba disp: msm: dsi: Set OLED reugalor mode when exit LP1
When panel exits LP1, need to set OLED power mode.

Change-Id: I045777a0dce941e45b71bc74c7b2908b24df3396
Signed-off-by: Yuan Zhao <yzhao@codeaurora.org>
2019-09-24 01:26:36 -07:00
Yuan Zhao
2da9889075 disp: msm: config AB/IBB power when AOD mode enter/exit
ELVDD/ELVSS has a dip during AMODE panel AOD exit hand-off.
According to PMIC team's suggestion, need to config the AB/IBB power
to REGULATOR_MODE_IDLE/REGULATOR_MODE_NORMAL to fix dips.

Change-Id: Ia5cbd4d698de262e02a660f670865c03dda1e04a
Signed-off-by: Wenjun Zhang <wjzhan@codeaurora.org>
Signed-off-by: Yuan Zhao <yzhao@codeaurora.org>
2019-09-24 01:26:31 -07:00
Yuan Zhao
bb2f60b35c disp: msm: Set the dsi panel type
Parse the DTS panel type settings. Consider the default
panel physical type as LCD. We need to set OLED in DTS if
the panel is an OLED type.

Change-Id: Ib53651ab3861e75bf061f38d60a2f6135c1f537d
Signed-off-by: Wenjun Zhang <wjzhan@codeaurora.org>
Signed-off-by: Yuan Zhao <yzhao@codeaurora.org>
2019-09-24 01:26:23 -07:00
Yuan Zhao
f2873cd69f disp: msm: only set nolp command when panel in LP1/LP2 mode
DSI driver sends nolp commands when DSI connector power
modes is set SDE_MODE_DPMS_ON or SDE_MODE_DPMS_OFF. This
is invalid panel configuration. It should only send nolp
commmand to panel when it is in LP1/LP2 mode.

Change-Id: Ie94eaef6899d292fd20f42c1b7ef2c7a99178d13
Signed-off-by: Wenjun Zhang <wjzhan@codeaurora.org>
Signed-off-by: Yuan Zhao <yzhao@codeaurora.org>
2019-09-24 01:23:41 -07:00
qctecmdr
daf414d4cf Merge "makefile: add Bengal config support for display techpack" 2019-09-21 09:49:57 -07:00
qctecmdr
1f35fd007a Merge "disp: msm: update topology based on clock requirement" 2019-09-21 03:22:17 -07:00
Ping Li
606df33423 disp: msm: sde: Init ltm_buf_busy list head before adding new node
Init ltm_buf_busy list head before adding new node to avoid
list_add corruption.

Change-Id: Ic90f82c929150640bc12d4f31cf7115879f92037
Signed-off-by: Ping Li <pingli@codeaurora.org>
2019-09-20 16:49:03 -07:00
qctecmdr
49a66145eb Merge "disp: msm: add changes for bengal target compilation" 2019-09-20 15:51:07 -07:00
Tatenda Chipeperekwa
da892c0b91 disp: msm: update topology based on clock requirement
Update the topology allocation by considering the required
mode clock (vtotal x htotal x fps * fudge factor). Modes with
a clock that exceeds the maximum SDE clock will be denoted as
requiring a topology that uses two layer mixers.

Change-Id: I3c773598b0d79cb6fea9d3a0e04d89ff84d67e13
Signed-off-by: Tatenda Chipeperekwa <tatendac@codeaurora.org>
2019-09-20 14:39:54 -07:00
qctecmdr
b8165c3584 Merge "disp: msm: sde: reserve primary CTL and LM for primary connector" 2019-09-20 12:22:23 -07:00
qctecmdr
517809d5ff Merge "disp: pll: update dynamic dsi clock sequence" 2019-09-20 07:35:56 -07:00
qctecmdr
4729ea7b8d Merge "drm: msm: dp: change voltage swing levels for lito/kona" 2019-09-20 03:50:39 -07:00
qctecmdr
dd2ff80eb4 Merge "disp: msm: dp: Detect failure cases when setting mst topology manager" 2019-09-19 23:35:26 -07:00
qctecmdr
4030b86b3a Merge "disp: msm: dp: Fix dp mst vcpi slot management for inactive crtcs" 2019-09-19 21:35:12 -07:00
qctecmdr
0d5759feb9 Merge "disp: msm: dp: remove session lock for power state update" 2019-09-19 19:36:26 -07:00
qctecmdr
aa7c045206 Merge "disp: msm: sde: fix inline rotator downscale ratio check" 2019-09-19 17:26:03 -07:00
qctecmdr
82e665d204 Merge "disp: msm: dp: clear scrambler bypass for test pattern 4" 2019-09-19 13:06:16 -07:00
qctecmdr
b985d844b0 Merge "clk: qcom: mdss: remove recalculation of vco rate for 10nm pll" 2019-09-19 11:12:17 -07:00
qctecmdr
8a9b4f9b81 Merge "drm/msm/dsi-staging: update dsi debug bus error message" 2019-09-19 09:05:22 -07:00
Jayaprakash
d927698cc1 makefile: add Bengal config support for display techpack
Add required changes to makefile and enable the config
keys for Bengal target compilation.

Change-Id: I7a27be5feffd132cbc35d4a7aa27521b6841e2fe
Signed-off-by: Jayaprakash <jmadiset@codeaurora.org>
2019-09-19 18:04:44 +05:30
Ashu Sharma
677738cdae drm/msm/sde: Fix UBSan warnings in sde
Fix warnings by accessing PGC and IGC c1 and c2 component arrays directly
rather than through offset from color0 component lut address.

Change-Id: I18df6c6a599ab8dc5f69c34c6977e289402e9e4f
CRs-Fixed: 2531780
Signed-off-by: Ashu Sharma <aashu@codeaurora.org>
2019-09-19 14:59:30 +05:30
Jayaprakash
c2c470efa9 disp: msm: sde: reserve primary CTL and LM for primary connector
In dual display cases when secondary display is resumed first,
primary CTL and LM is selected for secondary path which leads to
invalid configuration. Changes are made to correct the reservation
to select primary CTL and LM for primary connector and secondary
LM to secondary connector.

Change-Id: I6b2a8bedaf46f18bdb28b45ac765f32b26207304
Signed-off-by: Jayaprakash <jmadiset@codeaurora.org>
2019-09-19 11:24:57 +05:30
qctecmdr
690701d8c0 Merge "disp: msm: dsi: refine the logic for mode filling and calculation" 2019-09-18 19:21:04 -07:00
qctecmdr
1864600a63 Merge "disp: msm: dp: Fix incorrect NULL pointer check" 2019-09-18 15:37:14 -07:00
Veera Sundaram Sankaran
b7ba56ff00 disp: msm: sde: fix inline rotator downscale ratio check
During the validation of inline-rotator downscale ratio,
in the plane atomic_check phase, the client_type is
derived from the crtc->state. This leads to wrong
client_type as in check phase, it has to be derived
from the new crtc state. Fix it to derive from
new crtc, which would in turn be used to get the
correct inline-rotator downscale ratio.

Change-Id: I109fc6fd81182b1cda1c4feefbf421d3fab433c7
Signed-off-by: Veera Sundaram Sankaran <veeras@codeaurora.org>
2019-09-18 13:28:17 -07:00
qctecmdr
8034367c13 Merge "drm: msm: dp: Fix DSC and FEC handling" 2019-09-18 12:10:25 -07:00
qctecmdr
8d3febc8a0 Merge "disp: msm: sde: ensure input handler unregistration in command mode" 2019-09-18 12:10:25 -07:00
qctecmdr
89cd72f2a6 Merge "disp: msm: sde: increase rsc min_threshold time" 2019-09-18 09:59:08 -07:00
Jayaprakash
669557d6eb disp: msm: add changes for bengal target compilation
This change corrects the definitions of functions
invoked when their config keys are not enabled.

Change-Id: Iba4631b8019a5e5a6b95516c5c9f9e28942e60c9
Signed-off-by: Jayaprakash <jmadiset@codeaurora.org>
2019-09-18 19:32:32 +05:30
Ritesh Kumar
c58801eec3 clk: qcom: mdss: remove recalculation of vco rate for 10nm pll
In continuous splash use cases, the display is enabled in
the boot-loader. During display kernel probe, to enable clocks,
the rate is calculated by reading the hardware registers before
the corresponding software rate is set. At times when these rates
are nearly equal, the call for set rate never happens. This can
cause abnormal behavior. In this change during hand-off we don't
recalculate the clock rate to ensure the software programs the clock
registers accordingly.

Change-Id: Ibe512067a134856c4f4364f57a80d50214e88397
Signed-off-by: Ritesh Kumar <riteshk@codeaurora.org>
2019-09-18 11:43:06 +05:30
Samantha Tran
8fa5e65d70 disp: msm: sde: avoid plane update if crtc inactive
This change passes DRM_PLANE_COMMIT_ACTIVE_ONLY during
drm_atomic_helper_commit_planes in complete commit. Passing
this flag insures that if crtc is inactive, plane update
will not be made. This avoids trying to commit a plane
while entering low power mode when crtc and encoder are
already disabled.

Change-Id: Ic08a4f42cf832709332ccbf4a9df39342f858eec
Signed-off-by: Samantha Tran <samtran@codeaurora.org>
2019-09-17 08:30:25 -07:00
Fuad Hossain
c348cb858a drm: msm: dp: Fix DSC and FEC handling
Ensure that the driver is handling DSC and FEC
enablement properly. FEC can now be independently
enabled without DSC. FEC configuration is also
now performed after link training in order to
avoid link training failures as per the DP spec.
Consequently, DSC can now be left on during
compliance testing. For DSC use-cases, ensure
that the minimum supported bpp is set to 24, as
required by the DSC spec.

CRs-Fixed: 2517994
Change-Id: I40339585da5b4e51251a3be7119b6959954954d7
Signed-off-by: Fuad Hossain <fhossain@codeaurora.org>
2019-09-13 15:59:59 -04:00