2 Commity

Autor	SHA1	Zpráva	Datum
Ajay Singh Parmar	e0e4280214	disp: pll: fix sequence as per hardware recommendations ... Update the PLL and PHY power on and clock set sequence as per the hardware recommendations. Move the post link clock phy enable part to the catalog so that it can be programmed after enabling link clock. Change-Id: I9b3b49e5a9ac93bebcb1cb7da63b715a8d5ed85c Signed-off-by: Ajay Singh Parmar <aparmar@codeaurora.org>	2019-07-12 16:44:05 -07:00
Narendra Muppalla	3709853456	Display drivers kernel project initial snapshot ... This change brings msm display driver including sde, dp, dsi, rotator, dsi pll and dp pll from base 4.19 kernel project. It is first source code snapshot from base kernel project. Change-Id: Iec864c064ce5ea04e170f24414c728684002f284 Signed-off-by: Narendra Muppalla <NarendraM@codeaurora.org>	2019-04-14 22:20:59 -07:00