Commit Graph

2571 Commits

Author SHA1 Message Date
qctecmdr
7edd9e5faa Merge "disp: msm: dp: check for DP stream during audio teardown" 2021-09-17 03:46:41 -07:00
qctecmdr
0d46a03da7 Merge "display: msm: sde: reduce dbg mem usage for tui vm" 2021-09-17 03:46:41 -07:00
Linux Build Service Account
254160dcc0 Merge "disp: msm: dp: check for aux abort in sim mode" into display-kernel.lnx.5.10 2021-09-17 00:36:49 -07:00
Samantha Tran
8c62ff4082 disp: msm: retry dma buf attach on msm_gem_delayed_import error
In the event when msm_gem_delayed_import returns an error, reset
the obj_dirty property to true to allow the buffer to detach and
attach again.

Change-Id: Ib8da8f237c5a4ab696675cbcf66f1a3dfae02639
Signed-off-by: Samantha Tran <samtran@codeaurora.org>
2021-09-16 14:14:02 -07:00
Rajkumar Subbiah
fba8d96566 disp: msm: dp: check for aux abort in sim mode
In sim mode, the dp driver is not checking for the aux state before
processing an aux request. This ends up causing the drm framework to
unnecessarily wait for 4 seconds while destroying a stream.

This change adds the check for aux state to align with the behavior
of a real sink.

Change-Id: I81900018ac1b403bb1e03fe26206e145694fefbd
Signed-off-by: Rajkumar Subbiah <rsubbia@codeaurora.org>
2021-09-15 13:00:58 -04:00
Yashwanth
6619470eb6 disp: msm: dsi: add qsync min fps val in dsi display mode priv info
In the current code for finding the qsync min fps for a
mode, entire mode list is iterated which involves acquiring
dsi display_lock. During conn tx debugfs commands, if
qsync min fps is required, we try to acquire dsi
display_lock twice which results in hang state. This change
adds qsync min fps value in dsi_display_mode_priv_info
struct in order to get the qsync fps from the
msm_display_mode present in connector state instead of
looping through all the modes to find the mode qsync fps.

Change-Id: Ifded40d1f12462bb50fc7bdafb746ae5b8d9512a
Signed-off-by: Yashwanth <yvulapu@codeaurora.org>
2021-09-15 12:09:35 +05:30
Vara Reddy
655dd3b302 disp: msm: add support to notify trustzone ops TA
Change adds support to notify TZ ops TA for any HDCP 1.4
authentication state changes, so that TZ can optimize their
code for better performance.

Change-Id: I62f47e2e3fc102cb51cf695daa5f6b798f65781a
Signed-off-by: Vara Reddy <varar@codeaurora.org>
2021-09-14 10:10:36 -07:00
qctecmdr
00d92ec8d6 Merge "disp: msm: dsi: remove vote on refgen when PHY is turned off" 2021-09-10 17:10:28 -07:00
qctecmdr
e37f6a901f Merge "disp: msm: sde: remove redundant backlight update" 2021-09-10 14:04:54 -07:00
qctecmdr
16d516dc35 Merge "disp: msm: dsi: add support for setting backlight min level" 2021-09-10 14:04:54 -07:00
qctecmdr
82a8d86c9a Merge "disp: msm: sde: avoid mis-allocating dummy mixers" 2021-09-10 14:04:54 -07:00
qctecmdr
a3fc520ea7 Merge "disp: msm: sde: hold vmlock only during transition in check phase" 2021-09-10 14:04:54 -07:00
qctecmdr
42ec97efd5 Merge "msm: sde: disp: Set merge_mode after vlut and hist enable" 2021-09-10 14:04:54 -07:00
Shashank Babu Chinta Venkata
6fc34a0613 disp: msm: dsi: remove vote on refgen when PHY is turned off
Remove vote on refgen during display off usecase.

Change-Id: I4d618569c4e03c1b6dca637179053ee812b1d5d9
Signed-off-by: Shashank Babu Chinta Venkata <sbchin@codeaurora.org>
2021-09-10 13:39:51 -07:00
Alex Danila
d521b12b69 disp: msm: dp: read DPCD registers using debugfs
This change adds support for reading the byte at specific DPCD
addresses for physical monitors, similar to the way it is already done in
sim mode.

The read address is taken to be the last written address. Reads return a
single byte unless the address is 0, in which case 20 bytes are returned
to preserve the original functionality.

Change-Id: I43c44d81758c156257bd5dba6bb8f9c08ac948eb
Signed-off-by: Alex Danila <eadanila@codeaurora.org>
2021-09-10 16:36:18 -04:00
qctecmdr
b9c52b603e Merge "disp: msm: dsi: allow CMD engine enable for cont-splash" 2021-09-10 00:47:16 -07:00
Yahui Wang
23582c4de3 disp: msm: dsi: add support for setting backlight min level
Current display driver can't support kernel dts property
qcom,mdss-dsi-bl-min-level to adjust backlight min level,
so adding this change to make it work well if user wants to
increase the backlight min level of display panel.

Change-Id: Iac74ee44aafac88548ceba6b221d13251dc3d5ef
Signed-off-by: Yahui Wang <yahuiw@codeaurora.org>
2021-09-10 15:08:34 +08:00
Nilaan Gunabalachandran
3b303c57de disp: msm: sde: avoid mis-allocating dummy mixers
Dummy mixers for dedicated concurrent writeback can be allocated
as valid mixers. However, they should only be allocated for DCWB
usecases. Allocating these virtual resources incorrectly can lead
to underrun on external monitors. These dummy mixers should not
be tracked as available resources and exposed to dp for
mode validation.

Change-Id: I04f583d5b722e0a384a5446e3a8a2313a338aa12
Signed-off-by: Nilaan Gunabalachandran <ngunabal@codeaurora.org>
2021-09-09 09:48:08 -07:00
Yashwanth
811402fc83 disp: msm: sde: hold vmlock only during transition in check phase
In the current code, vmlock is always acquired in check
phase even if there is no transition between vm's. This
might result in janks if vmlock is held concurrently by
other processes such as backlight update. This change
ensures that vmlock is held only if there is a valid
transition request between vm's in check phase.

[cohens@codeauarora.org] Resolved trivial merge conflict
and refactored the code to reduce the code complexity.

Change-Id: I022f04c19ba04fdd5494580cc1436747620b9354
Signed-off-by: Yashwanth <yvulapu@codeaurora.org>
Signed-off-by: Steve Cohen <cohens@codeaurora.org>
2021-09-09 01:45:18 -04:00
Ping Li
25f9e738ee msm: sde: disp: Set merge_mode after vlut and hist enable
To ensure that set merge_mode after vlut and hist enable, move merge_mode
enable from ltm_init to ltm_vlut.
Redefine the OP_MASK of LTM_INIT_ENABLE and LTM_VLUT_ENABLE, in order to
write the merge_mode bits correctly.

Change-Id: I5258e7f545e265b114098e46d31986274127e962
Signed-off-by: Ping Li <pingli@codeaurora.org>
Signed-off-by: Yuchao Ma <yuchaom@codeaurora.org>
2021-09-08 17:47:29 -07:00
Samantha Tran
dff7057a41 disp: msm: sde: remove redundant backlight update
Current logic will unnecessarily call backlight update
twice in cases where backlight level is changing. When
this happens, there is a potential delay waiting for the
first command to complete before sending the second
backlight update with the same value. This change removes
one backlight call and now only calls update if the
property is marked as dirty.

Change-Id: I260f0d73b3a5af9ced7ae261d247595f965a8d9e
Signed-off-by: Samantha Tran <samtran@codeaurora.org>
2021-09-08 16:07:31 -07:00
Shashank Babu Chinta Venkata
d38a8c0c19 disp: msm: dsi: mark signature for stub appropriately
DSI parser utils are enabled through kernel config
CONFIG_DSI_PARSER. The stubs for disabled case do not
have appropriate storage class. This change alters the
stubs to be static inline which is appropriate storage
class.

Change-Id: I692b792cc3e8a8340245ee5f356e1f6281276a59
Signed-off-by: Shashank Babu Chinta Venkata <sbchin@codeaurora.org>
2021-09-08 09:33:53 -07:00
Sandeep Gangadharaiah
cda8e4b1dd disp: msm: dp: check for DP stream during audio teardown
Verify if DP stream is still active before accessing dp audio
registers. This would prevent a scenario where audio teardown
flow is trying to access dp audio config registers after dp
has completed the deinit process.

Change-Id: Icbcaa19529fc2fb34e079231c9ef24e15aa7e4f2
Signed-off-by: Sandeep Gangadharaiah <sandgang@codeaurora.org>
2021-09-08 10:58:24 -04:00
qctecmdr
f04eb4120c Merge "disp: msm: dp: use 3dmux when dsc is not available" 2021-09-07 07:12:22 -07:00
Samantha Tran
19979de0af disp: msm: sde: update IB vote to include AB factor
With this change, the IB vote will be based on the following:

IB = AB_aggregated / number of DDR Channels / DRAM efficiency factor

Number of DDR Channels and DRAM efficiency factor are now device tree
properties which can be modified and parsed at boot up.

Change-Id: I298043807150faec1cbc0d74eefcdd1a534b460a
Signed-off-by: Samantha Tran <samtran@codeaurora.org>
2021-09-02 21:04:40 -07:00
qctecmdr
6e4731175f Merge "disp: msm: avoid begin/end cpu_access calls based on dma-coherent attribute" 2021-09-02 14:49:31 -07:00
qctecmdr
f192f6d6dc Merge "disp: msm: dsi: reset the DSI command ctrl flags for every command" 2021-09-01 18:19:24 -07:00
qctecmdr
187dbfdc65 Merge "disp: msm: sde: allow spec fence signaled with PENDING_ERROR as non fatal" 2021-09-01 13:38:33 -07:00
Rajat Gupta
7f0f23c35f disp: msm: dp: fix to handle host ready failures
Handle host_ready failures and try to initialize host if not already.
Sometimes customizations for customers causes NOC error as host_ready
doesn't return early upon failure and the customer customization
tries to access aux register to reconfig upon aux failure while
reading EDID. Adding fix will make driver more robust to handle such
cases.

Change-Id: Ifa5c56daa32c4ef366a0e05718495ffcb40b96b3
Signed-off-by: Rajat Gupta <rajatgu@codeaurora.org>
Signed-off-by: Sandeep Gangadharaiah <sandgang@codeaurora.org>
2021-09-01 14:05:43 -04:00
Satya Rama Aditya Pinapala
b63a13c0b8 disp: msm: dsi: reset the DSI command ctrl flags for every command
The controller flags need to be reset for each command. On resetting
it only for a batch of commands, it may carry stale values and cause
unexpected behavior.

Change-Id: I8473be0c4361965a58c33a3d45420c533d48646b
Signed-off-by: Satya Rama Aditya Pinapala <psraditya30@codeaurora.org>
2021-09-01 10:14:31 -07:00
Jayaprakash Madisetty
cc6122b749 disp: msm: sde: allow spec fence signaled with PENDING_ERROR as non fatal
In concurrent display usecases, dma_fence_array signaled op
can be called early which sets SIGNALED_BIT on spec fence, but
irq_dma_fence_array_work is not scheduled yet which clears the
PENDING_ERROR in dma_fence. Add changes to treat pending_error
with signaled cases as non fatal.

Change-Id: I3a59032345b8c6d1488e947e74985ed929112d1c
Signed-off-by: Jayaprakash Madisetty <jmadiset@codeaurora.org>
2021-08-31 14:18:43 -07:00
qctecmdr
63dc6b64c9 Merge "disp: msm: reset connector panel_dead during dsi bridge post disable" 2021-08-28 00:44:22 -07:00
qctecmdr
d4652960d6 Merge "Revert "disp: msm: dsi: allow cmd-engine enable/disable HW op at all times"" 2021-08-28 00:44:22 -07:00
qctecmdr
b8a102735a Merge "disp: msm: sde: Validate transaction counts for LUTDMA abs writes" 2021-08-27 21:23:19 -07:00
qctecmdr
419816332d Merge "disp: msm: sde: retry preclose commit in cases of -ERESTARTSYS" 2021-08-27 17:13:54 -07:00
Samantha Tran
9c771fe6e1 disp: msm: avoid begin/end cpu_access calls based on dma-coherent attribute
This change avoids unnecessary calls to dma_buf_end_cpu_access and
dma_buf_begin_cpu_access for context banks which have dma-coherent
attribute set.

Change-Id: I5120e55bed372d166d05da988714551428964b8b
Signed-off-by: Samantha Tran <samtran@codeaurora.org>
2021-08-27 09:48:45 -07:00
qctecmdr
e8a4a92814 Merge "disp: msm: dp: move fsa init from dp probe to dp hotplug" 2021-08-26 14:23:36 -07:00
Steve Cohen
3c40c5c903 disp: msm: dsi: allow CMD engine enable for cont-splash
Issuing a DSI command transfer while in continuous splash can
disable the CMD engine since no enable call has taken place.
Ignore updating the engine during display enable/disable paths
only for trusted VM and allow it for continuous splash.

Change-Id: I250df6a78af5558ad1e03a3931d11fd8d13e4555
Signed-off-by: Steve Cohen <cohens@codeaurora.org>
2021-08-26 12:39:50 -04:00
Steve Cohen
1416e72e62 Revert "disp: msm: dsi: allow cmd-engine enable/disable HW op at all times"
This reverts commit 65f3cc37a4.

This change breaks TUI use-cases by allowing CMD engine to be
disabled on trusted VM without primary VM having knowledge of
this HW update.

Change-Id: Ieb67dc841299a149e9f1028fd8f98bd857f1f711
Signed-off-by: Steve Cohen <cohens@codeaurora.org>
2021-08-26 12:37:45 -04:00
Steve Cohen
b57a445cf4 Revert "disp: msm: dsi: skip DSI disable operations in trusted VM"
This reverts commit 61518d4f5f.

This change corrupts the DSI engine state machine which expects
all the state tracking updates from the calls that are now being
skipped.

Change-Id: I506ecbd98cc771950b17212a2702e7dde81fe539
Signed-off-by: Steve Cohen <cohens@codeaurora.org>
2021-08-26 12:35:38 -04:00
Vara Reddy
e0219f400c disp: msm: dp: move fsa init from dp probe to dp hotplug
DP driver, at probe time, checks for fsa probe completion by
registering a notifier callback. The fsa driver performs some
I2C operations at this time. But occasionally, it takes multiple
attempts to complete these I2C transactions,adding huge delays
to display driver probing.If this delay is long enough, then
display usermode services start before display driver probe completes
and as a result, it fails to enumerate any displays.

Since the fsa switch is needed only after an external display is hot
plugged,this change moves the fsa probe check to dp hotplug handler.

Change-Id: I1b592ec3921a0b406ca23142d07e1a7e8b72090e
Signed-off-by: Vara Reddy <varar@codeaurora.org>
2021-08-25 16:36:19 -07:00
Samantha Tran
e1cb09ad31 disp: msm: sde: retry preclose commit in cases of -ERESTARTSYS
This change allows the commit in preclose to be attempted a
number of times in the event that the return value is -ERESTARTSYS.
This can happen if there is some timing delay which is preventing
the commit to go through completely and an error code is returned.

Change-Id: I26d85d777be182bc153532d7c06f816c934783a4
Signed-off-by: Samantha Tran <samtran@codeaurora.org>
2021-08-25 13:42:59 -07:00
Samantha Tran
8dbb23a8f5 disp: msm: reset connector panel_dead during dsi bridge post disable
This change resets panel_dead property at the end of dsi bridge post disable.
Currently as part of the ESD recvoery sequence, dsi_bridge_enable resets this
property, but WD vsync source is selected before this point based on the older
panel_dead status. With this change, panel_dead will be in a proper state and
the correct vsync source will be selected during recovery.

Change-Id: I6d614113cfb0ae8a857974bb4d4f8ceb5988a0c8
Signed-off-by: Samantha Tran <samtran@codeaurora.org>
2021-08-24 13:32:04 -07:00
qctecmdr
3a2c526376 Merge "disp: msm: dsi: add submode argument to find correct mode" 2021-08-24 05:24:54 -07:00
qctecmdr
0f0c5990ca Merge "disp: msm: dsi: skip DSI disable operations in trusted VM" 2021-08-22 22:22:26 -07:00
qctecmdr
ce920f58ee Merge "disp: msm: sde: fix dsc initial line caluclation" 2021-08-20 20:19:52 -07:00
qctecmdr
829303e368 Merge "disp: msm: add look up table for dsc format specific rc params" 2021-08-20 17:08:06 -07:00
Steve Cohen
61518d4f5f disp: msm: dsi: skip DSI disable operations in trusted VM
Secondary VM will do a disable commit when transferring HW
ownership back to primary. This will end up disabling the CMD
engine before releasing HW back to primary VM. Primary is
unaware that the engine has been disabled and ends up in a
bad state until it gets re-enabled.

This issue was introduced by: commit 65f3cc3 (disp: msm: dsi:
allow cmd-engine enable/disable HW op at all times).

Fix the issue by ensuring CMD engine does not get turned off
in the display disable path for trusted VM.

Change-Id: I1638a181d136e18a836c3ba08daee1c5fcaa9de3
Signed-off-by: Steve Cohen <cohens@codeaurora.org>
2021-08-20 19:39:48 -04:00
qctecmdr
4f0632e798 Merge "disp: msm: dp: check for dp link clocks before accessing dp registers" 2021-08-20 11:01:30 -07:00
qctecmdr
19e36887d2 Merge "disp: msm: remove use of DMA attributes LLC_NWA and Upstream Hint" 2021-08-19 18:45:48 -07:00