It is not applicable for all DFPS cases to update UIDLE state
according to current frame rate. If DFPS changes frame rate
through vertical front porch values, the SDE clocks and transfer
time will not get changed accordingly, and it always get fixed
at max frame rate configuration of DFPS.
Add this change to check max FPS of DFPS instead of current
frame rate for UIDLE update, if DFPS is enabled with VFP.
Change-Id: I7634bce6a9eb1af212ba19a267735be08b20ae1f
Signed-off-by: Lei Chen <chenlei@codeaurora.org>
This change avoids msm property install and cache state
transitions if sys cache is not supported in the target.
Change-Id: I00b0a95772b1a3dab67c7e684529cda093d6dac6
Signed-off-by: Yashwanth <yvulapu@codeaurora.org>
MDSS irq will be enabled/disabled only during post-enable
and pre-disable power events. During idle usecase in video
mode, interrupts will be disabled but not mdss hw irq.
This change uses irq vote count check while adding pm
qos irq vote.
Change-Id: Iae0ea19fbe688d0ee762b5e75f37548ba5671def
Signed-off-by: Yashwanth <yvulapu@codeaurora.org>
During virt enable call, sde_enc master will be removed and
re-assigned. If an underrun is observed during this
scenario, it results in crash due to uninitialized access.
This change handles the above scenario.
Change-Id: Iec9e4a0bc4b763e44933334dacf82f1439eacc17
Signed-off-by: Yashwanth <yvulapu@codeaurora.org>
Currently driver reads CTL status register before checking
pending kickoff counter. This can lead to a register access
violation when there is a race condition between the ESD and
commit thread.
This change checks pending kickoff counter before reading
CTL status register.
Change-Id: I5828b580c16d075df19eb349ee88d8b7da47941e
Signed-off-by: Amine Najahi <anajahi@codeaurora.org>
This change disables sending idle notification if system
cache is already enabled. If system cache is enabled it
establishes that driver has already send prior
notification and no configuration change was requested.
Change-Id: I1aee002ab3c8c3d4193a8e7a4890d8e4f24da804
Signed-off-by: Abhijit Kulkarni <kabhijit@codeaurora.org>
This change fixes the vblank wait after system cache read mode
update. Without this change the wait does not happen since there is
no pending kickoff. This change uses encoder api to flush the
configuration and explicitly waits for vblank.
Change-Id: I8942f9b638e784c8fd9b5df33a9ccc7087a5eaef
Signed-off-by: Abhijit Kulkarni <kabhijit@codeaurora.org>
Clone WB encoder disable before posted start commit
trigger adds wb_wait delay in current frame trigger
sequence. This adds 1 frame jank if CWB enable/disable
path exercised periodically like 100ms or 200ms. This
change delays CWB encoder disable after frame trigger
and vsync/wr_ptr wait to avoid jank issue.
Change-Id: Ifa10042473397b37396d217d2410e7cf5a1e32a1
Signed-off-by: Dhaval Patel <pdhaval@codeaurora.org>
DRM encoder can be NULL during modeset concurrency, so add this
change to check drm encoder and only wake up display when drm encoder
is available.
Change-Id: I50dd85eb39567aba4895dc19801020d7ead841b8
Signed-off-by: Lei Chen <chenlei@codeaurora.org>
All sde crtc's are virtual when they are created. Resources for the crtc
is allocated when crtc is enabled. All crtc's will not have same
capabilities because some of the dspp blocks have additional hardware
blocks. Change exposes additional dspp capabilities dynamically when
crtc is allocated the dspp hardware block.
Change-Id: I93e76a1335574e4ca30d9419ef6cc6e8149e2c3c
Signed-off-by: Gopikrishnaiah Anandan <agopik@codeaurora.org>
This change updates misr checks so that misr can be
configured during secure display session. In the current
code, misr_reconfigure flag is set only when accessing
through debugfs node.
Change-Id: Ic3a8316a4881551da3f0f340f6ef5ae3fbe4913f
Signed-off-by: Yashwanth <yvulapu@codeaurora.org>
Allow for overriding color processing features that normally uses
DSPP flush to use LM flush instead. This is required on targets
where some of the DSPP features have been tied to LM flush bits.
This changes adds a field in color processing node to track if the
override is needed and enables LM flush override for rounded corner
on target requiring it.
Change-Id: I584bd7b20dfc9fc7795b1b3b10e2f17a82945ce4
Signed-off-by: Amine Najahi <anajahi@codeaurora.org>
Trusted VM adapts splash handoff path to acquire the same
set of HW blocks the tui display was using in the primary VM
before switching out.
To use the splash handoff path, Trusted VM should add an
additional vote to the PM so that refcounts will be remain
balanced after the splash path cleanup at the completion
of the first valid commit.
This change adds the needed vote and as a result cleans up
explicit voting from trusted vm commit paths.
Change-Id: I9eb33c364f1dfb4205547a8353f57b73c68b8af3
Signed-off-by: Jeykumar Sankaran <jsanka@codeaurora.org>
Add changes to reserve dsc blocks by routing even numbered
dsc encoders to even pingpong blks and odd numbered dsc encoders
to odd numbered pingpong blks.
Change-Id: I9242b3f7a2784194f9e4a7d30eff6ae3ec16b196
Signed-off-by: Jayaprakash <jmadiset@codeaurora.org>
Signed-off-by: Steve Cohen <cohens@codeaurora.org>
Fix the check for uneven split across LMs when destination
scaler is used and reject the use-case since this is not
supported by the driver. This can happen if an odd-value
for the horizontal width is being split across 2 mixers.
The existing check was broken since it uses pass-by-value
with a zero initialized value that callee tries to update
while iterating over the DS configurations. Use pass-by-
reference with the previous DS configuration, if available,
instead of just 0 values so the proper comparisons can take
place.
Change-Id: I529faf57e43fb471b28b4d222260ea4d37217d4d
Signed-off-by: Steve Cohen <cohens@codeaurora.org>
A new status register was added in DPU 5.x to INTFs to allow for
confirmation when the timing engine is disabled. This
functionality was controlled via an overloaded feature flag
which is used to enable INTF tear-check ops (also added in DPU
5.x). External displays support INTF_STATUS but have no use for
any tear-check functions. Separate these features so they can be
enabled individually on the interfaces which support them.
Change-Id: Ib8548619cb58bf19b7c02211ead7f33f52ffeae4
Signed-off-by: Steve Cohen <cohens@codeaurora.org>
In current driver, during system cache read mode update control flush
is invoked and there after commit thread is allowed to pick up next
commit. This can lead to improper frame flush and cause hangs or
underrun. This change add a wait till frame done after system cache
update to frame read mode.
Change-Id: Ic88e0bdbaaa1f45f825d40ecde4de9e8dea2efef
Signed-off-by: Prabhanjan Kandula <pkandula@codeaurora.org>
This change programs rotator sid value irrespective of
continuous splash since it is not configured from
bootloader. It also handles trusted vm support
to prevent accessing mdss hw register.
Change-Id: I80e286364286457545dfa236d629447241d98f95
Signed-off-by: Yashwanth <yvulapu@codeaurora.org>
Introduce event logs for lutdma kickoff operations to make
LUTDMA usage more apparent in crash dumps. This will aid in
debugging and triaging LUTDMA issues.
Change-Id: I81b570dfc21b03627cdaf5d9693b786839716571
Signed-off-by: Christopher Braga <cbraga@codeaurora.org>
This change resets the mixer swapping flag in crtc on a
seamless mode switch. In case of switching from command
mode to video mode it is a seamless mode on crtc, but we
disable connector and encoder. Due to this crtc fails to
reset the mixer swap since it is tied to dsc merge topology
on master connector. In transient state master connector
is not set and is set only after enabling the new mode on
connector.
Change-Id: Idebdabd642625b894100f62aeb62f11a9c101b03
Signed-off-by: Abhijit Kulkarni <kabhijit@codeaurora.org>
Currently driver uses wrong index to retrieve partial update
ROI during check phase. This can lead to ROI being 0 for some
of the CP properties.
Change-Id: I885132e8d29eaf1353ed079eb283f7ca3a3d63a6
Signed-off-by: Amine Najahi <anajahi@codeaurora.org>
UIDLE and QoS LUT configurationis might be different between
different frame rates.
Add this change to update UIDLE and QoS LUT according to frame
rate when DRM mode is changed.
Change-Id: Ia16a963e185b911b7dd11e81a26cab732c2b185c
Signed-off-by: Lei Chen <chenlei@codeaurora.org>
When DRM property objects are created, the DRM framework attaches a
dellocator which can eventually free the object when the last reference
is removed from it. The framework can only do this before the driver is
registered. If a property is created after the registration then the
framework is unable to attach a deallocator causing a memory leak during
tear down.
The current DP driver creates a new colorspace property whenever a
new dp connector is initialized. It creates a base connector at probe
time prior to registration. But then it also creates new connectors,
post registration, whenever a new MST dongle is attached to the
topology, causing memory leaks.
This change limits the property creation to the base connector and
attaches the same object to MST connectors to avoid memory leak.
Change-Id: Ib97dc7aac260b4f3f96c1097f58bd276c68501f8
Signed-off-by: Rajkumar Subbiah <rsubbia@codeaurora.org>
