This change adds hardware programming that will update the
txq wr_ptr upon output fence firing.
Change-Id: I79ff0ea5fb2b7f73a48bd70e3c8e71ea69fead95
Signed-off-by: Christina Oliveira <quic_coliveir@quicinc.com>
Both trusted-vm and secure-camera preview buffers uses the same
VMID_TVM. In primary-vm, the check is used to determine the camera
preview usecase and attach it to the correct device. This is not
necessary for trusted-vm as it can default to nested trusted-vm
context bank. Avoid the check while its in trusted-vm.
Change-Id: I4391a4a1da9dca5d1f4b1719733b8d4edc1900a8
Signed-off-by: Veera Sundaram Sankaran <quic_veeras@quicinc.com>
During DP disable, it is possible for audio and display to race
causing the audio to send teardown notification after display driver
has disabled all the clocks. This change adds a check for panel state to
avoid accessing registers during this callback.
Change-Id: I6322726a04745bc6c73338cd33f65cfdbfe42ec7
Signed-off-by: Nisarg Bhavsar <quic_bhavsar@quicinc.com>
Force max supported bpp to 24 to improve stability of MST usecases.
Change-Id: I5b0e6ad86df39915073f469ea67e6addea165965
Signed-off-by: Nisarg Bhavsar <quic_bhavsar@quicinc.com>
Signed-off-by: Rajkumar Subbiah <quic_rsubbia@quicinc.com>
The DP debugfs node for CRC read currently does not check
if the panel is enabled before attempting the read. This
could cause unclocked access of DP registers. This change
adds the necessary protection and bails out if the clocks
are not turned on.
Change-Id: Ia555e2473fc9f0f7434ee3665eb4fb7cfb4f97cf
Signed-off-by: Rajkumar Subbiah <quic_rsubbia@quicinc.com>
Currently the ipc context for drm_dp_aux is being created
during dp_aux_init. This limits the IPC logs to be only
readable when the external display is in connected state
and it gets destroyed on unplug. This change moves the
context creation to probe time and the aux context will
be passed to the aux driver during initialization.
Change-Id: Id8d26c907c9cb2fd8c89b2842b98e7a908816abe
Signed-off-by: Rajkumar Subbiah <quic_rsubbia@quicinc.com>
Some rate limited logs in dp aux and dp ctrl are using
pr_err_ratelimited function to print the logs instead of
the standard DP log macros. So this change adds a new
ratelimited DP log macro and make the logging consistent.
Change-Id: I75d7306d94c7c360783f39259c509c32fe59cdf5
Signed-off-by: Rajkumar Subbiah <quic_rsubbia@quicinc.com>
PPB size programming checks for the max horizontal width of the
panel by checking all available modes. In some DP usecases,
it is possible that this information is not ready at this point.
However, this is not an error, as by default driver will set the
maximum size.
This change reduces the error log to a debug warning.
Change-Id: Ieb63524457db410a2569682f2c3863e082c60805
Signed-off-by: Nilaan Gunabalachandran <quic_ngunabal@quicinc.com>
Some of the demura config parameters are single buffered. When demura
config is reprogrammed by user-space clients, single buffered updates
can cause artifacts on screen. Change splits the double buffered and
single buffered configs into different payloads to allow user-space
to update double buffered config.
Change-Id: I493b86944f7c2d630dcc1b863174e816cf8c82ed
Signed-off-by: Gopikrishnaiah Anand <quic_agopik@quicinc.com>
When the vblank event overflow error log occurs due to an inability
to handle incoming vblanks, it is posisble to continuously flood
with error print logs. This could cause the CPU to become further
blocked and creates a cycle of failed callbacks and error logging.
This change changes the overflow log in the crtc event thread to
rate limited.
Change-Id: Ie2d77689c8fa989cf3a294f973851b7dacef098b
Signed-off-by: Nilaan Gunabalachandran <quic_ngunabal@quicinc.com>
During VM transition there should be no pending crtc event
thread operations in progress to avoid any resource access
after vm release. Flush the event thread worker in prerelease
to ensure it.
Change-Id: I51d6c78a702235ee926c9ff6415c8d69f74b5929
Signed-off-by: Raviteja Tamatam <quic_travitej@quicinc.com>
Large allocations using kvzalloc can lead to timeouts.
This updates the allocation calls accordingly to use
vzalloc to remove requirements on physically
contiguous memory.
Change-Id: I437913b3bf2e46bfeeb2c511bdfc153470fcbc24
Signed-off-by: Anjaneya Prasad Musunuri <quic_aprasad@quicinc.com>
Some monitors seem to be not enabling Sink CRC capability on first plugin
and therefore the CRC read returns all zeros. But on subsequent plugins
the capability is set properly and CRC values are calculated. To
workaround this quirk on the sink side, this change reenables sink CRC
if the values are read as zeros.
Change-Id: I67ace5c064b2b56d03732a78f334ea6b1b649608
Signed-off-by: Rajkumar Subbiah <quic_rsubbia@quicinc.com>
Starting pineapple, the output_fence trigger_sel register is updated to be
more controllable. Instead of hardware choosing the output fence timing
based on detecting if panel is in video/cmd mode, this is explicitly set
by software. Add support in display driver for to correctly write to
trigger_sel register for video mode.
Change-Id: I76d8cfb644cebfd2f34f3017fc779b87fc52db1a
Signed-off-by: Grace An <quic_gracan@quicinc.com>
While same spinlock can be used to protect a critical section
in both irq-handler and in non-irq context, in non-irq context
it is mandatory to use irqsave version of locking api to disable
irqs locally on the particular cpu. Otherwise, this could lead
to a deadlock if a non-irq thread holding the spinlock and irq
handler is scheduled on same cpu.
This change replaces physical encoder spinlock locking with
irqsave version of locking api in the non-irq context.
Change-Id: If73b4c995b75e9499d79fbe969d426427fd3a9d1
Signed-off-by: Prabhanjan Kandula <quic_pkandula@quicinc.com>
Chaining of dma-fence need to be used for chaining fences of
buffer objects of each color plane. Max color planes currently
supported in upstrean is 4. Current logic incorrectly referring
drm-plane index instead of color plane index and fails to get
buffer object. This change fixes the buffer object indexing
beyond max color planes and dma-fence chain usage.
Change-Id: I20618d3617ee638432e4e2d68540e345c241ee97
Signed-off-by: Prabhanjan Kandula <quic_pkandula@quicinc.com>
Update tracking of layer mixer resources to prevent valid modes
from being skipped during DP topology validation.
Change-Id: Id88337094c4113b721f307d24583a3ca30157216
Signed-off-by: Nisarg Bhavsar <quic_bhavsar@quicinc.com>
Add check to avoid programming the color processing HW if sde_crtc is
not enabled.
Change-Id: I7ffd341147f0caebefb647486a139df5c0aeab31
Signed-off-by: Ping Li <quic_pingli@quicinc.com>
sg_dma_address returns the iova address when virtual address is invloved
and physical address when S2-only or physical address is used. Replace
sg_phys with this to support in all cases.
Change-Id: Ibffe9b5cd5f4b24c1bbff92d2d95f2d16a564160
Signed-off-by: Veera Sundaram Sankaran <quic_veeras@quicinc.com>
During the gem prime_fd_to_handle, attach the drm device to the
secure camera preview buffers. For CSF 2.5 solution, the DRM device
DT will have a special entry as indication to memory driver based on
which the buffer is handled differently. For older solution, the
attaching DRM device has no impact as the secure camera preview
buffer would be S2-only buffer.
Change-Id: I18646dd947476827819b7d83504ea0af55070a55
Signed-off-by: Veera Sundaram Sankaran <quic_veeras@quicinc.com>
If the event thread worker processing vblank_notify_work is
scheduled out while holding spinlock to process the ctl-done
interrupt, it will result in a deadlock as the
frame_event_callback requires the same spinlock.
This change updates vblank notify work to use spin lock irqsave &
irqrestore to ensure we don't hit this case.
Change-Id: I96bcb3b21bf9426016f5b3ae43f7d1f8581a8483
Signed-off-by: Nilaan Gunabalachandran <quic_ngunabal@quicinc.com>
MDSS 10.0 onwards, hw supports programming of pingpong
latency buffer size based on the resolution of display.
In prior targets full size of the latency buffer is used.
This change adds required support in sde driver to program
the pingpong buffer size based on systems recommended
latency lines requirement and the display resolution.
Change-Id: I172b19e5b397eb86190de57fed36f24cd67d2207
Signed-off-by: Prabhanjan Kandula <quic_pkandula@quicinc.com>
Add case tags in eventlogs in cmd_prepare_for_kickoff to
help in differentiating the logs in this function.
Change-Id: Idce10e715c77340175d124ec3ef7ecc30c95a0af
Signed-off-by: Veera Sundaram Sankaran <quic_veeras@quicinc.com>
Currently, hdcp wait loops uses the wait_event() macro which sets the
status of the thread to WAIT_UNINTERRUPTIBLE and contributes to system
load. The macro wait_event_idle() polls for a changing condition in the
same way but instead sets the thread status to WAIT_IDLE which does not
contribute to system load. This prevents hdcp threads from appearing as
hung threads in system load summaries while still properly polling for
status changes.
Change-Id: Ie6991881d912ba6fca6bb0fd9558633b1fb83492
Signed-off-by: Andrew Bartfeld <quic_abartfel@quicinc.com>
Enable the Expected Present Time feature through the FPS for cmd
mode panels in pineapple target.
Change-Id: Ib1e3c7aaf5329004ffdf89672e919228931468ee
Signed-off-by: Veera Sundaram Sankaran <quic_veeras@quicinc.com>
Introduce a new connector property called “EPT_FPS” for the cmd
mode panels. User space will set the “EPT_FPS” based on the
intended content fps, relative to the last retire fence timestamp
as calculated by Surface flinger. Program start window based
on the Expected Present Time fps.
Change-Id: I24b93e0f941af9fb2422b2484328254d04a1acbe
Signed-off-by: Shirisha Kollapuram <quic_kshirish@quicinc.com>
Signed-off-by: Veera Sundaram Sankaran <quic_veeras@quicinc.com>
Add capability to read avr step for each timing mode. This will
be in addition to the existing avr-step-list which is defined
when dfps is enabled. Expose the avr-step as part of each
mode in connector caps to user-mode.
Additionally, change the avr_step connector property to enum
to give usermode just the capability to enable/disable avr-step
and not alter the step value as its fixed from the device tree.
Change-Id: I6d7f8e9fcf03f98abef7640fc741e5e1be8597a1
Signed-off-by: Veera Sundaram Sankaran <quic_veeras@quicinc.com>
clear cached rectangles when PU ROI is set to avoid incorrect
cached rois when two subsequent state duplications occur due
to timing. This will lead to commit N and commit N+1 to have
same cached ROIs as commit N-1. This results in issues when
commit N-1 is PU, N is full frame and N+1 is PU with same
ROI as N-1.
Change-Id: I3bb9390e500d327e703e41d64f7aaae5e5f1b4f2
Signed-off-by: Anjaneya Prasad Musunuri <quic_aprasad@quicinc.com>
Currently, QSYNC sim panels are not fully emulating panel
side logic to allow different refresh rate depending on when
the frame is received by the panel.
This change adds the logic to reconfigure the TE watchdog at
different frame rate depending on when the frame is sent to the
simulated QSYNC panel.
Change-Id: I3f0de73976a0fc5748a76c4f7ab00205d1af9a1b
Signed-off-by: Amine Najahi <quic_anajahi@quicinc.com>
Install volatile enum and range properties for UCSC IGC, GC, UNMULT
and ALPHA_DITHER. This will mark the force dirty property data as
true, and will avoid caching in driver by always applying the
property values set by userspace, rather than checking for modified
values.
Change-Id: Ib8132165fb58ddc829bf8610657e302e0798d72f
Signed-off-by: Alisha Thapaliya <quic_athapali@quicinc.com>
Add debug log to dump qtimer information after the input hw-fence
signal configuration.
Change-Id: I7617b1a6bae3db1e003c42bfe306dbe7f552ad83
Signed-off-by: Ingrid Gallardo <quic_ingridg@quicinc.com>
