커밋 그래프

1168 커밋

작성자 SHA1 메시지 날짜
qctecmdr
b299a0f04c Merge "disp: msm: sde: manage vblank refcount concurrency" 2020-06-28 04:32:57 -07:00
qctecmdr
e5e4004854 Merge "disp: msm: sde: avoid physical encoder disable(s) in trusted VM" 2020-06-28 01:57:54 -07:00
qctecmdr
1b5e5c1590 Merge "disp: msm: specify default value for msm enum property" 2020-06-27 23:15:27 -07:00
Linux Build Service Account
1a94387741 Merge "disp: msm: dp: log the status of the uevent" into display-kernel.lnx.5.4 2020-06-26 18:54:50 -07:00
Linux Build Service Account
8fb0e26527 Merge "disp: msm: sde: add xin client clock status for wb2" into display-kernel.lnx.5.4 2020-06-26 18:53:49 -07:00
Linux Build Service Account
c700dd47ea Merge "disp: msm: sde: update sspp multi rect programming" into display-kernel.lnx.5.4 2020-06-26 17:18:18 -07:00
Linux Build Service Account
7016ab641e Merge "disp: msm: dp: check ERR_PTR when creating a new connector" into display-kernel.lnx.5.4 2020-06-26 17:18:16 -07:00
Dhaval Patel
44cde01fc7 disp: msm: sde: manage vblank refcount concurrency
Vblank refcount can reach out of sync with below case
 1. event_thread triggers the vblank_enable
 2. commit_thread triggers the modeset
   2.a modeset resets the vblank refcount with mode_set
 3. event_thread triggers the vblank_disable

Event 2.a resets the vblank refcount and vblank disable
request after 2.a is going to fail. This can be fixed
by avoiding concurrency between mode_set call and vblank
request.

Change-Id: Ibb810ec90e81d63feee443f1c37dd736d5cfac0d
Signed-off-by: Dhaval Patel <pdhaval@codeaurora.org>
2020-06-25 13:54:21 -07:00
Jeykumar Sankaran
06ab29478d disp: msm: sde: avoid physical encoder disable(s) in trusted VM
VM switches during TUI usecase are expected to be seamless i.e without
display reset. In SDE language, this translates to respective display
drivers not tearing down the HW pipeline while releasing the HW.

In Primary VM, this taken care by keeping the DRM pipeline alive when
TUI is active.

In Trusted VM, since the client creates and destroys the display per
session, checks are needed to bypass the physical encoder disable(s).

Change-Id: Iac42f02806962405c9364b1ffed85778229977e9
Signed-off-by: Jeykumar Sankaran <jsanka@codeaurora.org>
2020-06-19 17:46:43 -07:00
Prabhanjan Kandula
f946219084 disp: msm: sde: update sspp multi rect programming
Current SDE driver allows staging of rect1 only configuration. When a
real plane is disabled sspp multi rect configuration is not updated.
This can lead to iommu faults and ping pong timeouts as framebuffer of
disabled plane is unmapped. This change fixes it by updating multi rect
config accordingly when a plane is disabled.

Change-Id: I67ae45ad0e607184c7fc49f4b220220ba1d8a2ae
Signed-off-by: Prabhanjan Kandula <pkandula@codeaurora.org>
2020-06-19 16:45:29 -07:00
Dhaval Patel
31d4bb10a6 disp: msm: sde: add xin client clock status for wb2
CWB may trigger frame missed message if interrupts
are disabled on specific CPU. WB2 will only find single
interrupt status for two posted start triggered frame.
SDE driver will start checking the xin client clock
status for wb2 timeout case to trigger the valid
frame done status.

Change-Id: I16a99667116732002e6dec8a18330f8b45199387
Signed-off-by: Dhaval Patel <pdhaval@codeaurora.org>
2020-06-19 16:28:14 -07:00
Jeykumar Sankaran
935af8104a disp: msm: sde: avoid MDSS register access during boot in trusted VM
Trusted VM will be assigned MDSS HW access dynamically only on TUI
use case start boundary. So, any HW access during the boot sequence
will result in stage2 faults. But SDE driver initializes few HW
blocks during the boot up sequence. This change fixes them by either
skipping those accesses, if those registers expected to be programmed
by the Primary VM or postponing those accesses until the HW is
assigned.

Change-Id: Ic85238c5d734e9ac993072374c1b0ae661708fca
Signed-off-by: Jeykumar Sankaran <jsanka@codeaurora.org>
2020-06-19 15:39:03 -07:00
qctecmdr
743dc695c4 Merge "disp: msm: sde: fix cwb enable detection logic" 2020-06-19 12:44:59 -07:00
qctecmdr
1bd126d328 Merge "disp: msm: sde: add dt property for QSEED scalar HW revision" 2020-06-19 02:38:54 -07:00
Yuan Zhao
c1c2e1ca63 disp: msm: dp: check ERR_PTR when creating a new connector
sde_connector_init will return an ERR_PTR if connector
creation failed, so need to use IS_ERR_OR_NULL to check
the return value.

Change-Id: I4fee5a624261898bbd079c54705e6eaebc71bac6
Signed-off-by: Yuan Zhao <yzhao@codeaurora.org>
2020-06-18 19:49:05 -07:00
qctecmdr
4ebc0e1f34 Merge "disp: msm: dp: add private state to dp_mst_bridge" 2020-06-18 16:02:54 -07:00
qctecmdr
05617b0c83 Merge "disp: msm: dp: take port refcount for MST sim ports" 2020-06-18 16:02:54 -07:00
Jeykumar Sankaran
e81f110f6e disp: msm: sde: make mnoc icc paths optional
ICC frameworks may not be enabled for all the OS
environments. SDE is expected to work in the environments
where ICC paths are not defined e.g Trusted VM. Except
mnoc bus, SDE is keeping all the other paths optional.
This change adds mnoc bus to the optional list.

Change-Id: I1e3d31a3b0f49fb32041bc7e2192b014f6497267
Signed-off-by: Jeykumar Sankaran <jsanka@codeaurora.org>
2020-06-18 11:28:46 -07:00
Jeykumar Sankaran
cb4f390241 disp: msm: sde: add helper api to check executing VM
Adds a DT property to indicate trusted VM execution
environment and support catalog parsing for the same.
Add helper API to read the value.

Change-Id: I9194618b6f080119f1f15271a9b3c7edf938ca08
Signed-off-by: Jeykumar Sankaran <jsanka@codeaurora.org>
2020-06-18 11:28:40 -07:00
Dhaval Patel
1eda6392b0 disp: msm: sde: fix cwb enable detection logic
Existing cwb enable detection logic relies on
crtc id matching with each encoder->crtc. This
may not be available on first power on commit
because it updated after encoder_atomic_check
call. This patch fixes the cwb enable detection
logic by checking the encoder_mask on crtc_state.

It also fixes the cwb concurrency with mode_set
and secure display.

Change-Id: I70f656dd9e7d94d3ba761c25745b473a1c204173
Signed-off-by: Dhaval Patel <pdhaval@codeaurora.org>
2020-06-17 16:49:16 -07:00
Jeykumar Sankaran
b87b13690b disp: msm: specify default value for msm enum property
Allow caller to specify the default value of the enum
property while installing with msm prop layer. It is
not always the case that the default value to be the
first entry.

Change-Id: Ie0bb1ad7479e3e07810b3d817fdf618b1935858c
Signed-off-by: Jeykumar Sankaran <jsanka@codeaurora.org>
2020-06-17 15:36:33 -07:00
Sankeerth Billakanti
a0cc0eceee disp: msm: dp: add private state to dp_mst_bridge
Current dp_mst_bridge has variables that are accessed by both
check phase and commit phase, which causes racing issues. This
change will add private state to dp_mst_bridge to separate check
phase and commit phase.

Furthermore, this change is a partial rollback of commit 2446602565ec
("drm/msm/dp: add private state to dp_mst_bridge") where active_enc_cnt
is removed. In this change we retain the encoder availability check in
mode_valid.

Change-Id: I8ac05cf5f1755375e4e9f34e42dbaea1d23bac64
Signed-off-by: Xiaowen Wu <wxiaowen@codeaurora.org>
Signed-off-by: Sankeerth Billakanti <sbillaka@codeaurora.org>
2020-06-16 13:30:14 -07:00
Steve Cohen
199065f8be disp: msm: dp: take port refcount for MST sim ports
The single "port" refcount has been split in 2 on 5.4.  MST sim
layer is only getting the topology refcount but never initializes
or obtains references for the memory allocated for this port.
Add the new refcount logic required on 5.4 to MST sim layer.

Change-Id: I6e25c048fa26352c4fb718996514a1ca91432408
Signed-off-by: Steve Cohen <cohens@codeaurora.org>
Signed-off-by: Rajkumar Subbiah <rsubbia@codeaurora.org>
2020-06-16 13:30:08 -07:00
Satya Rama Aditya Pinapala
2d62ccb15b disp: msm: add func to parse pll_codes from dfps_data_region
Add function to parse pll_codes from dfps_data_region, and the
pll_codes are used as trim_codes for RFI.

Change-Id: Ic81529cd685f17012809fb68cefc4b36cb1172ca
Signed-off-by: Satya Rama Aditya Pinapala <psraditya30@codeaurora.org>
2020-06-16 13:30:02 -07:00
qctecmdr
4b24ccb9d8 Merge "disp: msm: sde: avoid access out of range issues in sde cp code" 2020-06-12 22:59:38 -07:00
qctecmdr
654eed0a06 Merge "disp: msm: sde: allow frame_done count to reach till 2" 2020-06-12 22:59:38 -07:00
Jeykumar Sankaran
fdf88f7853 disp: msm: sde: add dt property for QSEED scalar HW revision
QSEED scalar block HW revision is constant for a given MDSS revision.
Both SSPP and DS HW files invoke this API to read the revision register
at various points of time. Expose this revision information through
DT binding and maintain in the catalog to avoid repeated register
reads.

Change-Id: I95c0a5242cfda0aaa4ec5c2ff5c7cc0bed191b59
Signed-off-by: Jeykumar Sankaran <jsanka@codeaurora.org>
2020-06-12 14:29:42 -07:00
Jeykumar Sankaran
7f35be34eb disp: msm: sde: rename qseed_type to qseed_sw_lib_rev
Rename the property to qseed_sw_lib_rev to indicate that it
represents the qseed sw library revision that is compatible with
the targets qseed hw version.

Change-Id: I5a588dc20cf4a4f76f5c71301538bfc630ea220d
Signed-off-by: Jeykumar Sankaran <jsanka@codeaurora.org>
2020-06-12 14:29:25 -07:00
Tatenda Chipeperekwa
3efe89facb disp: msm: dp: log the status of the uevent
Log the status of the call to kobject_uevent_env so we know
whether the uevent was sent successfully to the userspace.

Change-Id: I4fd5f9b51d9771dab399e322d678411f824c8aba
Signed-off-by: Tatenda Chipeperekwa <tatendac@codeaurora.org>
2020-06-12 13:56:39 -07:00
qctecmdr
0545182f17 Merge "disp: msm: dp: skip creating dir when debugfs is disabled" 2020-06-12 08:04:21 -07:00
qctecmdr
b61dbb8b6c Merge "disp: msm: sde: make all HW definitions unsigned" 2020-06-12 08:04:21 -07:00
qctecmdr
d81410b268 Merge "disp: msm: dp: update checksum for edid corruption test 4.2.2.6" 2020-06-12 08:04:21 -07:00
qctecmdr
1bb125ecb6 Merge "disp: msm: dp: set aux initial status to abort" 2020-06-12 03:53:37 -07:00
qctecmdr
68a42554a1 Merge "disp: msm: sde: remove pipe fetch halt check on real plane" 2020-06-12 03:53:37 -07:00
qctecmdr
d832e58ba2 Merge "disp: msm: dp: return -ENODEV when USBPD module is not enabled" 2020-06-12 03:53:36 -07:00
qctecmdr
d9b4204aad Merge "disp: msm: sde: add vig formats before qseed and csc initializations" 2020-06-12 00:11:19 -07:00
qctecmdr
88abc2fad2 Merge "msm: sde: Uprev IGC version to 4.0 to indicate existence of LUT 257" 2020-06-11 20:34:33 -07:00
Dhaval Patel
bbcb96a8e5 disp: msm: sde: allow frame_done count to reach till 2
A frame trigger with posted start may have two frames
in wait state due to irq disable on that CPU. In such
case, frame_done count can reach till 2. Allowing count
only till 1, can cause the release_fence trigger miss
and a buffer is held by DPU driver.

Change-Id: I42c10b064ebcaff136591975f3010c11f99a0731
Signed-off-by: Dhaval Patel <pdhaval@codeaurora.org>
2020-06-11 17:28:01 -07:00
Tatenda Chipeperekwa
11a51b0ef5 disp: msm: dp: return -ENODEV when USBPD module is not enabled
Return ERR_PTR with -ENODEV when the USBPD module is not
enabled. This allows the DP driver to handle the failure
correctly and prevents any potential NULL pointer
dereferencing in the clean up path.

Change-Id: I4fbc559276bebe770a27935243a59c10c1bb5491
Signed-off-by: Tatenda Chipeperekwa <tatendac@codeaurora.org>
2020-06-11 12:53:43 -07:00
Nilaan Gunabalachandran
ebc016b6e4 disp: msm: sde: make all HW definitions unsigned
Treating hw version as a signed int results in a negative
number when major version is more than 7, leading to errors
when comparing versions in the driver. Fix this by making
sure all HW version definitions and variables are unsigned.

Change-Id: Ic77183f85e5408092e05817cf95df5b0f0fcac75
Signed-off-by: Nilaan Gunabalachandran <ngunabal@codeaurora.org>
2020-06-11 08:36:05 -04:00
Dhaval Patel
5d8bfac54d disp: msm: sde: remove pipe fetch halt check on real plane
SDE driver started supporting multirect mode with rect_1 only
configuration. In such case, master plane can not trigger
pipe fetch halt independently. This change removes the pipe
fetch halt check completely because it was only done for
master plane without buffer flip usecase. AXI fetch halt
provides similar functionality during idle power collapse
and suspend-resume.

Change-Id: I79d9d0eac2de95f1bb88561c7cc259e0cc4b2ca4
Signed-off-by: Dhaval Patel <pdhaval@codeaurora.org>
2020-06-10 18:23:11 -07:00
qctecmdr
621a624d8c Merge "disp: msm: fix kw issues in sde driver" 2020-06-10 17:06:50 -07:00
Christopher Braga
a17846fecd disp: msm: sde: avoid access out of range issues in sde cp code
Address out of range issues due to faulty and missing
array size checks.

Change-Id: I2aefb1b8d4015a73ea87a64182e090247f5a9da0
Signed-off-by: Christopher Braga <cbraga@codeaurora.org>
2020-06-10 15:10:41 -07:00
qctecmdr
8975496690 Merge "disp: msm: sde: adjust DSC encoders to support all 4LM topologies" 2020-06-09 23:42:41 -07:00
Christopher Braga
394f727493 msm: sde: Uprev IGC version to 4.0 to indicate existence of LUT 257
Change IGC version to 4.0 to clearly indicate that support
for LUT 257 in DSPP is now supported and expected.

Change-Id: Ie3bb5b0150bdf6c332f86d0ae416b4f6fc42e70f
Signed-off-by: Christopher Braga <cbraga@codeaurora.org>
2020-06-09 18:41:48 -07:00
Rajat Gupta
05a35f8446 disp: msm: dp: skip creating dir when debugfs is disabled
When CONFIG_DEBUG_FS is disabled skip creating root directory.

Change-Id: I97bed925392b781b73687164ca55e6cb09f951fc
Signed-off-by: Rajat Gupta <rajatgu@codeaurora.org>
2020-06-09 14:41:09 -07:00
Amine Najahi
ed868466f5 disp: msm: dp: Extend mode filtering to support 8K
Currently DP driver determines if a mode is DSC capable
based on a DTSI entry and the required number of DSC
to support it. This approach does not scale when there
is an overlap in DSC requirement between DSI displays
and external DP display, thus causing one of the display to
report modes that cannot be supported.

This change compares the resources reserved for DP driver
calculated at initialization time and the currently available
ones to determine the correct number of resources that DP driver
can use. It also adds DSC and topology filtering logic and moves
DSC hardware specific from DP driver to SDE driver.

Change-Id: I8e601de33422b7c6d786826f7bfe152c4af8a6b5
Signed-off-by: Amine Najahi <anajahi@codeaurora.org>
2020-06-09 09:17:38 -04:00
santosh
fb72c8faa8 disp: msm: sde: add vig formats before qseed and csc initializations
Setup vig pipe makes an early return if csc and qseed are
not supported. This change moves addition of vig formats
before intializing qseed and csc.

Change-Id: I2eb651f7bbd81757a9de23501fda51a510d0e673
Signed-off-by: santosh <santoshkumar@codeaurora.org>
2020-06-08 11:40:05 -07:00
Jayaprakash
19253d6e19 disp: msm: sde: modify the args for sid switch call
Modify the size of SID's passed as an argument during
scm call as per client requirement.

Change-Id: Idd3bb57a8f9e0a4e7eb6a23d96bfa5b68510063a
Signed-off-by: Jayaprakash <jmadiset@codeaurora.org>
2020-06-08 11:39:59 -07:00
Krishna Manikandan
9cb06f9b21 disp: msm: avoid unlocking mutex_lock twice
Remove mutex unlock from msm_gem_get_iova_locked
as acquiring and releasing the lock are handled
in the caller function.

Change-Id: Ie4a8408d3e6308d19eb26aafee8dfe15bcb682da
Signed-off-by: Krishna Manikandan <mkrishn@codeaurora.org>
2020-06-08 11:39:54 -07:00