REO module may hang when REO commands are queued after WoW enable WMI
sent to FW. Change is used to check WoW progress before accessing REO
CMD ring. If WoW is in progress, then defer REO commands.
Change-Id: I9cd8390e77ef33f98f84cb604f152e3f9a0e4203
CRs-Fixed: 3362608
Added support for parsing firmware to software tlv. which is mainly used
for populating frequency of the current packet.
Change-Id: I67c552e6d6b5caf9c12c34e553bad70b89b30c40
CRs-Fixed: 3270364
Use destination chip and pmac IDs from TLV.
Build flag for HW assist feature is not enabled yet,
so code is not exercised.
Change-Id: Ia9175d6597a7a2780f451d99a9f8ece7a16049e5
CRs-Fixed: 3262344
waikiki supports sending a packet from REO2PPE if a flow
rule matches. these changes are added to take advantage of
this HW feature when ever we are adding a flow rule
CRs-Fixed: 3359141
Change-Id: I8fedfcc759bc0427d71d3bb615e61ba38577c5c0
The current field width for bandwidth parsed from
tx completion status is only 2-bits, which is not
sufficient for 320 MHz and 240 MHz, since these enum
values are 4 and 5 respectively, which needs a
minimum field width of 3-bits to store.
Increase the field width of bandwidth in the tx
completion status data structure to account for
320 MHz and 240 MHz enum values.
Change-Id: Ie108f31537607ab9ebf6510542b8967c0272e383
CRs-Fixed: 3359371
The kernel-doc script identified a multitude of documentation issues
in hal_rx.h, so fix them.
Change-Id: I36913abcfea5504b1fdea2afb5c71810b08e4da6
CRs-Fixed: 3352421
Suspect HW update WBM2SW ring HP, but the ring entry contents are
not updated accordingly which then host will fetch one stale ring entry,
this makes other TX packet are freed unexpectedlly.
Add change to detect this situation earlier, if HW cookie conversion is
done, then invalidate 2nd dword for upper 32bits of VA, so next time when
reap this ring entry contents to know if this desc is updated by
HW or not. if HW cookie conversion is not done, then compare the PA in
buff_addr_info with PA in current TX desc to check.
Change-Id: I351eb4f860216fc618ff28736d4832fcec45dcc5
CRs-Fixed: 3345935
Add a new api to read tsf2 and tqm scratch register for qca5332.
The function to read these registers are different from that of qcn9224
since qca5332 is a AHB radio and reading register involves ioremap of
address range.
Change-Id: Ib05df2ddf528594ae67109f8bcb409424a4350a2
CRs-Fixed: 3331476
Retain ds ring indices across wifi restart to avoid
edma hang. Fetch the indices from ds module and set
the corresponding ds ring indices.
Change-Id: Ia299a7006166aef096c7d2c1f65f6bef65415a37
CRs-Fixed: 3332152
With CONFIG_NO_TLV_TAGS=n, seeing below values showing in dump.
sizeof(struct rx_msdu_end_tlv) = 136
sizeof(struct rx_mpdu_start_tlv) = 128
Indeed these values match current comments for CONFIG_NO_TLV_TAGS=y.
Therefore correct the comments for rx_msdu_end_tlv and
rx_mpdu_start_tlv length for better readability.
Change-Id: I655f8fb9df09f5f7bb63f4bb2e3f297725354fbe
CRs-Fixed: 3340399
Below signature is seen on sdxpinn when HOST reads IPA TX
doorbell address, which leads to HLOS crash.
Internal error: synchronous external abort: 96000010
Indeed IPA TX doorbell address is write-only. Behaviors
on such read access violation is arch-dependent. On
certains platforms, such violation is ignored but read
returns 0.
Hence remove the read access to IPA TX doorbell address
in hal_srng_dst_init_hp() to avoid arch-dependent
behavior.
Change-Id: I3486cd81741922e697e2b3d307db3209b710aa6a
CRs-Fixed: 3339302
Add debug count for count MPDU received based on preamble type,
reception type, UL/DL and user for max 4 user for MU monitor
mode
Change-Id: I87f1553e1f2f8276501366a825d629cf051d8a80
CRs-Fixed: 3326272
The MSI address and data information for Direct Link
copy engines will be available once the WiFi driver
on LPASS is initialized. Add support to configure the
IPCC address and data values into Direct Link copy
engines at runtime.
Change-Id: I5e7dff90c2f1ff764462c235deb5795ed019a16b
CRs-Fixed: 3316679
Add support and ops for initialization and
deinitialization of Direct Link refill ring.
Change-Id: I2c7018c4f8411fb7a590cfbb8b991f9152b22397
CRs-Fixed: 3316656
When Multivaps are configured in a radio, the vdev_id's are
not updated as expected.
With the changes, the vdev_id are properly updated in the registers
Change-Id: I7d987e96bd0f8a91f13025fa6975415ea235ce12
CRs-Fixed: 3318563
Add support to read TSF2 and TQM scratch regitser in the HAL layer
for WKK v1 and v2 board.
Change-Id: I0ef5e8cf4e06c0b5c98169252a81f70989285d2d
CRs-Fixed: 3321782
For Multi chip configuration, assign appropriate value for
Return Buffer Manager(RBM) idle link descriptors based on chip_id.
CRs-Fixed: 3314584
Change-Id: I1a2f9a09b04960aff01b4ec625110e0619a9850b
Currently the monitor mode filter settings are set
for both the PMAC. Hence it is possible that the
non-monitor PMAC (the PMAC on which monitor vdev
is not running), can receive packets and forward them
to the monitor destination ring.
The above scenario will lead to a ppdu_id mismatch
when reaping the monitor status ring and comparing
the ppdu_id in status ring with the one in monitor
destination ring, since monitor status ring will
have ppdu_id from the PMAC on which monitor vdev is
running, whereas monitor destination ring will have
packets from both the PMAC.
In order to mitigate the above issue, detect the
packets in the monitor destination ring, which are
not from the PMAC where monitor vdev is running, and
drop them.
Change-Id: I32392ceeadffd9cb7a4dd76336004a9dcbb99404
CRs-Fixed: 3318036
Add control frame stats accounting support.
Accumulate both per peer BAR and NDPA counts in Tx and Rx per PPDU stats
path. Accumulate per peer RTS success and failure count only in per PPDU
Tx stats path.
Change-Id: I78fb3546cd831559e208a7330feb2eb67b9a28de
CRs-Fixed: 3313435
get the HP of the RXDMA ring without incrementing
This will ensure in case of nbuf failures the ring
HP remains unchanged
Change-Id: I69ec9207a44a4c50484933797326e962ad2d4a5c
CRs-Fixed: 3309394
Adding compact tlv support for QCN9224, As part of this change
Rx tlv size will reduce from 384 bytes to 128 bytes.
Change-Id: I3f42a781e42b2e696a5b25d9c5f333c8cc83b7fe
CRs-Fixed: 3274152
In case of Beryllium, REO hardware expects the REO destination indication
needs to be set in extended MSDU structure to consider the reinject of
packets after defragmentation to REO2SW1 ring.
Set the REO DESTINATION INDICATION in msdu_ext_desc_info in case of
Berylliyum initialization while setting MSDU desc info.
CRs-Fixed: 3306818
Change-Id: I6a7862a0448afeb169e04747c1dba352ce12c278
When the length of a 802.11 frame is more than the
size of the posted receive buffers, it is split across
multiple buffers, which have to be accumulated before
submitting to network stack.
For all-but-last buffer which are used for the above
mentioned large 802.11 frame, the MSDU_CONTINUATION
flag will be set indicating that remaining data of the
same msdu has been DMA'ed to the next buffer.
The current implementation in monitor-1.0 works for
legacy chipsets, where MSDU_START tlv is available and
hence the aforementioned information was available in
all the buffers containing the large 802.11 frame.
For kiwi target, there is no MSDU_START tlv, and hence
a lot of information eg: mpdu_len_err, decap_format and
l2_hdr_offset are not available in the buffers where the
msdu_continuation flag is set. This leads to an attempt
of mpdu_restitch using incorrect data from tlv, and hence
the mpdu_restitch fails for such large 802.11 frame.
Fix this issue for kiwi target, by gathering all these
information which are available in the last buffer and
are used to process/accumulate the entire 802.11 frame.
Change-Id: I1c4fc9fd574c1c5fabc845407aa6f2d990c60906
CRs-Fixed: 3261494
For 802.11 Fragmented frames, currently there is a
generic GetFrameControl API from RX TLV for all Li
Chipsets. As the offset for frame control in RX TLV
is different for QCN9000 and QCA8074V2, reading the
frame control with generic API gives wrong frame
control value. The Offset is different as the size
of RX_MSDU_START struct is 8DWORDS in QCA8074v2 while
it is 9DWORDS in QCA9000. In the reo reinject path
the destination queue descriptor address read from ring
descriptor address is Invalid
Fix is Separating out the GetFrameControl API from
generic API to Chip specific API. Also fix the reading
of queue descriptor address.
CRs-Fixed: 3280809
change-Id: Ifc5eca31b9b7e70c84ca455d56a58c27601cd51d
certain BE specific HAL APIs were only initialized for
KIWI chipset but not for WKK. Now moved all these APIs
under beryllium generic initialization.
These APIs are mainly used in de-frag pkt handling.
CRs-Fixed: 3294784
Change-Id: I6611f1b7ef80b432d24a490ba65880dd55539137
Raw mode mpdus in REO end up resulting in NULL_QUEUE_DESCRIPTOR error.
Raw mode mpdus are not expected in REO, free them without further
processing.
Change-Id: Ica920caecf90a1107ce17836051e1019c9dfc994
CRs-Fixed: 3282836
Add support for,
a) HE MU radiotap information
b) Multi sta BA frame generation and
minor fix,
a) handling timestamp NULL,
b) update NSS and other field in radiotap
Change-Id: I7a8b95328779f967b9e63ff8048242412ab472b0
CRs-Fixed: 3270361
sgi is getting overwritten in cmn usr TLV.
Add check if sgi and ltf_size is already set.
CRs-Fixed: 3279670
Change-Id: I8260eb71230b2c218e45460adc8f404a19eefa80
1. Changes to get correct write address in hal_get_window_address_5332.
2. Fix for monitor init crash - Added dummy entries to match the
ring_id.
Change-Id: If59b1c231d4595a95e7c1f02de1dbe0ce27a8805
CRs-Fixed: 3268933
When FW was enabling WOW, a ring HP update interrupt is seen
which led to fw crash.
This change records any PCI writes that went through during
runtime suspend from host.
Change-Id: I3c44760ebaf49a131b483813522fe3e451957215
CRs-Fixed: 3280166
