Currently in some case we are receiving non error packets on REO2TCL
ring, which is causing issue.
Fix is to set DEST_RING_MAPPING_0 to SW1 for REO dest ctrl
register, So that non error packets with reo_destination_indication
with 0x0 in the reo entrance ring will be routed to SW1 ring.
Change-Id: I67f78f35e7dba899943307902d99d0325a60498f
CRs-Fixed: 3150186
Enable the 4th Tx. completion ring to save CPU load
Initialization and interrupt handling for 4th completion ring
is done here.
Change-Id: I2db27218a3c3e14d719d012f03454a6a7aa647fe
In WBM error processing read peer_id from peer_meta_data
instead of sw_peer_id.
This changes is needed because we need to process Rx packet
on ML peer. But in MLO case sw_peer_id field contains
link_peer_id where as peer_meta_data has ml_peer_id.
Change-Id: I3f469adfdf7efa88cb081e94fa9fe0c54c1fb078
In order to support flow overide feature,
AST table has to be split between RxPCU and DDR.
With this split, RX monitor cannot make use of
ast_index to fetch peer as it is not from DDR.
So make use of sw_peer_id to fetch peer.
This sw_peer_id is derived from RX_MPDU_STAT_START_TLV
Change-Id: Ib2a003a2640fded3287c318d2ad59fd3127af9b6
CRs-fixed: 3004363
HAL generic APIs which use HW definitons that
do not have same value across all lithium chipset
are moved to header files. So that these will be
compiled with appropriate header files
Change-Id: I6c167afa4212c5e884f5e18ff1ccb3bbbba8f5f5
Currently the hardware srng register offset is statically
assigned to the handle. This can lead to incorrect index access
when targets (eg: wcn7850) is added which require additional
register offsets to be stored in the hw srng register offset table.
Move to the index based assignment of the srng register offset.
Change-Id: I8e38bdd0c28068029a0267fce706edf4378b9df8
CRs-Fixed: 2965081
Assign th HAL TX/RX ops in a function instead of assining a structure
directly. This can be later extended to have default ops for a family of
chips and then override that with chip specific ops.
This also helps the case where a new hal_soc->ops needs to be added.
The new 'op' will need to be added to only a default ops initializer
(with assumption that it applies to all chips).
Change-Id: Iefa23d14110fa5252444fad89737a3b2b2fbab6f
CRs-Fixed: 2891049
Currently the FW configures the mac with appropriate
offsets for rx pkt tlvs using the structure defined in
te FW and the host does not send the ring selction config
HTT message. This can create a problem when FW stops subscribing
to tlvs or changes its rx pkt tlvs offset.
Fix this by configuring the rx pkt tlv offsets via HTT
ring selection config message.
Change-Id: I1a2865f91b34dd7bda1af8651d7831097dac0bee
CRs-Fixed: 2860504
