Rename all instances of a5 and lx7 to icp_v1 and icp_v2
respectively. Remove all mentions of lx7 or a5 in icp_hw_mgr.
Relocate lx7_hw and a5_hw directories to a new directory -
icp_proc which contains a new file to provide related a5 or lx7
interfaces to icp_hw_mgr. Thus, icp_hw_mgr is agnostic to icp proc.
Place common functions and common global constant into icp_proc_common
file. Remove a5/lx7 soc files and create a common soc file for both.
Modify kbuild file to account for directory or file changes.
CRs-Fixed: 3162183
Change-Id: I7e0cfd2a2917f129097a517af3bd39578f85293d
Signed-off-by: sokchetra eung <quic_eung@quicinc.com>
The index of sfe out res in bus_priv is based on
the sfe out type, rather than the out index, So
we need to get the sfe out type by the out index
first, then get the sfe out res by sfe out type.
CRs-Fixed: 3165425
Change-Id: Ic35f6b5b23a0997c2f05f8950d0a82f488185d39
Signed-off-by: Depeng Shao <quic_depengs@quicinc.com>
In rare scenarios, FD is getting released by userspace
before incrementing the ref count. We see failure in
dma_buf_get API as FD is released but we are still
tying to decrement ref count in case of dma
buf get failure.
We are seeing use-after-free as the buffer is released.
This fix includes get_file API to increment ref count
before dma_buf_fd.
CRs-Fixed: 3156174
Change-Id: Ie9588ec10e65cbb8fa155badda4f3e5fb81c0525
Signed-off-by: Chandan Kumar Jha <quic_cjha@quicinc.com>
Remove the redundant CDM Register Write to IRQ mask
register just before the CDM Reset command. Intention
behind this register right is to ensure that the cdm
IRQ for Reset Done is enabled before we issue a reset
command. However, the reset value of the IRQ Mask
register always enables the reset done IRQ. Therefore
we can remove this redundant Register Write.
CRs-Fixed: 3163466
Change-Id: Ibcf55d17bb42de6ff1ad15fb542d8f682158b609
Signed-off-by: Jigar Agrawal <quic_jigar@quicinc.com>
Add CDM Debug register dump when the Bubble is detected due
to cdm callback not received.
CRs-Fixed: 3163463
Change-Id: I028ac9216704d14cc51648b0a5a78b0a2a366f12
Signed-off-by: Jigar Agrawal <quic_jigar@quicinc.com>
This change does hw recovery and reapply all alive requests
for bus overflow issues.
When we face bus overflow KMD fatal errors, instead of
sending error to UMD, we will try internal recovery and
send a warn message to UMD once internal recovery happens,
if we fail to do recovery, then sending error to UMD.
CRs-Fixed: 3098892
Change-Id: Idee3679ff06227f985e106470bc1f5a14c9cb404
Signed-off-by: chengxue <quic_chengxue@quicinc.com>
Signed-off-by: Depeng Shao <quic_depengs@quicinc.com>
This change fix unused error in cpas during compile when enable
CONFIG_CAM_TEST_IRQ_LINE and CONFIG_CAM_TEST_IRQ_LINE_AT_PROBE
issue, also fix can not find cdm irq line test interface when only
enable CONFIG_CAM_TEST_IRQ_LINE issue.
CRs-Fixed: 3169889
Change-Id: I673b150508d38bcf71ad33a5a9b38c6dff9a9578
Signed-off-by: zhuo <quic_zhuo@quicinc.com>
Shared memory is initialized by CRM and used by
other drivers; with CRM not active other drivers
would fail to access the shared memory if
memory manager is deinit. Reader Writer locks can
prevent the open/close/ioctl calls from other drivers
if CRM open/close is already being processed.
Issue observed with the below sequence if drivers
are opened from UMD directly without this change.
CRM Open successful,ICP open successful,
CRM close in progress, ICP open successful,
mem mgr deinit and CRM close successful,
ICP tries to access HFI memory and result in crash.
This change helps to serialze the calls and prevents
issue.
CRs-Fixed: 3019488
Change-Id: I84d50918713686a067c0e3deb64c9c6ae9edfcb5
Signed-off-by: Tejas Prajapati <quic_tpraja@quicinc.com>
Added support for new cdm status register for SM8650.
CRs-Fixed: 3147223
Change-Id: I35392cfb35613a777664e1fae2c24b0150c5b8ef
Signed-off-by: Li Sha Lim <quic_lishlim@quicinc.com>
When validating input/output formats in CSID, if there
is an error, it is being dropped and returned as success.
Handle this to ensure error is propagated from CSID to
HW manager.
CRs-Fixed: 3163468
Change-Id: Ic822feb4ca7418a68ed10ab9a17f72c2408d4759
Signed-off-by: Karthik Anantha Ram <quic_kartanan@quicinc.com>
In case of multi vc-dt fetch engine use-cases, validate
the input format for each VC, they are expected to be the same.
Different input formats for each VC for SFE FE use-cases, is
not supported.
CRs-Fixed: 3163468
Change-Id: I73aab062bc316f01af4fdbf3eb0155c7e1b2719e
Signed-off-by: Karthik Anantha Ram <quic_kartanan@quicinc.com>
This change is to print log in rate limit on unified SOF v4l2
error.
CRs-Fixed: 3099416
Change-Id: I2fed0c05a8180527cf5870406c43c952505956c6
Signed-off-by: Ayush Kumar <quic_ayushkr@quicinc.com>
In case of HFR, align the frame increment to 256 to support
36 bit addresssing scheme on Kailua.
CRs-Fixed: 3150471
Change-Id: Ib71132a73a0d07a012ca960718be69a8456a07b8
Signed-off-by: Karthik Anantha Ram <quic_kartanan@quicinc.com>
Upon Page Fault, smmu driver invokes faulted client's callback
which looks for faulted buffer and context. The client driver
can be ISP, ICP, JPEG, IFE CDM and CPAS CDM. The driver then
fills PF msg struct, logs related info, and notify PF msg to
userspace. Userspace is expected to abort and calls to shut
down kernel drivers. When Titan powers on next session, CAMSS
undergoes async reset.
This change also ensures the page fault related changes added
to TFE, OPE, CRE do not break the drivers compilation.
CRs-Fixed: 3156671
Change-Id: Icd6c8c9a38cac206fe8260d374d03964fb280879
Signed-off-by: sokchetra eung <quic_eung@quicinc.com>
Currently the ope request timeout value for RT and NRT context
are same. In some usecases, NRT request processing takes more time.
Hence, initialize the RT and NRT request timeout value separately.
CRs-Fixed: 3082993
Change-Id: I17e86d26403fb21cdff518a81dee7a19c865144e
Signed-off-by: Alok Chauhan <quic_alokc@quicinc.com>
For IFE only use-cases bump up the max number of configs
from 25 to 30, to support dual IFE requirements on Kailua.
CRs-Fixed: 3163468
Change-Id: Iffa5735fba3f8271b47ad368437b9174244ef889
Signed-off-by: Karthik Anantha Ram <quic_kartanan@quicinc.com>
Due to the scheduling delay, We are seeing back to back
two top half for buff done for 2 different requests
but we were expecting the bottom half after 1st top half.
We update the last consumed address in the bottom half so
we have 2nd req buffer address in last consumed reg as
we received 2nd req top half before 1st req bottom half.
We increment num_ack variable of 2nd request in case
of 1st req buff-done as it had 2nd buffer address in
last consumed address.
Ack is going beyond during the 2nd req buff-done.
This check will prevent duplicate acknowledgment increment.
CRs-Fixed: 3165255
Change-Id: I9ea3bca2a782bae6017565f30162484adf2fc789
Signed-off-by: Chandan Kumar Jha <quic_cjha@quicinc.com>
Select the clock corner of tpg source clock based on the input clock
received in the globalconfig command.
CRs-Fixed: 3164948
Change-Id: Ib945e0f82790d3a33ac5028850ef55a806c84784
Signed-off-by: Rishab Garg <quic_rishabg@quicinc.com>
For RDI only context EOF is not notified; it should be
notified, for the corner case if the flash is
configured to apply at EOF then it will block apply for
ISP on SOF as well until the EOF is notified, this
change adds EOF notification.
CRs-Fixed: 3091241
Change-Id: If6d974d092d640d9def89bbcf7a88fba0d85579b
Signed-off-by: Tejas Prajapati <quic_tpraja@quicinc.com>
camera-kernel:
71e118f Merge "msm: camera: csiphy: Add support for SM8650" into camera-kernel.lnx.dev
3669f21 Merge "msm: camera: csiphy: Add support for multiple AON Cameras" into camera-kernel.lnx.dev
989d5ff Merge "msm: camera: cdm: Remove Kernel Internal Buffer for Gen IRQ" into camera-kernel.lnx.dev
Change-Id: I99fdc36124335a26c7badfbd0bb74ac405ab355c
Signed-off-by: Savita Patted <quic_spatted@quicinc.com>
Currently we allocate the memory for CDM GENIRQ command
within the Kernel on every stream on. Presil framework
do not have an ability to transfer the kernel only buffers
to the user daemon. For that reason we need to add support
to use the user allocated command buffer instead of the
kernel generated memory to add the GenIRQ cdm command
while submitting BLs. This change also helps to reduce
the stream on and stream off latency by not having to
allocate and free the GENIRQ memory on every stream on and
stream off respectively.
CRs-Fixed: 3115399
Change-Id: Ic159efd56fb9c4480ed1eb25cf2c058cbb914332
Signed-off-by: Jigar Agrawal <quic_jigar@quicinc.com>
Add bring up sequence header and driver support
for SM8650.
CRs-Fixed: 3149299
Change-Id: I072f3dd57f99c1625f58e90711e6908e6e97efe9
Signed-off-by: Jigar Agrawal <quic_jigar@quicinc.com>
Add support for more than one AON cameras for SM8650 target.
CRs-Fixed: 3149294
Change-Id: I842317ab59812109785a026fd0f728baf837b27f
Signed-off-by: Jigar Agrawal <quic_jigar@quicinc.com>
Modify sequence of CDM page fault handling to include pausing
cdm, setting global CDM PF bit, and streaming off all clients.
It also reduces PF handling latency by omitting CDM HW reset when
calling CDM stream off. While handling page fault, the faulted CDM
hw would not service all APIs to clients (except release) until all
clients release the CDM.
CRs-Fixed: 3156647
Change-Id: I3532bf68ba59800b2084dee252d7fd0807e0c68a
Signed-off-by: sokchetra eung <quic_eung@quicinc.com>
Fix error log in cci core so arguments match formatter.
CRs-Fixed: 3127448
Change-Id: I0af1121349868fc9b543a48d95429d267ab2cf26
Signed-off-by: Joshua Florez <quic_jflorez@quicinc.com>
RDI LCR variable is defined as bool in place of uint32_t causing
corruption of value.
This commit fixes this issue.
CRs-Fixed: 3153295
Change-Id: Ibbdd6617b4f738a6e047938e51d5bd613749854b
Signed-off-by: Gaurav Jindal <quic_gjindal@quicinc.com>
Separated ISP register dump from LDAR dump, fixed issue where LDAR dump
would fail if no active requests found, removed excessive logging function
call in ISP state monitor dump, fixed pending request/applied request dump
order to match tags in context utils, added more info from ISP stream.
CRs-Fixed: 3142549
Change-Id: Iaf25c0313714b5a776e3db81c11e96c7762d0f6e
Signed-off-by: Joshua Florez <quic_jflorez@quicinc.com>
Add and implement sysfs parameters to inject errors to
camera HW on demand through UMD for IFE,ICP and JPEG.
CRs-Fixed: 3115857
Change-Id: I4376fe31016cd81ad7e6f04cbc55e8ce010a6154
Signed-off-by: Pranav Sanwal <quic_psanwal@quicinc.com>
Currently, for sfe cases, we are searching for ife src corresponding
to ife rdi out resource, which is bound to fail. Add sfe rdi out
resources to map to ife src resource, which can be used in vfe top
to configure pdaf input config.
CRs-Fixed: 3149309
Change-Id: I51ca142bfa4a17ce10a18ce764799f46e029c347
Signed-off-by: Mukund Madhusudan Atre <quic_matre@quicinc.com>
Currently, we are writing reset values to frame/line/pxl drop
pattern and period registers at stream on, which is not required.
Also, this can overwrite any init config that user space might be
programming. Skip writing these registers in csid.
CRs-Fixed: 3144774
Change-Id: Iea253345467e12c068ab2c938ca8aadc591997ce
Signed-off-by: Mukund Madhusudan Atre <quic_matre@quicinc.com>
- Added Voting Option for APP Port send from UMD.
- Adding Path type and transaction type for CRE.
CRs-Fixed: 3081144
Change-Id: Id5e8eb8d41cc2354d76f9dbbad8dfb3e09cf66a3
Signed-off-by: Alok Pandey <quic_akumarpa@quicinc.com>
Signed-off-by: Ayush Kumar <quic_ayushkr@quicinc.com>
Modify IFE timestamp calculation to use a single qtime-to-boottime offset
value for all cameras. This will allow more precise timestamp comparison
between cameras.
CRs-Fixed: 3050973
Change-Id: Ic16864f544ad88e0215ae4d05a077d874af78fe9
Signed-off-by: Li Sha Lim <quic_lishlim@quicinc.com>
For ePCR/PCRs allow different combinations of scratch buffer
and ZSL buffer to be applied for different SFE/IFE ports.
CRs-Fixed: 3110947
Change-Id: I11677deaaa820955a2bc408bf90a848660ab831a
Signed-off-by: Karthik Anantha Ram <quic_kartanan@quicinc.com>
In RDI only usecase, if we get RUP and buf done
late, then we will enter bubble substate. In
current logic, we will move to SOF substate if
we get SOF in bubble substate, it causes the
buf done of bubble req can't be received. Since
we don't have valid interface for buf done in
SOF substate.
This changes don't move substate to SOF if we
are processing bubble.
CRs-Fixed: 3126554
Change-Id: I955173f12b5c1f5a699fa102e1ca6c82913c86e4
Signed-off-by: Depeng Shao <quic_depengs@quicinc.com>
When smmu page fault happen, buffer handle in smmu log
is always not identified due to using the index defined
in smmu. The index is smmu client index, buffer handle
should use the index defined in memory.
CRs-Fixed: 3096436
Change-Id: I69e5014c88ec507e31c6394564fb1990f5ae2d25
Signed-off-by: zhuo <quic_zhuo@quicinc.com>
On CSID unpack and WM pack, align the sensor width to 8,
when WM packs the data when writing to DDR.
CRs-Fixed: 3140614
Change-Id: Ie994cbe45b5b87c8a50a4ae2a9929dee6a31860e
Signed-off-by: Karthik Anantha Ram <quic_kartanan@quicinc.com>
