- introduce control to set colorspace. client will use this
to set private color info.
Change-Id: I0099ef1525f4562d3be3a6e518d046fe5b9ef894
Signed-off-by: Darshana Patil <quic_darshana@quicinc.com>
- add support to intialise device region by reading data from
platform to resources.
- add support for iommu_map and iommu_unmap apis.
- allocate a 4K page and send this address through
HFI_MMAP_ADDR register.
- map AON region, send virtual address and size as payload.
Change-Id: I5aa26593309a220c5de62836e432c1bd5a63ba1d
Signed-off-by: Darshana Patil <quic_darshana@quicinc.com>
- remove support of dynamic layer change for CBR
- remove support of layerwise bitrate
- any dynamic layer change request ignored without error for CBR_*FR cases
- layerwise bitrate is mapped to cumulative bitrate
Change-Id: I96c70fabd3c2bf94ce989b9e94620c166892b8e6
Signed-off-by: Ashish Patil <quic_ashpat@quicinc.com>
Added changes to support generic power domain and opp table.
This is an alternative for downstream regulator framework.
power domain can be enabled using below dtsi entries.
power-domains =
<&videocc MVS0C_GDSC>,
<&videocc MVS0_GDSC>,
<&rpmhpd SM8450_MXC>,
<&rpmhpd SM8450_MMCX>
power-domain-names =
"iris-ctl", "vcodec", "mx", "mmcx";
Power domain handles willbe parsed at driver side using below api's.
- dev_pm_domain_attach_by_name()
- devm_pm_opp_attach_genpd()
devm_pm_opp_attach_genpd() provides consumer virtual device handles
and i.e linked to core->dev using device_link_add().
MXC, MMCX rails wilbe powered up by scaling desired rate using
dev_pm_opp_set_rate().
Change-Id: I3d73434cb772078f031aec7cadc2d42ab930edd0
Signed-off-by: Govindaraj Rajagopal <quic_grajagop@quicinc.com>
update copyright markings to 2023 in all files.
Change-Id: I6842d56c4a8fff6a7a93d0c1d4bc049041297b02
Signed-off-by: Darshana Patil <quic_darshana@quicinc.com>
Use devm_reset_control_get_exclusive_released() instead of
devm_reset_control_get() to get the reset control of video_xo_reset
clock as it is shared reset clock between eva and video drivers.
Use reset_control_acquire() before assert and reset_control_release()
after de-assert video_xo_reset clock to avoid eva driver operating on
it in parallel.
Change-Id: I4936ed7a4556bb56d4b28546084fc877080308ef
Signed-off-by: Deepa Guthyappa Madivalara <quic_dmadival@quicinc.com>
Signed-off-by: Darshana Patil <quic_darshana@quicinc.com>
Fix the issue in pineapple CAP Database for
SLICE_DECODE.
Change-Id: I1b4dc51bbb23634aa372eba35b18ca9b6caada2d
Signed-off-by: Ankush Mitra <quic_ankumitr@quicinc.com>
This is change 2 of the Prepare dependency list without
parent change.
In this change we remove all parent information from
the CAP database.
Change-Id: Ie0b878050ae2d24e3c1a41cbd579ef0f19d42250
Signed-off-by: Ankush Mitra <quic_ankumitr@quicinc.com>
Prepare dependency list only using children.
Change-Id: Id79487825fed1f121821126589594b64820c85d3
Signed-off-by: Ankush Mitra <quic_ankumitr@quicinc.com>
update the set function for BASELAYER_PRIORITY control.
with out this change, configuration is not set to firmware.
Change-Id: I57f01a8e02462ee9e8c221581043a8a70adbfcc5
Signed-off-by: Manikanta Kanamarlapudi <quic_kmanikan@quicinc.com>
Disable video power collapse on pineapple chipset until
power collapse sequence is successful.
Change-Id: I2e7d0085e6d810fb79c2b1070c4bd498f443cfc8
Signed-off-by: Deepa Guthyappa Madivalara <quic_dmadival@quicinc.com>
Upstream driver doesn't support context bank address ranges,
so add dma mask attribute to context bank to specify address
range for upstream driver.
Change-Id: I09191b500006d6c7abf364fbfa22377b480a4b4d
Signed-off-by: Dikshita Agarwal <quic_dikshita@quicinc.com>
Enable xo reset clock since it is enabled
from clock driver.
Change-Id: Ica38616f514c9f2288a60fbfb3e0a3683c154b15
Signed-off-by: Darshana Patil <quic_darshana@quicinc.com>
- Add assert and deassert reset control functions to
update power off sequence in pineapple chipset
- Rename clock names to match with clock macros
Change-Id: Ic6dc0daac8110597bfcb02cceba94d2b97548723
Signed-off-by: Maheshwar Ajja <quic_majja@quicinc.com>
Re-structure the memory_ops code so that
upstream driver use mem_ops defined on
msm_vidc_memory.c and downstream driver
use mem_ops defined on msm_vidc_memory_ext.c.
It helps to modularize the code even further.
Change-Id: Id00b0872d7a902a8540500df5efb5f546a9dbe41
Signed-off-by: Ankush Mitra <quic_ankumitr@quicinc.com>
Update the clk table to support TURBO and
LOWSVS_D1 clocks
Change-Id: I69f710ae45df47f0e5190ec1be217b69f35abcf7
Signed-off-by: Deepa Guthyappa Madivalara <quic_dmadival@quicinc.com>
add memory ops support so that different
implementations can exist for memory_alloc,
memory_free, memory_map and memory_unmap,
dma buf attach, detach, map, unmap and
get buffer region in upstream and downstream
drivers.
Change-Id: Ifabc34e7a8b0284579c1bc4a8f477fe558d068f4
Signed-off-by: Darshana Patil <quic_darshana@quicinc.com>
Update pineapple database on par with kalama database
Change-Id: If7eb4046abea0c23c703355c3054e8b7d60d1089
Signed-off-by: Deepa Guthyappa Madivalara <quic_dmadival@quicinc.com>
