Reinitialize dmabuf pointer to NULL only after
dma_buf_put has been called on that buffer.
Change-Id: I05e8c1d0901438bc39a9bf9faeed11e228cd7675
Signed-off-by: Darshana Patil <quic_darshana@quicinc.com>
- introduce control to set colorspace. client will use this
to set private color info.
Change-Id: I0099ef1525f4562d3be3a6e518d046fe5b9ef894
Signed-off-by: Darshana Patil <quic_darshana@quicinc.com>
Remove support for dynamic layers and bitrates for taro similar
to other platforms.
Change-Id: Ic316d9d566507ae924cff7a1ded10bcdd1f115e4
Signed-off-by: Dikshita Agarwal <quic_dikshita@quicinc.com>
[1] In upstream side, udev is attampting to open video
nodes(video32 & video33) immediately after creation.
But by that time probe might not completed and i.e
resulting to NULL ptr dereference during open() call.
[2] component_match_add_release() must be called only
for video subdevices(contextbanks), but due to OPP table
more entries getting added into component_match table.
So master device bind is never getting invoked and probe
sequence is never getting completed.
Uploaded change to address above mentioned issuses.
Change-Id: I8d2e8fb5644da7076f5f99feda9365629e9130fd
Signed-off-by: Govindaraj Rajagopal <quic_grajagop@quicinc.com>
Allow streamoff from msm_vidc_vb2_queue_deinit after
errors to flush out the pending buffer in driver
in order to avoid v4l2 framework printing below warning.
videobuf2_common: driver bug: stop_streaming operation
is leaving buf in active state.
Call trace
__vb2_queue_cancel+0x214/0x288
vb2_core_queue_release+0x28/0x5c
vb2_queue_release+0x18/0x28
msm_vidc_vb2_queue_deinit+0x40/0x118 [msm_video]
msm_vidc_close+0x7c/0x144 [msm_video]
msm_v4l2_close+0x44/0x164 [msm_video]
There is a deadlock if driver acquires inst lock
in msm_vb2_stop_streaming, because this function
will be called from msm_vidc_close which already
acquired the inst lock. Hence, acquire inst lock
in msm_v4l2_stramoff instead of msm_vb2_stop_streaming.
Change-Id: Iec4c0e416a8a2705af28dbd5138f25d9f3016d12
Signed-off-by: Ankush Mitra <quic_ankumitr@quicinc.com>
state handling changes were spread across multiple files.
So re-arrange all state related handling changes into
msm_vidc_state.h/.c file.
Change-Id: I3826daa678d1e2b5ce7e74380d465e70b1b824c6
Signed-off-by: Govindaraj Rajagopal <quic_grajagop@quicinc.com>
Re-structure video driver statemachine to use
event handler. Added event handler support for
event states.
Added change to handle event depending on the
underlying state implementation.
Change-Id: Ib55c12c6cadc4d780797a5aee75d5ea61e95c94f
Signed-off-by: Govindaraj Rajagopal <quic_grajagop@quicinc.com>
- add support to intialise device region by reading data from
platform to resources.
- add support for iommu_map and iommu_unmap apis.
- allocate a 4K page and send this address through
HFI_MMAP_ADDR register.
- map AON region, send virtual address and size as payload.
Change-Id: I5aa26593309a220c5de62836e432c1bd5a63ba1d
Signed-off-by: Darshana Patil <quic_darshana@quicinc.com>
- remove support of dynamic layer change for CBR
- remove support of layerwise bitrate
- any dynamic layer change request ignored without error for CBR_*FR cases
- layerwise bitrate is mapped to cumulative bitrate
Change-Id: I96c70fabd3c2bf94ce989b9e94620c166892b8e6
Signed-off-by: Ashish Patil <quic_ashpat@quicinc.com>
Added changes to support generic power domain and opp table.
This is an alternative for downstream regulator framework.
power domain can be enabled using below dtsi entries.
power-domains =
<&videocc MVS0C_GDSC>,
<&videocc MVS0_GDSC>,
<&rpmhpd SM8450_MXC>,
<&rpmhpd SM8450_MMCX>
power-domain-names =
"iris-ctl", "vcodec", "mx", "mmcx";
Power domain handles willbe parsed at driver side using below api's.
- dev_pm_domain_attach_by_name()
- devm_pm_opp_attach_genpd()
devm_pm_opp_attach_genpd() provides consumer virtual device handles
and i.e linked to core->dev using device_link_add().
MXC, MMCX rails wilbe powered up by scaling desired rate using
dev_pm_opp_set_rate().
Change-Id: I3d73434cb772078f031aec7cadc2d42ab930edd0
Signed-off-by: Govindaraj Rajagopal <quic_grajagop@quicinc.com>
Use reset control acquire/release api's with kernel version >= 6
as they were not exposed in previous kernels.
Change-Id: I2968fc50d77948c7f1a6f55be31360ad03971415
Signed-off-by: Maheshwar Ajja <quic_majja@quicinc.com>
update copyright markings to 2023 in all files.
Change-Id: I6842d56c4a8fff6a7a93d0c1d4bc049041297b02
Signed-off-by: Darshana Patil <quic_darshana@quicinc.com>
Use devm_reset_control_get_exclusive_released() instead of
devm_reset_control_get() to get the reset control of video_xo_reset
clock as it is shared reset clock between eva and video drivers.
Use reset_control_acquire() before assert and reset_control_release()
after de-assert video_xo_reset clock to avoid eva driver operating on
it in parallel.
Change-Id: I4936ed7a4556bb56d4b28546084fc877080308ef
Signed-off-by: Deepa Guthyappa Madivalara <quic_dmadival@quicinc.com>
Signed-off-by: Darshana Patil <quic_darshana@quicinc.com>
Add database file for taro prepared based on upstream.
This file won't be compiled for Android builds.
Change-Id: I6804654b0574f4cc42d90278e4a022482c27ce99
Signed-off-by: Megha Byahatti <quic_mbyahatt@quicinc.com>
Signed-off-by: Dikshita Agarwal <quic_dikshita@quicinc.com>
Add logic to derive clock residency values for each
frequency levels.
Change-Id: Iadad29d2733cb083fce627999a31dd96475b73c1
Signed-off-by: Govindaraj Rajagopal <quic_grajagop@quicinc.com>
Fix the issue in pineapple CAP Database for
SLICE_DECODE.
Change-Id: I1b4dc51bbb23634aa372eba35b18ca9b6caada2d
Signed-off-by: Ankush Mitra <quic_ankumitr@quicinc.com>
Set mvs0c clock flags (force mem and pheripheral on).
Change-Id: I52380a30a4c74d9658f989377b5c77209cd8a33e
Signed-off-by: Maheshwar Ajja <quic_majja@quicinc.com>
- Implement upstream specific memory_alloc/map and
memory_unmap/free API based on standard dma_alloc_attr()
and dma_free_attr() APIs which allocates and map dma buffer.
- Combine alloc and map, unmap and free.
Change-Id: Ie85914beb72c3976febdc9e6a11c9199f2ea4192
Signed-off-by: Dikshita Agarwal <quic_dikshita@quicinc.com>