There is a narrow window, in which the critical section is
not fully protected which possibly could lead to use after free.
To avoid this, hold the row lock and validate the state prior
to processing the dma fence.
CRs-Fixed: 3273450
Change-Id: Ib1f09e62a5060a38b5cd8f3d4594bce2e533b3d3
Signed-off-by: Karthik Anantha Ram <quic_kartanan@quicinc.com>
camera_banner contains compilation timestamp, which can be used
to find mismatch between ramdump and symbols.
CRs-Fixed: 3261129
Change-Id: I021f6f9417b227d07a4424f7522e27c8535b0363
Signed-off-by: Trishansh Bhardwaj <quic_tbhardwa@quicinc.com>
In HW, the rup_aup latching scheme is enabled for dynamic switch
use-cases. The feature is to handle delayed rup_aup programming
between CSID SOF and CAMIF SOF. On Kailua with this feature enabled
we seem to be encountering CCIF protocol violations on IPP/PPP paths.
Disabling the feature, for now. The issue this feature is trying
to address is SW programming in a narrow window of 4 CSID clock cycles,
which is really small in SW.
CRs-Fixed: 3247669
Change-Id: I7678174541e8dd6b533eb95922e0814035811258
Signed-off-by: Karthik Anantha Ram <quic_kartanan@quicinc.com>
In function cam_ife_hw_mgr_acquire_res_ife_csid_pxl, if csid_res is added
to res_list_ife_csid, and if no_res_acquired is true, the csid_res will be
add to free_res_list without list delete operation, this will damage the
res_list_ife_csid.
CRs-Fixed: 3272891
Change-Id: Ic6ee6edeed8dce82fb7a2907daf5fa634cca8a7f
Signed-off-by: mingpan <quic_mingpan@quicinc.com>
Sometimes, userland may release the csiphy but doesn't
stop the csiphy, then the csiphy can't be stopped since
the state isn't in start state. We can't recovery to
normal state even shutdown the csiphy.
This change also checks the start count during shutdown
and stop the csiphy if the start count isn't zero. Then
we can make sure the state can be recovered after shutdown.
CRs-Fixed: 3261846
Change-Id: I5eef839e84125785e17c5f11f4118a8627b1fb63
Signed-off-by: Depeng Shao <quic_depengs@quicinc.com>
On customer side, the main and backup sensor who share a same
dtsi slot, may have different power voltage for VDIG/VIO/VANA
and so on, use sensor driver xml file power configValue on
powerUpSequence to enable regulator for both main and backup
sensor.
CRs-Fixed: 3254166
Change-Id: Ica54eb66ec9c5050aa3ee70f44fb6dfd3b7c4103
Signed-off-by: chengxue <quic_chengxue@quicinc.com>
When generic blobs are added to process debugging information
from userspace, these blobs are sent as separate packets
from the packets which carry actual configuration settings.
However, both are sent as the same packet opcode of
CAM_SENSOR_PACKET_OPCODE_SENSOR_CONFIG, where they differ is
a level below, within the meta_data type of the command buffer.
Further downstream after parsing the packets, packets with
config opcodes get applied. With this new change, we want to
add an exception for those sent as generic blobs. This change
introduces the fix for it.
CRs-Fixed: 3266290
Change-Id: Iee2ea186e594479d61dbe30dd1d0399352986028
Signed-off-by: Li Sha Lim <quic_lishlim@quicinc.com>
Currently, the mechanism to create platform device out of i3c slave DT
nodes is done through "simple-bus" compatibility string in camera DT. The
addition of this compatibility string in parent nodes is causing probes
to be fired for parent drivers when they don't expect it. Change this
mechanism and add support to do the same using of_platform_populate()
call for camera sensor module nodes under i3c master DT node.
CRs-Fixed: 3259550
Change-Id: I92523e7178ff78cdc783ca0b67b2dfbcebd0be61
Signed-off-by: Mukund Madhusudan Atre <quic_matre@quicinc.com>
This change adds domain-id support for new
targets. This change involves adding information
to the SCM call currently in use such that it is
a superset, and the additional fields needed are
the IFE and CDM number being used, and VC mask.
These are in addition to existing PHY mask selection,
and lane/trio mask selection.
All the information above will be sent over from CSID
to the PHY driver, and the PHY driver will pack the
information in a generic format before sending it
over in an SCM call. Where previously, this information
is packed in format that matches the register, this
will be sent generically moving forward.
Given that there are multiple instances per physical
PHY hardware, and that the usual dev_handle used by
userspace to identify them are not accessible CSID
side, the lane_assign/lane_cfg parameter is used to find
the specific PHY instance used in conjunction with the
CSID instance in a session. lane_assign from PHY driver
and lane_cfg from CSID have the same values.
CRs-Fixed: 3259706
Change-Id: Ie050b1b9e742c6a63812eb38db7eca76db24667f
Signed-off-by: Li Sha Lim <quic_lishlim@quicinc.com>
Variable fps usecase needs to get valid req with init packet
flag after flush, this change adds a flag to detect if we
get a valid req before resuming HW. This change also stops
the sensors during flush if useland already request to stop
dev.
CRs-Fixed: 3256139
Change-Id: Ieabd327a3b5cf380ca60548c85714c96635a272d
Signed-off-by: Depeng Shao <quic_depengs@quicinc.com>
Starting from Kailua, for LCR-PD use-cases HW expects certain
timing constraints to be met by the 2 paths(RDI0/PPP).
On flush/resume scenarios where the sensor continues to stream, and
if we do an independent path resume it is possible that
due to intrinsic SW/AHB latencies the two paths might latch
at different times. In order to overcome such issues, we
enable sync between RDI0 & PPP, RDI0 being the master and issue
a global resume cmd. With global resume all paths will resume
at the same time, and with the sync enabled we are certain that
RDI0/PPP will be resumed in sync as well. This change configures
global resume for single IFE lcr use-cases.
CRs-Fixed: 3233582
Change-Id: I034b1a491afa951298e2cb63e6242dcbd499b19e
Signed-off-by: Karthik Anantha Ram <quic_kartanan@quicinc.com>
Resolution index settings for a sensor can be set
in three ways, during initial configuration,
an acquire when switching between sensors during a
session, and dynamically while the sensor itself is
running. To aid debugging efforts, this information
about the resolution index, along with other helpful
properties, whenenever they're changed, is
passed over from UMD and stored in KMD.
CRs-Fixed: 3214150
Change-Id: I2a83177966a4ccecad0a9d19ec7d2ba11dc10d45
Signed-off-by: Li Sha Lim <quic_lishlim@quicinc.com>
Irrespective of kernel debugfs, if there is a regdump
buffer provided for INIT packet trigger the dump.
CRs-Fixed: 3258552
Change-Id: I96d79ff6956ad567e526524500bf37f83e23908b
Signed-off-by: Karthik Anantha Ram <quic_kartanan@quicinc.com>
When link A is flushed, its sync link B didn't do flush,
so link B can't get info from flushed request of link A.
This change adds a support to disconnect the link and
sync link for the flushed req.
CRs-Fixed: 3236148
Change-Id: I5ef8e608856851426ef4b51cc3bbb939cc81eddb
Signed-off-by: Depeng Shao <quic_depengs@quicinc.com>
Signed-off-by: Wang Kan <quic_wkan@quicinc.com>
In case of dual CSID acquire, if the acquire fails
for the second CSID, we fail to free the first one.
The change addresses this issue.
CRs-Fixed: 3253317
Change-Id: I3fd8e7b7c38a3fa31fd93f281f2afdd98b9994a6
Signed-off-by: Karthik Anantha Ram <quic_kartanan@quicinc.com>
This commit saves the timestamp for CSID CAMIF IRQs and
print in case of overflow. In case of IFE, it avoids
dumping timestamps if no IRQ are subsribed.
CRs-Fixed: 3249483
Change-Id: Icac71f60f0616fc14aeb5e5b6efd5d203b27ddcc
Signed-off-by: Gaurav Jindal <quic_gjindal@quicinc.com>
In case of sHDR to have a continuous flow of frames, program
scratch buffer even if there are no pending requests to apply
to lower pd devices.
CRs-Fixed: 3254135
Change-Id: I07cedcfdcf58f2a37c81e39a5f887945e7f05bc1
Signed-off-by: chengxue <quic_chengxue@quicinc.com>
RDI WMs are no exception to period/pattern config. Just like other WMs
RDIs can be configured to any period/pattern. This change is only
for bus ver3, for which address increment register exists for all
RDIs, so we can remove any limitation checks.
CRs-Fixed: 3249063
Change-Id: Ib24a7178e2a3ca6e56898ed1ff57331fed270222
Signed-off-by: Karthik Anantha Ram <quic_kartanan@quicinc.com>
Add debug drv flag to enable info logging for drv.
CRs-Fixed: 3065551
Change-Id: Ief9e2a84a379b9f0261567bcf13e2405f3c97d15
Signed-off-by: Mukund Madhusudan Atre <quic_matre@quicinc.com>
Remove data rate settings from common register array.
This change is to avoind re-programming same registers,
with different values.
CRs-Fixed: 3247785
Change-Id: Ic6790b006b32911e06f2abc1fefa2f44b3820ee6
Signed-off-by: Karthik Anantha Ram <quic_kartanan@quicinc.com>
For non secure FW loads, ICP domain mask config registers will
not be protected and is accessible from HLOS, so we are to
program these registers with the correct mask values. These
will then be validated with the domain id value passed over
from userland.
CRs-Fixed: 3249982
Change-Id: I1440dde67f6e7a4b58b482d6c3964d19cdb33967
Signed-off-by: Li Sha Lim <quic_lishlim@quicinc.com>
This change extends internal scheme for certain specific
scenarios. If the mode switch is applied in between exposures
it could potentially lead to out_of_sync/hang. On the switching
frame if there is no sufficient common blanking among different
exposures, CSID HW flags it, internal recovery is triggered for this.
Also it's possible that due to packet delays, IFE & sensor go out of sync,
we can try internal recovery in this case as well on receiving
out of sync error consecutively for 3 frames.
CRs-Fixed: 3254775
Change-Id: I56b40bb9f73959e66174af382025c897c18ffed4
Signed-off-by: Karthik Anantha Ram <quic_kartanan@quicinc.com>
Null pointer 'flush_args.flush_req_pending' may be dereferenced,
this change add check snippet before the dereference.
CRs-Fixed: 3250285
Change-Id: I1170a291e7d0d986abe2d5909e6c328e248e4d27
Signed-off-by: Stark Lin <quic_starlin@quicinc.com>
Signed-off-by: Depeng Shao <quic_depengs@quicinc.com>
In function cam_ife_mgr_acquire_dev, will assign
cdm_reg_map to base_array according to index, but
the array length of base_array is less than
CAM_IFE_HW_NUM_MAX now, so it may cause to array
index out of bounds. If we acquire 8 IFEs, we
need to send cdm the reg_base for all 8.
CRs-Fixed: 3250612
Change-Id: I791659e1ad72d301de89fb374d37720ce58f102b
Signed-off-by: mingpan <quic_mingpan@quicinc.com>
Signed-off-by: Depeng Shao <quic_depengs@quicinc.com>
This change adds a checking for regulator count,
since the regulator array has fixed length, so
add a protection to avoid meeting index ouf of
bounds issue.
CRs-Fixed: 3250328
Change-Id: I123ffa993ee7b1deb06e3789fa4add6ca5ce6b9f
Signed-off-by: Depeng Shao <quic_depengs@quicinc.com>
Null pointer might be used uninitialized in case param input is null,
now we will return with -EINVAL directly to avoid passing null pointer
to other function.
CRs-Fixed: 3250360
Change-Id: I19bd6f83d2f6315f55f05559b6984e721ca3d143
Signed-off-by: Stark Lin <quic_starlin@quicinc.com>
Signed-off-by: Depeng Shao <quic_depengs@quicinc.com>
Do correct length check for cmd_buf in command
CAMERA_SENSOR_CMD_TYPE_WAIT, we need to make sure the
length of cmd_buf is effective for each generic_op_code.
CRs-Fixed: 3241357
Change-Id: I6894c98a2dcf6569c7127fde12d4c94b080dca3c
Signed-off-by: mingpan <quic_mingpan@quicinc.com>
This change fix ISP log error and function annotation error.
CRs-Fixed: 3248587
Change-Id: Ibe9305cb666831b98314a834049c3402b52bf389
Signed-off-by: Wang Kan <quic_wkan@quicinc.com>
Remove unnecessary memsets of the structure variables
whose fields are assigned prior to their usage or they
are dynamically allocated with calls that set the memory
to 0. This memset usage optimization is to improve
performance.
CRs-Fixed: 3228092
Change-Id: Iec68c6d072863627959ce603cff28afd26a1c408
Signed-off-by: Sokchetra Eung <quic_eung@quicinc.com>
Previous codes of schd_req ver1 and sync config has been removed
from KMD, and now these codes will be resumed to maintain backward
compatibility.
CRs-Fixed: 3230856
Change-Id: I19ac0549abf98ef9441380d86d49b04a86a2f95c
Signed-off-by: Stark Lin <quic_starlin@quicinc.com>
Currently, if i2c master has not probed by the time camera
request manager probes, the camera i2c slave device will not
be found on the i2c bus. In this case, compoenent framework
can't keep track of those i2c driver probes and synchronize
them. Add condition to defer crm probe in case i2c device is
not available on the bus, if we have added DTSI node for it.
CRs-Fixed: 3241160
Change-Id: I6cad2be8afd96de52f559d4b88563247a0ec6627
Signed-off-by: Mukund Madhusudan Atre <quic_matre@quicinc.com>
The apply_data can be accessed by DELAY_MAX if min delay
is initial value, it will cause out of array bound issue.
This change assign DELAY_2 to the min delay, DELAY_2 is a
value array index to apply_data.
CRs-Fixed: 3244492
Change-Id: I16e73e562488058cea68c76c1aaa9dcfeb0c2d9a
Signed-off-by: Depeng Shao <quic_depengs@quicinc.com>
Added check in presil mode to process icp frames one at a time to
avoid shared memmory buffers and hfi queue corruption.
CRs-Fixed: 3212166
Change-Id: I8eeba4cb34fedf0020c39c1fb3aa221dc26fbb71
Signed-off-by: Suraj Dongre <quic_sdongre@quicinc.com>
Send ife process frame event from IFE HW manager for presil
which pchost depends on to start IFE frame runcore or regdump.
CRs-Fixed: 3212166
Change-Id: I268059ec490b2a95f0626045eed26192eb0a42a2
Signed-off-by: Joshua Florez <quic_jflorez@quicinc.com>
Signed-off-by: Suraj Dongre <quic_sdongre@quicinc.com>
This change uses half frame interval as workqueue congestion
detection threshold and record the last trigger time before
sending req, we can get correct last tirgger time in this way.
CRs-Fixed: 3237172
Change-Id: I2d583f7758062340fe6b0c598bfa7e90f49211c2
Signed-off-by: Depeng Shao <quic_depengs@quicinc.com>
LCR enabled flag is not reset during flush and the corresponding
register is also not reset. It could cause random behavior after
flush.
This commit resets LCR flags during flush.
CRs-Fixed: 3241884
Change-Id: I8821656ae7baf97a59cdc57bb79ded9552185f08
Signed-off-by: Gaurav Jindal <quic_gjindal@quicinc.com>
The core info in hw info structure pointer to
csid hw, we need to get correct core info from
the private data of match dev.
CRs-Fixed: 3234793
Change-Id: I4f295c6eb206a0a61fb923b1e04bd00786dbfccf
Signed-off-by: Depeng Shao <quic_depengs@quicinc.com>
Sensor remains power-up status even if unlocking or locking sensor fails
while probe, now we will power down sensor in case of that.
CRs-Fixed: 3228473
Change-Id: Iab6edf0a824c61132211c3ea5c46cc0fff0247c4
Signed-off-by: Stark Lin <quic_starlin@quicinc.com>
Customer may have more than 3 physical cameras, and userland
may also create multi jpeg pipelines, so increase the max
context number to 24.
CRs-Fixed: 3228532
Change-Id: Ia90947f03a1543f19684aa7cad1b1972419e9c74
Signed-off-by: chengxue <quic_chengxue@quicinc.com>
Only unregister the i3c driver if there is i3c node
in dtsi.
CRs-Fixed: 3234792
Change-Id: I01e99406a08648aab90147d1287d3d8b6ab04e89
Signed-off-by: Depeng Shao <quic_depengs@quicinc.com>
SFE resource count isn't fixed, it is less than the max
supported resource, we need to use actual resource count
to release the resource.
CRs-Fixed: 3234791
Change-Id: I7cb16f3d8120451cac1bfc226f6849268f3b5c46
Signed-off-by: Depeng Shao <quic_depengs@quicinc.com>
If we set burst write method to write sensor word data type
register data, some 32 bits data queue cannot be filled full,
and invalid data will be injected into data queue, then cci
burst write will fail.
CRs-Fixed: 3221426
Change-Id: I20ff1e7f508e4bbc79826db7faa13fcc80eaaf96
Signed-off-by: chengxue <quic_chengxue@quicinc.com>
Compute and log average firmware response time per context to
measure firmware latency.
CRs-Fixed: 3223208
Change-Id: Iaf27a43259fc2a558fdd59165f8afdd4f8e5f6e7
Signed-off-by: Sokchetra Eung <quic_eung@quicinc.com>
Create a Macro to wrap around wait_for_completion_timeout to
log start and done wait time, and caller's customary error log
if timeout happens.
Modify all wait_for_completion_timeout in ICP hw mgr to use
this wrapper.
CRs-Fixed: 3227018
Change-Id: Ief2c52e69954c653d9cbced8acd823b436bab086
Signed-off-by: Sokchetra Eung <quic_eung@quicinc.com>
we can't set dma buffer name when it has been attached to hardware.
As usually UMD allocate one buffer then map it at KMD side. So most of time,
set mapped dma buffer name failed. But it's not a fault error. So
we move log to debug level.
CRs-Fixed: 3219506
Change-Id: If635f9fbeb26b96f45c83b1d03cbba97576c92b2
Signed-off-by: Fengjie Chen <quic_fengjiec@quicinc.com>
The change handles tasklet scheduling delays in buf done handling.
If there is a scenario where in we have a request N in active list,
and N+1 is applied on the output frame for N. It's possible
that after applying N+1, the buf done tasklet for N is not scheduled
in time, and if it so happens that the tasklet is scheduled
out beyond the next frame, HW would have consumed N+1, and we
end up reading the last consumed addr for N+1 in the buf done bh for N.
The read last consumed address from N+1, will never match with N
ultimately stalling N. We could read the last consumed
addr registers in top half, but that would lead to increased
register reads in ISR, delaying top half processing therefore the change
handle such delays within the ISP state machine.
The underlying understanding here is if HW has generated buf
done for client X on request N+1, it's bound to have processed the
buffer for client X on request N.
CRs-Fixed: 3223063
Change-Id: I1e96f5b51b6fc388f3c189f882f8ae543a6ccb06
Signed-off-by: Karthik Anantha Ram <quic_kartanan@quicinc.com>
