Commit Graph

471 次程式碼提交

作者 SHA1 備註 提交日期
qctecmdr
9685e229a2 Merge "disp: msm: dsi: fix gpio warning message" 2021-06-11 14:26:06 -07:00
qctecmdr
d66e86af95 Merge "disp: msm: dsi: enable DCS command ASYNC wait for video mode panels" 2021-06-09 04:48:39 -07:00
qctecmdr
2bd58a2e46 Merge "disp: msm: sde: add explicit sub-driver mappings for TVM" 2021-06-09 02:43:04 -07:00
Jeykumar Sankaran
5ec8dc1afc disp: msm: dsi: update gpio mappings using tlmm api
Use tlmm api to retrieve and populate address mappings of
the panel gpio pins participating in the VM swtich
on Trusted UI.

Change-Id: Ibf2d13eac3fe907b729f4c2b54c63a3808022583
Signed-off-by: Jeykumar Sankaran <jsanka@codeaurora.org>
2021-06-07 23:48:09 -07:00
Jeykumar Sankaran
77d648442f disp: msm: dsi: implement ESD trigger for trusted vm
DSI driver stubs out GPIO parsing in trusted vm. Add support
for ESD trigger in trusted vm by explicitly parsing the
reset gpio and setting the value.

Change-Id: I8c04e4b27b234eb236ec51df633c06738f2a5c96
Signed-off-by: Jeykumar Sankaran <jsanka@codeaurora.org>
2021-06-07 23:48:01 -07:00
Santosh Kumar Aenugu
8d9384423c disp: msm: dsi: fix gpio warning message
At present, the sim panels and physical panels booting up as sim
panels have a call flow issue causing reset gpio to be set in the
panel reset sequence even without valid reset gpio. This causes
GPIO warnings as it tries to set value for invalid reset GPIO.
The following change fixes these GPIO warnings, by checking
valid reset GPIO before setting value.

Change-Id: Id8f54a563c61dd3d244d31b10081042e376287d4
Signed-off-by: Santosh Kumar Aenugu <santoshkumar@codeaurora.org>
2021-06-07 17:18:10 -07:00
Lei Chen
484091de41 disp: msm: dsi: clear ctrl_flags for private DCS panel command
DSI or panel configurations might be changed dynamically, so clear
ctrl_flags of private DCS command to regenerate it according
to current display configurations.

Change-Id: Iddfcbe7f14de65ed0edf408a75b0a50bdb0a2d29
Signed-off-by: Lei Chen <chenlei@codeaurora.org>
2021-06-07 16:59:28 +08:00
qctecmdr
1b9345b3af Merge "disp: msm: sde: add support for digital dimming" 2021-06-02 17:20:03 -07:00
qctecmdr
5bb6a168b4 Merge "disp: msm: dsi: update transfer time calculation during RSC disable" 2021-06-02 15:18:00 -07:00
qctecmdr
78826018f3 Merge "disp: msm: dsi: disable ESD te_signal_check option" 2021-06-01 22:31:17 -07:00
qctecmdr
3f9b08b09e Merge "disp: msm: dsi: add parsing for RSC solver disable property" 2021-05-28 13:41:24 -07:00
Satya Rama Aditya Pinapala
78ec57538d disp: msm: dsi: enable DCS command ASYNC wait for video mode panels
With the new design of moving clock voting and command engine state
transition to DSI controller APIs, asynchronous wait after a command
transfer can now be supported on video mode panels.

Change-Id: Idec665fc5e9e8dadf20a77f9b1edbb685563eb4d
Signed-off-by: Satya Rama Aditya Pinapala <psraditya30@codeaurora.org>
2021-05-27 16:44:35 -07:00
Harigovindan P
98767bf22b disp: msm: clear dma done interrupt status for slave controller
When Broadcast is enabled, DMA_DONE bit gets set for slave
controller on command transfer completion but it is not
getting cleared. Due to this, DMA transfer failures on slave
controller are not getting caught. This patch add supports for
clearing DMA_DONE for slave controller on every successful
transfer. This also prints error if transfer fails on slave
controller.

Change-Id: I61ce7b2d8be323adc70d888b5a2416afd9ae9fac
Signed-off-by: Harigovindan P <harigovi@codeaurora.org>
2021-05-27 16:44:26 -07:00
Satya Rama Aditya Pinapala
aecc86dfb2 disp: msm: dsi: add pre and post DSI command transfer controller APIs
To transfer a command on the DSI lanes, the following programming needs
to happen prior and post a command transfer:
- Vote/Unvote for clocks
- Enable/Disable command engine
- Mask/Unmask overflow and underflow errors.
These operations are done from the display context currently. This can
lead to issues during an ASYNC command wait, where in we queue the
dma_wait_for_done rather than wait in the same display thread.

The following change adds new DSI controller API that does the above
programming from the controller context. This way, post command transfer
operations can only happen once command is successfully transferred and
dma_wait_for_done completes.

Change-Id: I61db0d8a2656dc6e0e56864dbef01283b813d7c6
Signed-off-by: Satya Rama Aditya Pinapala <psraditya30@codeaurora.org>
2021-05-27 16:42:04 -07:00
Samantha Tran
f74a09e94d disp: msm: dsi: disable ESD te_signal_check option
While altering ESD check to te_signal_check, return error
as this option is no longer allowed and should not
change ESD mode.

Change-Id: I32a9a47aba4e41451ba3d8ffc1eeba41d9f547d7
Signed-off-by: Samantha Tran <samtran@codeaurora.com>
2021-05-26 12:02:59 -07:00
Ping Li
9a17c5783b disp: msm: sde: add support for digital dimming
Add a new connector property to allow DC dimming feature to set
dimming backlight LUT. This change also adds a connector event
for client to register for backlight info needed for digital dimming
feature, including OS brightness, OS brightness_max, panel_backlight,
panel_backlight_max, and scale factors from ABA and LTM features.

Change-Id: I78f713fb2b965ca24effd973b4dfa9ff07a852f8
Signed-off-by: Ping Li <pingli@codeaurora.org>
2021-05-25 16:16:18 -07:00
Santosh Kumar Aenugu
6add9d0fc0 disp: msm: dsi: fix dsi pll dividers
Updating DSI PLL byte clock dividers as per HW recommendation.

Change-Id: I9dbe7a04f813676a7690d0cadc52d7ed19ca4871
Signed-off-by: Santosh Kumar Aenugu <santoshkumar@codeaurora.org>
2021-05-25 08:13:55 -07:00
Satya Rama Aditya Pinapala
e993215979 disp: msm: dsi: update transfer time calculation during RSC disable
If RSCC solver is disabled, the transfer time calculation can be
skip using TE jitter. This case threshold time becomes prefill
time + DCS command transfer threshold. The threshold for DCS
command transfer is configured to 40us.

Change-Id: I1260df33e9d928aacd8961bdedfcd136563a806b
Signed-off-by: Satya Rama Aditya Pinapala <psraditya30@codeaurora.org>
2021-05-24 15:54:30 -07:00
Raviteja Tamatam
3789258773 disp: msm: sde: add allowed_dsc_reservation_switch capability
This change adds allowed_dsc_reservation_switch to determine if
dsc seamless switch is supported for DP. Also, based on the
flag, it determines and populates the required number of
available resources for DP.

Change-Id: I9cd7219a50d352369c5bc8386ce7dc25c30b80b6
Signed-off-by: Raviteja Tamatam <travitej@codeaurora.org>
2021-05-20 21:36:05 -07:00
Raviteja Tamatam
b89a3f739a disp: msm: populate submode blob information
Mode information apart from the fields in
drm_mode_modeinfo that can trigger a modeset like
dsc-nondsc, video-cmd are defined in sub mode.
For each mode in connector->modes there can be
multiple submodes.

Change-Id: Ib8697d3fa4ea5261d9ac4943b1a4149e22c4da2f
Signed-off-by: Raviteja Tamatam <travitej@codeaurora.org>
2021-05-20 21:35:38 -07:00
Yashwanth
7e03fb61fd disp: msm: add support for seamless dsc switch
This change adds logic to determine dsc switch based on
the connector property "CONNECTOR_PROP_DSC_MODE" and
performs seamless DSC switch if there is any change in
DSC configuration. The connector property is populated
in msm_sub_mode based on which suitable mode is selected.

Change-Id: Ifc4931f16dfb814781bc1d72b103e09103e6bfee
Signed-off-by: Yashwanth <yvulapu@codeaurora.org>
2021-05-20 21:34:27 -07:00
Satya Rama Aditya Pinapala
134e62f655 disp: msm: dsi: add parsing for RSC solver disable property
For higher refresh, to provide higher transfer time we need to disable
RSC solver in MDP. This can be configured through the panel timing node
devicetree property. This change adds the parsing of the devicetree
property.

Change-Id: I9e708325da35086d2f955cbcc80bb164ccb116cd
Signed-off-by: Satya Rama Aditya Pinapala <psraditya30@codeaurora.org>
2021-05-20 12:24:05 -07:00
qctecmdr
1961183b41 Merge "disp: msm: dsi: check for null pointer during debugfs deinit" 2021-05-19 09:23:00 -07:00
qctecmdr
26327ae64b Merge "disp: msm: dsi: avoid PLL configure and toggle during TUI" 2021-05-19 09:23:00 -07:00
Shashank Babu Chinta Venkata
6c16356706 disp: msm: dsi: check for null pointer during debugfs deinit
Add null pointer check for debugfs deinit during
unbind path. Additionally, fix debugfs init to
not free debugfs directory unintentionally.

Change-Id: I430fe8810608a8e56d6d02e996044e69b4116421
Signed-off-by: Shashank Babu Chinta Venkata <sbchin@codeaurora.org>
2021-05-17 12:53:46 -07:00
qctecmdr
394040535c Merge "disp: msm: dsi: skip panel read for simulation panels" 2021-05-16 21:28:57 -07:00
qctecmdr
ceba43ca89 Merge "disp: msm: dsi: avoid te check for simulator panel" 2021-05-16 17:35:53 -07:00
qctecmdr
f95ba61ed8 Merge "disp: msm: dsi: add more info to display bind logs" 2021-05-16 08:49:12 -07:00
qctecmdr
a7f06bac82 Merge "disp: msm: fix dsi debugbus in-mem logging" 2021-05-15 19:15:17 -07:00
Satya Rama Aditya Pinapala
d7bcdcd91a disp: msm: dsi: add more info to display bind logs
Change adds more panel and display information during the DSI
display bind.

Change-Id: I3571244501149a95ea4f6ab0e496112199f7bbde
Signed-off-by: Satya Rama Aditya Pinapala <psraditya30@codeaurora.org>
2021-05-13 00:12:27 -07:00
qctecmdr
086efaa2a9 Merge "disp: msm: dsi: update DSI PHY programming" 2021-05-11 16:11:48 -07:00
Satya Rama Aditya Pinapala
dee1d7802f disp: msm: dsi: skip panel read for simulation panels
For simulation panels read commands need to be avoided. The change
also adds and substitues sim panel check with a new is_sim_panel API.

Change-Id: Idafdad8a852cad87d97bbc64e9c7cb82460e25b7
Signed-off-by: Satya Rama Aditya Pinapala <psraditya30@codeaurora.org>
2021-05-11 15:41:49 -07:00
Shashank Babu Chinta Venkata
30be58de15 disp: msm: dsi: avoid te check for simulator panel
Avoid registering for te interrupts to check te status
for ESD detection during commit failure path.

Change-Id: I447473f7c32a396f72d838c68287bed0eda64b20
Signed-off-by: Shashank Babu Chinta Venkata <sbchin@codeaurora.org>
2021-05-10 12:31:14 -07:00
Veera Sundaram Sankaran
179a858272 disp: msm: fix dsi debugbus in-mem logging
Update the dump_mem pointer offset while storing the debugbus
data for the second DSI to avoid overwriting to same memory.
As part of the change, register the DSI ctrl with sde_dbg from
ctrl_init directly, instead of debugfs_init to avoid code replication.

Change-Id: I4089f3038ffa89136eaea956d27270f638a99043
Signed-off-by: Veera Sundaram Sankaran <veeras@codeaurora.org>
2021-05-10 08:53:35 -07:00
Satya Rama Aditya Pinapala
7a0467ef40 disp: msm: dsi: update DSI PHY programming
Update DSI DPHY programming as per HW recommendation.

Change-Id: I766e32fb987f57b8ba1876d4ff465edd25d7688c
Signed-off-by: Satya Rama Aditya Pinapala <psraditya30@codeaurora.org>
2021-05-06 23:42:41 -07:00
Satya Rama Aditya Pinapala
6bebbc2e05 disp: msm: dsi: avoid PLL configure and toggle during TUI
The change ensures that during a Trusted UI case, configuring
and toggling the DSI PHY PLL is skipped.

Change-Id: I3246c8e5f01d47ac6fd58098f859ef8436a762bf
Signed-off-by: Satya Rama Aditya Pinapala <psraditya30@codeaurora.org>
2021-05-06 10:45:11 -07:00
Yu Wu
55340a43c3 disp: msm: add physical address info when dumping display registers
In dumping display registers, physical address will be appended after
each block name. This is to support register compare between kernel
and UEFI.

Change-Id: Ic20d3e2bd4c95aa7c71c4b646a149f7e83ad731a
Signed-off-by: Yu Wu <zwy@codeaurora.org>
2021-05-06 02:59:16 -07:00
qctecmdr
bf67f9d761 Merge "disp: msm: typecast variables as long long for 64 bit operations" 2021-05-02 18:40:35 -07:00
qctecmdr
6614e279eb Merge "disp: msm: dsi: reduce log level in demura parsing" 2021-05-01 23:40:38 -07:00
qctecmdr
50dccee98e Merge "disp: msm: dsi: add full mode information to debugFS node" 2021-05-01 17:06:42 -07:00
Satya Rama Aditya Pinapala
ef4dd310a4 disp: msm: dsi: update DSI PHY post divider for slave PLL
The change ensures that for the slave PLL the PHY post divider
always needs to be configured to 0x1.

Change-Id: I481b4fd206d9f8e05af724687beb2e89fd6c2ea6
Signed-off-by: Satya Rama Aditya Pinapala <psraditya30@codeaurora.org>
2021-04-29 13:45:04 -07:00
Santosh Kumar Aenugu
e96c1e444e disp: msm: dsi: reduce log level in demura parsing
Currently, the demura parsing has info logs, this change reduces
the log level to debug for all the parsing logs.

Change-Id: Icd9e73a7788cb01e09068e4d0957bc1e11a329da
Signed-off-by: Santosh Kumar Aenugu <santoshkumar@codeaurora.org>
2021-04-28 14:08:09 -07:00
Venkata Prahlad Valluru
2ec9452162 disp: msm: typecast variables as long long for 64 bit operations
Define 64 bit variables as unsigned long long to ensure
8 bytes in 32 bit builds.

Change-Id: I723ae0c4ba6a0de07c92d14eeef95bde095c8e3d
Signed-off-by: Venkata Prahlad Valluru <vvalluru@codeaurora.org>
2021-04-27 13:32:53 -07:00
Amine Najahi
73479659e0 disp: msm: dsi: add full mode information to debugFS node
Add full mode information to dump panel info debugFS
node to allow for additional verification.

Change-Id: Ie56f3b44a8b35075d78575def1469b12bed60252
Signed-off-by: Amine Najahi <anajahi@codeaurora.org>
2021-04-27 15:18:01 -04:00
Santosh Kumar Aenugu
323f1b54d3 disp: msm: dsi: handle gpios for sim panels
For simulation panels, GPIOS are not needed for panel bootup.
This change handles GPIO parsing, toggle sequences in
simulation panels.

Change-Id: I0a3f03d1958ffe9079a7d9fef3f412e2445b0b9b
Signed-off-by: Santosh Kumar Aenugu <santoshkumar@codeaurora.org>
2021-04-26 13:37:05 -07:00
qctecmdr
a417ffc4cc Merge "disp: msm: dsi: remove porches value check from mode matching for RFI" 2021-04-23 09:21:58 -07:00
qctecmdr
b510da17bd Merge "disp: msm: dsi: force VRR on RFI default value setting" 2021-04-23 09:21:58 -07:00
qctecmdr
e570cc7400 Merge "disp: msm: dsi: fix rate debug log" 2021-04-23 09:21:58 -07:00
Amine Najahi
d594991e69 disp: msm: dsi: force VRR on RFI default value setting
Currently on video mode panel, when the RFI bit clock
rate is set back to the default rate, the driver is not
detecting that a VRR operation is necessary due to
unchanged porches value.

This change is forcing a VRR update on video mode panel
whenever the RFI bit clock rate is changed.

Change-Id: I16520b6ca1909f878bff1bb97472b15fe2a3d13b
Signed-off-by: Amine Najahi <anajahi@codeaurora.org>
2021-04-20 17:39:48 -04:00
Amine Najahi
210edd6ba5 disp: msm: dsi: remove porches value check from mode matching for RFI
Currently, on a video mode panel when a mode switch occurs after the RFI
bit clock rate has been changed, the driver fails to find the new mode
in the list of panel modes due to different porches value between
the adjusted mode and the default panel mode.

This change removes the front and back porch value check from mode
matching function when dynamic bit clock and maintain constant FPS
features are enabled.

Change-Id: If267a4f732fea2c7d84c8bb3d5650f3e93722ec4
Signed-off-by: Amine Najahi <anajahi@codeaurora.org>
2021-04-20 11:13:23 -04:00