Commit Graph

30 Commits

Author SHA1 Message Date
Narendra Muppalla
9a26376b14 Revert "disp: msm: sde: add delay after porches changed"
This reverts commit 15ae91e806.

Change-Id: I11c795a8d16440a42e36e3a5bef27a6a78eec5fc
Signed-off-by: Narendra Muppalla <NarendraM@codeaurora.org>
2020-09-10 17:50:50 -07:00
Linux Build Service Account
6d768e78df Merge "disp: msm: sde: add delay after porches changed" into display-kernel.lnx.5.4 2020-07-17 15:14:52 -07:00
Abhijit Kulkarni
15ae91e806 disp: msm: sde: add delay after porches changed
This change adds 2 vsync delay after changing the timing engine
parameters namely the porches to update the refresh rate.
This ensures that panel vsync is updated as per new timing before
modifying it again.

Change-Id: I5866ea2f6f2e68bc8ce7435c4a5dbe27d8ebdd91
Signed-off-by: Abhijit Kulkarni <kabhijit@codeaurora.org>
2020-07-15 11:57:00 -07:00
Steve Cohen
36bf90e02f disp: msm: sde: adjust qsync linecount calculation
Adjust the QSYNC line count calculation to compensate for the
idle time, when no transfers are actively taking place.

Change-Id: If91eab25321eea6e6880f07605c5a9c1b7b7ee05
Signed-off-by: Steve Cohen <cohens@codeaurora.org>
2020-06-28 21:31:15 -07:00
Dhaval Patel
44cde01fc7 disp: msm: sde: manage vblank refcount concurrency
Vblank refcount can reach out of sync with below case
 1. event_thread triggers the vblank_enable
 2. commit_thread triggers the modeset
   2.a modeset resets the vblank refcount with mode_set
 3. event_thread triggers the vblank_disable

Event 2.a resets the vblank refcount and vblank disable
request after 2.a is going to fail. This can be fixed
by avoiding concurrency between mode_set call and vblank
request.

Change-Id: Ibb810ec90e81d63feee443f1c37dd736d5cfac0d
Signed-off-by: Dhaval Patel <pdhaval@codeaurora.org>
2020-06-25 13:54:21 -07:00
Amine Najahi
b121756b5d disp: msm: sde: adjust DSC encoders to support all 4LM topologies
Add support for all 4LM topologies in new DCE encoder framework.
This change also aligns with the new way of checking topology
information.

Change-Id: I5358d60634070bdb26059056db884ad4161c073e
Signed-off-by: Amine Najahi <anajahi@codeaurora.org>
2020-05-28 19:25:09 -07:00
Alisha Thapaliya
e2f98dc79b Revert "disp: msm: sde: adjust DSC encoders to support all 4LM topologies"
This  reverts commit 6a50aedbfa.

Change-Id: I3570b18728cfad2843ca7f3a7d0276cda32c9492
2020-05-14 11:51:15 -07:00
Amine Najahi
6a50aedbfa disp: msm: sde: adjust DSC encoders to support all 4LM topologies
Add support for all 4LM topologies in new DCE encoder framework.
This change also aligns with the new way of checking topology
information.

Change-Id: I20785c96569fd07cbd8016d244a7e4c929bfa071
Signed-off-by: Amine Najahi <anajahi@codeaurora.org>
2020-05-06 14:16:40 -04:00
Steve Cohen
d26bf3c6fd disp: msm: sde: move HW recovery outside ppdone wait
With posted start enabled SW no longer waits for ppdone events
unless more than one frame is in queue. HW recovery logic relied
on these waits to know when we recover from a timeout. This
change moves the HW recovery SUCCESS event signalling outside of
the wait to ensure this event is sent to user-space regardless
of the status of posted start.

Change-Id: I8896e8126284b415513499723ccf0155ee8bc6a7
Signed-off-by: Steve Cohen <cohens@codeaurora.org>
2020-05-04 19:48:51 -07:00
Shashank Babu Chinta Venkata
8b8bfe0165 disp: msm: make msm_drm into single module
Make msm_drm into single module and all child driver
registers and unregisters are handled from parent's
register and unregister respectively.

Change-Id: I017513d1de3b6b25dd5543d7fa7741c0bac1740d
Signed-off-by: Shashank Babu Chinta Venkata <sbchin@codeaurora.org>
Signed-off-by: Narendra Muppalla <NarendraM@codeaurora.org>
Signed-off-by: Chandan Uddaraju <chandanu@codeaurora.org>
2020-04-28 15:52:39 -07:00
Rajkumar Subbiah
c0d4857a81 disp: msm: sde: adjust intf timing for widebus
From Lahaina onwards, widebus is enabled for compressed DSI stream.
This change adjusts interface timing parameters to account for widebus.

Change-Id: Ie6b739ed2cdb515064e3a94404b3e0fe07755d7e
Signed-off-by: Rajkumar Subbiah <rsubbia@codeaurora.org>
2020-04-09 14:14:55 -04:00
Veera Sundaram Sankaran
bceea4e1fe disp: msm: sde: reset ctl on autorefresh disable failure
Reset MDP ctl path and DSI ctl on autorefresh
disable failure. This will enable the hardware
to recover from the hang.

Change-Id: Ia9acc8573c22e0713179ef4f6ef604caacabfadb
Signed-off-by: Veera Sundaram Sankaran <veeras@codeaurora.org>
2020-03-28 23:07:32 -07:00
Narendra Muppalla
68ee65353b disp: msm: sde: align timing engine vsync based on panel vsync
This change adds logic to align timing engine vsync with panel
tear check if it is supported.

Change-Id: I3f881f392929589848c893f567822b21c0650000
Signed-off-by: Narendra Muppalla <NarendraM@codeaurora.org>
2020-03-11 10:14:57 -07:00
Dhaval Patel
9438f3448b disp: msm: sde: add underrun line count information
Add underrun line count information for each underrun.

Change-Id: I34a740c33240fa8d444f4bbc3b8b014b0282fca1
Signed-off-by: Dhaval Patel <pdhaval@codeaurora.org>
2020-02-28 11:57:47 -08:00
Abhinav Kumar
e3f23771ba disp: msm: add support for variable compression ratios
Currently the compression ratio is hard-coded to either 2:1 or
3:1 in several places. This is not sufficient for new compression
algorithms as they can support higher compression ratios.

Add support for calculating the compression ratios from the source
and target bpp thereby eliminating hard-coding.

Change-Id: I6383f3d0c781193d0a9ed74df5a95d8e856edb3d
Signed-off-by: Abhinav Kumar <abhinavk@codeaurora.org>
2020-01-29 13:46:57 -08:00
Abhinav Kumar
c4f5050e13 disp: msm: add VDC topology related changes
Add support to configure the DPU pipeline to support VDC-m
topologies.

Change-Id: Ib8ce9a0eaeaa838759fb09cb2ee164d4765e4989
Signed-off-by: Abhinav Kumar <abhinavk@codeaurora.org>
2020-01-29 13:45:35 -08:00
Abhijit Kulkarni
a8f60081ae disp: msm: sde: add api to query topology details.
This change adds new resource manager api to get number of
ctl paths, interfaces and compression encoders used in the
current topology. This API is required to support both dsc
and vdc encoders and make implementation more generic.

Change-Id: I6cc25e51574cf71cd39f479049572ee7b7e0ead0
Signed-off-by: Abhijit Kulkarni <kabhijit@codeaurora.org>
2020-01-22 12:33:23 -08:00
Veera Sundaram Sankaran
fb54f6e6e7 disp: msm: sde: switch to WD vsync on unexpected panel jitter
Switch to watchdog vsync whenever panel jitter is
identified during frame-transfer on command mode display.
This would allow the HW to finish processing the frame
with watchdog vsync source. Switch back to default vsync
source after the frame-transfer is complete. This would
help in the MDP hang issues in panels that generate TEs
with thresholds greater than the projected jitter.

Change-Id: Ic3fa78d90e7f44cb0186857716ac27e72505fd32
Signed-off-by: Veera Sundaram Sankaran <veeras@codeaurora.org>
2019-10-01 13:32:42 -07:00
Dhaval Patel
6f06e5cd6f disp: msm: sde: wait for specific pp_done instead of zero
2 Frames transfer pending is possible with posted start.
One ongoing frame and another triggered frame. Current SW
waits for pp_done interrupt if pending frame count is greater
than 1. It is possible that interrupt may be missed for ongoing
frame. In that case, SW should run pp_done wait for one by one
frame instead of two frames together. It allows encoder to
check the ctl scheduler status and trigger the frame done
event on time.

Change-Id: I4817842292d96747890ee70da8a5bdf9b56816ed
Signed-off-by: Dhaval Patel <pdhaval@codeaurora.org>
2019-08-20 21:12:52 -07:00
Veera Sundaram Sankaran
5a2dfc1e83 disp: msm: sde: fix release fence signaling in error cases
Handle release fence/frame-done error signalling for
error case like esd failure, pp_done timeout, interrupt
disable on cpu, etc. It fixes the race condition for
pending_frame count update and also triggers correct
wait function for wr_ptr wait failure.

Change-Id: Iad08f20592c97221a1626bb40e607c398a9812b6
Signed-off-by: Veera Sundaram Sankaran <veeras@codeaurora.org>
Signed-off-by: Dhaval Patel <pdhaval@codeaurora.org>
2019-08-07 18:56:47 -07:00
Veera Sundaram Sankaran
6da6eb6774 disp: msm: sde: reset ctl during wr_ptr_irq timeout
wr_ptr_irq timeout signifies that the MDP is stuck
on either the current or previous frame. Handle
ctl reset and fence signalling as part of this
timeout handling. This logic would help to recover
the HW faster in case of posted-start.

Change-Id: I09b3d21772df431f9fc4a58b2fd9b4fcac4a7de7
Signed-off-by: Veera Sundaram Sankaran <veeras@codeaurora.org>
2019-06-24 15:33:56 -07:00
qctecmdr
32548d1507 Merge "disp: msm: sde: fix rm/kms for handling all cont-splash cases" 2019-06-08 19:19:55 -07:00
qctecmdr
9d87e36a77 Merge "disp: msm: add changes missing during snapshots" 2019-06-04 23:42:23 -07:00
Dhaval Patel
df2fbca4b8 disp: msm: sde: avoid wb done wait for cwb in wait_for_commit
Existing cwb implementation waits for WB done interrupt in
wait_for_commit_done API call. This serializes the cwb commit
and causes frame trigger delay on primary display. MDSS hw allows
to trigger the cwb frame when previous frame is in-progress. This
change updates driver to allow parallel frame trigger for cwb
enabled display. It releases frame N cwb output buffer in frame
N+1 wait_for_commit done call.

Change-Id: Id4f2a0cc78a3f24a1b5ce96dc907780246768dbf
Signed-off-by: Raviteja Tamatam <travitej@codeaurora.org>
2019-06-03 10:04:19 -07:00
Samantha Tran
1ab07a4d7c disp: msm: add changes missing during snapshots
This change ports the missing changes from 4.14 to 4.19
that were missed. It includes changes up until
commit 0f8fb25421ff ("cnss2: Add device version to
SOC info structure").

Change-Id: Idfdfe891f146e389e3c65cc3fc4c98d93220e789
Signed-off-by: Samantha Tran <samtran@codeaurora.org>
2019-06-03 09:07:38 -07:00
Veera Sundaram Sankaran
8b8fbfbeef disp: msm: sde: fix rm/kms for handling all cont-splash cases
Fix resource and splash buffer handling in resource manager
and sde_kms to support continuous splash to be enabled/disabled
independently in multiple built-in display usecase.

Change-Id: I446ea9b08a794e2b053c37f55b31e51404bbcf71
Signed-off-by: Veera Sundaram Sankaran <veeras@codeaurora.org>
2019-05-31 15:58:40 -07:00
Veera Sundaram Sankaran
6daf1c58e7 disp: msm: sde: use wr_ptr interrupt instead of ctl_start
SDE driver triggers the frame and waits for the
ctl_start interrupt for command mode display. This interrupt
provides confirmation that hardware has picked up the
frame. Retire fence signaling is associated with
this interrupt and it is sent at the rd_ptr interrupt
after ctl_start. Due to lut dma delay, ctl_start interrupt
may be trigger before rd_ptr or after rd_ptr. SW manages
this complexity and handle retire fence for different cases
with 500us threshold logic.

This change replaces the ctl_start interrupt with wr_ptr
interrupt by programming it to trigger at 1st write line
count. This is guaranteed to come every time and it is close
to rd_ptr interrupt. That allows retire fence trigger at
wr_ptr interrupt and simplifies the SW logic. CRTC commit
thread would be held slightly longer with this change
as the wr_ptr is always close to rd_ptr and after
ctl_start.

Change-Id: Ic47a8f82c854b4aded0d70c95af853b28a68ffd6
Signed-off-by: Veera Sundaram Sankaran <veeras@codeaurora.org>
2019-05-23 10:29:30 -07:00
Samantha Tran
3be27eafcc disp: msm: snapshot of msm and sde driver
This snapshot ports changes from 4.14 to 4.19 into
the msm and sde layer. Snapshot was taken as of
commit 0f8fb25421ff ("cnss2: Add device version to
SOC info structure").

Change-Id: I59b799a78319c2db6930a2a10bc38976f8c09898
Signed-off-by: Samantha Tran <samtran@codeaurora.org>
2019-05-22 13:08:31 -07:00
Veera Sundaram Sankaran
1e3d105dc0 disp: msm: sde: log pp-line count in event logs
Log ping-pong current line count during ctl-start
and rd-ptr interrupt. This will help in debugging
ping-pong timeout issues.

Change-Id: I58185330fe9e8a64f48d6da60c974b23a9e68b44
Signed-off-by: Veera Sundaram Sankaran <veeras@codeaurora.org>
2019-05-15 15:36:06 -07:00
Narendra Muppalla
3709853456 Display drivers kernel project initial snapshot
This change brings msm display driver including sde,
dp, dsi, rotator, dsi pll and dp pll from base 4.19 kernel
project. It is first source code snapshot from base kernel project.

Change-Id: Iec864c064ce5ea04e170f24414c728684002f284
Signed-off-by: Narendra Muppalla <NarendraM@codeaurora.org>
2019-04-14 22:20:59 -07:00