Add support to read OIS lens position data and
current Qtimer value.
Add support to write qtimer time stamp to OIS FW.
CRs-Fixed: 2721489
Change-Id: I7a4f4d342ff41c72db892ea706d0cfd6d667d96d
Signed-off-by: Sureshnaidu Laveti <lsuresh@codeaurora.org>
In case if the CPAS registration is failed before freeing the
memory of the subdev, subdev need to be unregistered so that
subdev list entry will not become NULL and other subdev can
be added.
CRs-Fixed: 2708016
Change-Id: I464c73411596fc562fc7a190ddfa130f23ee487a
Signed-off-by: Tejas Prajapati <tpraja@codeaurora.org>
CRM may give an invalid request id to sensor when the
first req isn't ready, since we don't have chance to
update prev_apply_data in CRM. This change adds a
protection in sensor side to only handle the valid
request for per frame update.
CRs-Fixed: 2738404
Change-Id: Ic43d68a69c10b7b063b40a0cef17e55e748b8b2a
Signed-off-by: Depeng Shao <depengs@codeaurora.org>
Implement PHY settings as per HPG version File name
CRs-Fixed: 2736884
Change-Id: I01949090448d9f8ff691e40ca38a800dbc15f9d5
Signed-off-by: Tony Lijo Jose <tjose@codeaurora.org>
Currently proper error handling is not present in case of failure
in adding request to request manager. This change adding proper
result send out to UMD.
CRs-Fixed: 2738448
Change-Id: I7fb54c085ac670c197523e4d7cb416eeb414a2ed
Signed-off-by: Jigarkumar Zala <jzala@codeaurora.org>
As a part of interrupt status dump, it needs details for number
of register to be read. This change fill the interrupt size
variable to do the correct operation.
CRs-Fixed: 2729624
Change-Id: I9ee97e5a6c495062753fbd0ed44a178908c5109b
Signed-off-by: Jigarkumar Zala <jzala@codeaurora.org>
Reinit completion rd_done completion variable before each read so that
the rd_done completion variable state will be clean .
CRs-Fixed: 2736884
Change-Id: I2cd7350da8e8270c1cd9238dec0eec9f84360899
Signed-off-by: Tony Lijo Jose <tjose@codeaurora.org>
The queue size of cci hw version 1.2.9 is 64 and 16. Due to wrong
conditional check the cci queue size is assigned wrongly for cci version
1.2.9. This change corrects the cci queue size for cci version 1.2.9.
CRs-Fixed: 2736884
Change-Id: I60508fadec89831f3b877d64631b7da6304c030d
Signed-off-by: Tony Lijo Jose <tjose@codeaurora.org>
Add logic to dynamically lane configuration for the CPHY combo
mode, where individual sensor can configure with different datarate
by configuring the respective lanes at the time of configuration.
CRs-Fixed: 2729624
Change-Id: Ie3714f9fd5d24c6cea8824f3a9dd9dc7f6f6d976
Signed-off-by: Jigarkumar Zala <jzala@codeaurora.org>
This change adds support to notify frame skip when CRM
not ready to apply a normal setting. Sensor and custom
device also want to update the HW settings in some
conditions even if a frame is skipped.
CRs-Fixed: 2691642
Change-Id: Ibd2b22655d0f6b6c90663df75a0f5fad8565e918
Signed-off-by: Depeng Shao <depengs@codeaurora.org>
Add support for new CSIPHY version 2.1.0. Add hw
register file for CSIPHY 2.1.0.
CRs-Fixed: 2724449
Change-Id: Id3f21b4f60e807ca6fef762f0c6da193ae78e099
Signed-off-by: Jigar Agrawal <jigar@codeaurora.org>
Currently lane enablement is happening as a part of lanemask
field, which is send by UMD. Lane enablement should be purely
depends on laneCnt and laneAssign attributes. Also, combo mode
sensors needs to come with combo mode flag set from the UMD.
This change updates the logic for lane enablement with respect
to laneAssign and laneCnt, and also covers all combomode selection
as per the request. This change also enables the sensors to acquire
and streamon/streamoff at anytime in session.
CRs-Fixed: 2677450
Change-Id: I4f0d3ffd7245a931c273611c9c4b7e503c038664
Signed-off-by: Jigarkumar Zala <jzala@codeaurora.org>
Submodules per master uninitialize check needs to be set to false
when all submodules are released for that master. Correct the
refcount check for the appropriate operation.
CRs-Fixed: 2686487
Change-Id: Iaea94e4d1ad83bef99d40cec4e96de3993783ec1
Signed-off-by: Jigarkumar Zala <jzala@codeaurora.org>
The cci configuration will be transitioned to a new API that does not
require routing through the v4l layer. This is work-in-progrss so in
the mean time prevent the device from being exposed as configurable
from userspace.
The ioctl will still be exposed to kernel users so fix the arg size
as well. We want size of struct not pointer.
CRs-Fixed: 2702760
Change-Id: I9c7bd8f76980603dbf27e1c5bc9b19f8a3b8a39a
Signed-off-by: Fernando Pacheco <fpacheco@codeaurora.org>
Add support for CSIPHY v1.2.4 in the PHY driver.
CRs-Fixed: 2709344
Change-Id: Ic0eeabe2e978e6f2513e61a063e8b354c8466954
Signed-off-by: Shravan Nevatia <snevatia@codeaurora.org>
Multiple Sensor submodules can stream on same CCI master. Currently,
there is not any knowledge, whether requested master is already
initialized by other submodules. This can result in operation slave
in error, while other submodule tries to init the same master.
This change adds the boolean variable to notify cci hardware, whether
master is already initialized, and do the operations accordingly.
CRs-Fixed: 2686487
Change-Id: I8b5d01fc9fd06176e9fbd9a69d56424d4ef79a73
Signed-off-by: Jigarkumar Zala <jzala@codeaurora.org>
Dump csiphy registers on following fatal errors:
1. lane overflow error
2. unbounded frame error
3. SOT ans EOT reception error
4. stream underflow error
These errors irqs are set at csid end, Currently there is no
interface to send message from one subdevice to other if the subdev is
not a real time device. This change adds an interface to notify the
no real time subdev.
CRs-Fixed: 2696744
Change-Id: I522167d1639ac298bc739a8a5a380a01356f0776
Signed-off-by: Vishal Verma <vishverm@codeaurora.org>
Signed-off-by: Jigar Agrawal <jigar@codeaurora.org>
Fixes exit call flow as a part of rmmod.
CRs-Fixed: 2675526
Change-Id: I47111a737cb06d9bb3d0a417a471c5c9fb545999
Signed-off-by: Jigarkumar Zala <jzala@codeaurora.org>
msm: camera: tfe: Fix variable initialization issues
msm: camera: isp: Dual tfe event check with proper hw idx
msm: camera: smmu: Add support for non-contiguous mermory region
msm: camera: smmu: Use iommu best match algo for camera
msm: camera: ope: Optimize allocation of IO configuration
msm: camera: ope: Fix for KW Issues
msm: camera: ope: Add support for stripe level height configuration
msm: camera: tfe: Enable the delay line clc
msm: camera: ope: Fix false alarm for OPE HW timeout
msm: camera: tfe: Support register dump per request
msm: camera: ope: Increase max number of stripes
msm: camera: ope: Change packer and unpacker format in case NV12
msm: camera: tfe: Add packet code get command for tfe
msm: camera: ope: Trigger recovery in case of violation on write bus
msm: camera: ope: Protect ope hw reset with mutex
msm: camera: ope: Add a check for valid request in cdm callback
msm: camera: ope: Remove the BW & clock vote in release context
msm: camera: ope: Reduce OPE BUS memory
msm: camera: ope: Fix return value for ope acquire
msm: camera: ope: Fix false alarm for OPE request timeout
msm: camera: ope: Avoid deadlock during recovery after HW hang
msm: camera: tfe: tfe debug enhancement
msm: camera: cdm: Fix irq_data value in case of inline irq
msm: camera: flash: Switch off flash on provider crash
msm: camera: ope: Initialize ope hw mutex structure
msm: camera: cdm: Flush all available FIFOs during reset
msm: camera: cpas: Add mandatory bw option for axi ports clocks
msm: camera: ope: Use vzalloc to allocate the write bus ctx structure
msm: camera: ope: Fix handling of init hw failure
msm: camera: tfe: Enable per frame register dump for rdi only context
msm: camera: cdm: Protect cdm core status bits with mutex
msm: camera: cdm: correct the error check in cmd submit irq
msm: camera: ope: Fix unclock access during HW reset
msm: camera: ope: Program frame level settings after idle event
msm: camera: ope: Delay releasing of resources for last context
msm: camera: isp: Increase default SOF freeze timeout
msm: camera: smmu: Add map and unmap monitor
msm: camera: isp: Add trace events across ISP
msm: camera: smmu: Profile time taken for map, unmap
msm: camera: ope: Start context timer on receiving new request
msm: camera: tfe: Reduce stack size during set axi bw
msm: camera: cdm: Check for HW state before dumping registers
msm: camera: ope: Reduce stack footprint during acquire
msm: camera: tfe: Disable clock if tfe2 is not supported
msm: camera: cdm: Avoid cdm pause incase of BL submit
msm: camera: tfe: Optimize CSID IRQ logging
msm: camera: ope: Move request id validity check outside of lock
msm: camera: tfe: Correct the tfe hw manager dump logic
msm: camera: ope: Synchronize flush and submit BLs
msm: camera: cdm: Protect cdm reset status
msm: camera: cdm: Handle cdm deinit sequence properly
msm: camera: tfe: Reduce reset timeout to 100ms
msm: camera: ope: Fix hang detection
msm: camera: ope: Make non-fatal logs as debug and info logs
msm: camera: tfe: set overflow pending bit to zero after HW reset
msm: camera: ope: Do not disable CDM during error handling
msm: camera: ope: Add support for OPE Replay
msm: camera: ope: Stop OPE in case of init failure
msm: camera: ope: Synchronize process cmd and flush request
msm: camera: cdm: Fix CDM IRQ handling
msm: camera: tfe: LDAR dump for TFE
msm: camera: ope: Fix the length check for debug buffer
msm: camera: cdm: Fix CDM reset logic
msm: camera: ope: Dump debug registers in case of HW hang
msm: camera: tfe: Support the RDI bus port for line based mode
msm: camera: cdm: Handle out of order reset done events
msm: camera: ope: Consider other contexts during timeout
msm: camera: ope: Put GenIRQ in last stripe BL
msm: camera: tfe: Process the rdi interrupts for rdi only resource
msm: camera: jpeg: Check the HW state before accessing register
msm: camera: csiphy: Update csiphy power-up sequence for lito v2
msm: camera: cdm: Secure freeing of request lists using locks
msm: camera: cpas: Add support for Scuba camnoc
msm: camera: csiphy: Clear secure phy flags on release
msm: camera: tfe: validate the tfe bw num paths
msm: camera: ope: Reorder the reset order in ope acquire
msm: camera: ope: Dump debug registers in case of reset failure
msm: camera: ope: Add logic to detect hang in CDM
msm: camera: isp: Increase max count of cfg to support more init packets
msm: camera: core: Fix cpas axi clk rate overflow.
CRs-Fixed: 2668666
Change-Id: I882ca4bd117bebc7d1c62bc82299d69d7b5c9388
Signed-off-by: Trishansh Bhardwaj <tbhardwa@codeaurora.org>
There is high chances, when camera server crash flash may not have
flash off request scheduled with CRM. In case of torch on, followed
by shutdown sequence, if flash off request is not scheduled, flash
remains turned on. This change adds flash off operation, in case
of shutdown.
CRs-Fixed: 2691916
Change-Id: I472f2b204b93d0cdc3d8a1f14fff29ab479e4588
Signed-off-by: Jigarkumar Zala <jzala@codeaurora.org>
Update the master status data type, as it expects the negative value
and do the operation accordingly. Also, correct the return code and
update the validation check.
CRs-Fixed: 2686717
Change-Id: I8ecae74de2995a08e532a7f0ef078d48d45a928e
Signed-off-by: Jigarkumar Zala <jzala@codeaurora.org>
Turn off the flash while flushing if the flushed request is
flash off and removed flush request ID validation in flush_all
scenario.
CRs-Fixed: 2667472
Change-Id: Iaf123f2f56117d7b7d1ef6d2291b0cde8c232d44
Signed-off-by: Anil Kumar Kanakanti <akanakan@codeaurora.org>
Changes extraneous CAM_INFO logs into CAM_DBG logs in order to help
de-clutter serial boot logs.
CRs-Fixed: 2669269
Change-Id: I7589bd64363aa122c46e1193c68bbf49d78a4a9a
Signed-off-by: Karthik Jayakumar <kjayakum@codeaurora.org>
Lane enable register reset is not required any delay to reflect the
change. This change removes the unnecesaary delay from lane_enable
register. Also, adding 1us of delay between back to back write in
SW reset register along with condition based refelction of delay.
CRs-Fixed: 2671221
Change-Id: I010570045a97fc1489a84d22ebd39df6f6f14f0a
Signed-off-by: Jigarkumar Zala <jzala@codeaurora.org>
Update 2phase and 3phase bring up sequence for different
data rate to reflect latest hpg change.
CRs-Fixed: 2671221
Change-Id: Idd7445a523486a5fb4ec5d43bcf8987c54c089b0
Signed-off-by: Jigarkumar Zala <jzala@codeaurora.org>
External configs should be checked by using IS_REACHABLE/IS_ENABLED
macro's to check if the config option is set for the build target.
CRs-Fixed: 2584631
Change-Id: I07a0d95391a83a2264f826e2935d67686d295317
Signed-off-by: Karthik Jayakumar <kjayakum@codeaurora.org>
Secure CP control register always assume that it contains 7 bit
mask for each PHY. But this register format is different based on
target. Update secure CP control bitmask generation logic for each
PHY index based on phy_version.
So we have below 3 combinations to handle at SW.
1.Old Titan Targets : 7 bits for each PHY.
2.PHY 1_2_1 : for 4 pHYS 7 bits and for
remaining 2 PHYs 8 bits are reserved.
3.Mimas (PHY 2_0_1): 8 bits for each PHY.
CRs-Fixed: 2624698
Change-Id: Iac4c3c718fc96a51592e07b45458fb045c52366d
Signed-off-by: Anil Kumar Kanakanti <akanakan@codeaurora.org>
New usecase for flash driver requires to be trigger at EOF.
This change adds the new operation code support in flash
driver along with EOF enable support in crm and across
other drivers. Also to improve the performance, this change
adds the logic to dynamically update the subscribe event to
CRM, so that CRM can enqueue EOF events when Flash or any other
device add the request for EOF.
CRs-Fixed: 2633194
Change-Id: I2f68ac7fc6a4699debd39b64319728cdf17bbcfa
Signed-off-by: Jigarkumar Zala <jzala@codeaurora.org>
