Add support for parsing ebi and llcc data busses for split vote
support as only the mnoc interconnect data bus was getting
parsed correctly.
Change-Id: I331bbcb0c61b341d935882f5560702f6317fc2a7
Signed-off-by: Steve Cohen <cohens@codeaurora.org>
This change addresses out of range and null checks in
sde driver.
Change-Id: I905d795edf6715aa990dd7bbaf061734e95ddea6
Signed-off-by: Narendra Muppalla <NarendraM@codeaurora.org>
This change fixes feature specific partial update checks in
atomic check by enabling partial update specific features only if
respective core feature is enabled.
Change-Id: If3678a52fa0f8d9e1d714a662601e5628e1637d2
Signed-off-by: Prabhanjan Kandula <pkandula@codeaurora.org>
In dual display with continuous splash, when autorefresh gets
disabled in primary on first commit, solver mode gets enabled
and mdp_clock is gated whenever primary enters idle. The
secondary data path will get gated during that time and not advance
anymore. Asynchronous gating of the mdp_clock during operation
can also hang the secondary path. This change avoids entering
the solver mode which fixes the timeout in the autorefresh
disable sequence in the secondary.
Change-Id: I7562ce2ad72d3bb8e8b6b8f356fab6def0caaf92
Signed-off-by: Jayaprakash <jmadiset@codeaurora.org>
Acquiring mutex lock after enabling irq might lead to
deadlock if irq is dispatched immediately in some cases.
This change moves callback func check for irq prior to
enabling the irq line.
Change-Id: Ie1622e1ade268e41e97bf6d7683fa0bd972bcb7c
Signed-off-by: Yashwanth <yvulapu@codeaurora.org>
After coming out of idle state, bus vote is governed only
if there any change in perf compared to before entering idle
state. If the perf is same before and after the idle state,
bus update request is not considered and min bus votes are
voted. This change resets crtc core perf while entering
idle state always in command mode.
Change-Id: If172207422adc25fcee497aebe23aad1ac6ce7cc
Signed-off-by: Yashwanth <yvulapu@codeaurora.org>
Flush sde crtc event thread before idle notification
to make sure that pending frame count is zero. This
allows sde encoder module to trigger power collapse
during pm_suspend scenario.
Bug: 146848315
Change-Id: Ic65a76273417c567c330e970c97183e5c0f4ad17
Signed-off-by: Dhaval Patel <pdhaval@codeaurora.org>
Update autorefresh disable sequence-2 by avoiding
tearcheck enable configuration. Updated sequence
will trigger the frame by resetting the write
line count with tearcheck start position.
Change-Id: I984251c0cb23475f20cd5ea62122a167324d6670
Signed-off-by: Dhaval Patel <pdhaval@codeaurora.org>
Autorefresh might be still in enabled state after
write_ptr reached to display height. This patch
checks the autorefresh status bit and keeps polling
the bit till autorefresh sequence is in enabled
state. It times out after 1 second if autorefresh
is still in enabled state.
Change-Id: I5d4f4cb35e5cc8c680c1878f52cee385f709d764
Signed-off-by: Dhaval Patel <pdhaval@codeaurora.org>
In Dual display concurrencies there are certain cases where
irq_idx and vblank_refcount state mismatch can occur.
To avoid it, during setup of irq_hw_idx, reset the vblank_refcount
and unregister read ptr irq if not yet done by then along with
maintaining global mutex lock for vblank_refcount.
Also, if register IRQ fails, correct vblank_refcount so
that IRQ registration can be tried again.
Change-Id: I06bcbf71c6a43bd161ff61093d9f6063a292d6bc
Signed-off-by: Raviteja Tamatam <travitej@codeaurora.org>
Signed-off-by: Samantha Tran <samtran@codeaurora.org>
This change removes the check comparing encoder's crtc to the
crtc passed in. This check was required up until commit 70486d209c
("disp: msm: sde: remove vblank cache logic"). Now that iteration
is only happening over encoders in the encoder mask, there is no
need to check for a matching crtc to ensure it is valid.
Change-Id: I4ee08061e6c8679fe03f42cf2f889704c99526e5
Signed-off-by: Samantha Tran <samtran@codeaurora.org>
If unregister event fails to succeed due to invalid params
or due to inappropriate hardware configuration, The callback function
is not deleted from the irq table. This leads to list corruption
issues in the subsequent calls to event enable and disable.
Change-Id: I549bd15b07b9a3b04c0f0a239bd85748acf7d473
Signed-off-by: Lakshmi Narayana Kalavala <lkalaval@codeaurora.org>
Input event handler can be unregistered without being
registered in the case where DMS or DYN_CLK flags
are enabled on first commit, add changes to handle
this sequence.
Change-Id: Idf4f9f310b5d56df396bfa5c6477e94d4fae7a9f
Signed-off-by: Jayaprakash <jmadiset@codeaurora.org>
Setting perf tuning mode through debugfs during suspend can
result in underflow. Ensure that we are able to set rates,
or reset values and return to remain in normal mode.
Change-Id: Ib88de888690086d982b023b017083fee4e4d2091
Signed-off-by: Nilaan Gunabalachandran <ngunabal@codeaurora.org>
Events can be registered by the driver clients using the custom event
registration ioctl.If display is not powered on when custom ioctl is
called, registration fails.Currently driver notifies user-space client
invalid error,instead it should notify that resources are not allocated
for display so that user-space client can retry.
Change-Id: Ia6e35c8c32bf00dbe2ef51b13092edf7bf5f41f7
Signed-off-by: Xu Yang <yangxu@codeaurora.org>
Signed-off-by: Gopikrishnaiah Anandan <agopik@codeaurora.org>
Add a null check for encoder before accessing ops.
Change-Id: I7b80f4aded89d6c6fe68a0d016f64e14f04f2e58
Signed-off-by: Samantha Tran <samtran@codeaurora.org>
During wb use case, if any of the input buffers are secure,
the output buffer must also be in secure. In order to
successfully check if output buffer is secure context,
kernel needs to access new connector state.
Change-Id: Ia0124418eac35cf6d3301603e39ed45b971e2665
Signed-off-by: Nilaan Gunabalachandran <ngunabal@codeaurora.org>
Submit a cwb frame event signal to notify the crtc that cwb
is completed. Currently cwb also uses the same frame done
event as primary. When a single cwb commit is completed, because
cwb is on a slower path there is a race condition in which the
subsequent frame done event for primary clears the refcount.
This fix isolates the events and removes this situation.
Change-Id: Ic3e18302eb8a497cbd7a00f271de2ab320576c83
Signed-off-by: Nilaan Gunabalachandran <ngunabal@codeaurora.org>
List head should be initialized after the irq node is allocated.
Change initializes the list head of the node.
Change-Id: I495751fcf2422bba3f39a0719e2d76738b691dd9
Signed-off-by: Lakshmi Narayana Kalavala <lkalaval@codeaurora.org>
Add framebuffer destroy immediately following plane cleanup
during secure display transition. Set state's fb to NULL
after destroying to avoid attempting to destroy fb again
during plane state destroy. Previously, framebuffer destroy
is happening after the context is detached while plane states
are being destroyed.
Change-Id: I273ce5b85c30962ea7e0a738a366487c9c85d4df
Signed-off-by: Samantha Tran <samtran@codeaurora.org>
This change adds support to check whether uidle
is supported for given target.
Change-Id: Icd7ef36eeefcd8d1fc3c960dc7c7560469945408
Signed-off-by: Yashwanth <yvulapu@codeaurora.org>
Stage property is modified for dimlayer during atomic
set property phase. This avoids any commit failure occurred due
to dimlayer checks during atomic check phase.
Change-Id: I4ff3d83a5aa9d6446fd4955f6c29854acf93bc68
Signed-off-by: Prashant Singh <prasin@codeaurora.org>
Signed-off-by: Krishna Manikandan <mkrishn@codeaurora.org>
Add support to expose base layer staging property to HAL.
In those targets where base layer staging is enabled in mixer,
layer with zorder 0 will be staged as base layer.
Change-Id: Id825357c61ac6913bdcb8a184fc501236519d5dd
Signed-off-by: Krishna Manikandan <mkrishn@codeaurora.org>
Add support to stage layer with zorder 0 as base
layer and stage borderfill only during null commit.
Change-Id: I54356c1b7834227cc3da00c211e71ac5816ce51a
Signed-off-by: Krishna Manikandan <mkrishn@codeaurora.org>
wr_ptr_wait_success is true only if wr_ptr interrupt arrives, so
initialize it after display kickoff.
Change-Id: I5790d9dac25352898ece160f6b258b50ca2edefa
Signed-off-by: Ray Zhang <rayz@codeaurora.org>
Update triggered power event to last event correctly,
regardless of whether a callback is called.
Add event log to see debugfs clock rate change.
Change-Id: Ifa9c1ffb450f50a3928eb44362723b6d495b2354
Signed-off-by: Nilaan Gunabalachandran <ngunabal@codeaurora.org>
RM allocated reservations for the ongoing commit are cleared when
there is a delay in ongoing commit scheduling and back to back
prepare comes. This clearing occurs in the subsequent checkonly
commit with modechange property set.
Timeline of the issue:
--> C1 commit check_only + modeset, RM allocated resources
--> C2 commit check_only scheduled before C1 commit with
check_only + modeset, overridden C1 reservations with
its own into rsvp_nxt
--> C1 commit scheduled and RM committed reservations
allocated by C2.
Change-Id: I46cc924fd6515590e32c8e97a82847d2bde97270
Signed-off-by: Jayaprakash <jmadiset@codeaurora.org>
CWB connector is tied to primary crtc along with primary connector.
Avoid using CWB connector power state in determining active crtc,
as it is already done via primary connector.
Change-Id: I35ec95349790990c49b9a63afd6e0f55d23b4887
Signed-off-by: Kalyan Thota <kalyant@codeaurora.org>
Signed-off-by: Krishna Manikandan <mkrishn@codeaurora.org>
Hardware structures for writeback ctl and cdm are set
to null during wb disable, to prevent crtc mode change
on primary during subsequent wfd and cwb sessions.
Change-Id: I7536203761c615c37c8633d1621951475895400a
Signed-off-by: Prashant Singh <prasin@codeaurora.org>
Signed-off-by: Krishna Manikandan <mkrishn@codeaurora.org>
The vsync callback for concurrent writeback is
not necessary. This would conflict with vblank
notification of primary as both belongs to the
same crtc.
Change-Id: Idb67915de086f94feb231d61b6f7e4e068a1ac35
Signed-off-by: Veera Sundaram Sankaran <veeras@codeaurora.org>
During validate, kernel should check if input buffer frame
buffer for wb conn is in secure context. If so, the output
buffer must also be secure context, or fail validate before commit.
Change-Id: I38e50f8b2ac71c8532d9d44df08850bf33180c41
Signed-off-by: Nilaan Gunabalachandran <ngunabal@codeaurora.org>
Clock rate can be set from debugfs, and this can attempt to
set clock rate even when display power is not enabled.
Set clock rate should check the last power event first.
Change-Id: Ibf01753a288e5a3003928664c99aa6dbf26350d6
Signed-off-by: Nilaan Gunabalachandran <ngunabal@codeaurora.org>
In dual display continuous splash case, there are certain
scenarios where pipe being used in secondary display at boot up
is allocated by primary crtc. Add check to return failure
in such cases.
Change-Id: I9047b6e7f91e59a9daff5089abb41017c068b449
Signed-off-by: Jayaprakash <jmadiset@codeaurora.org>
Add null check for pingpong block used during
the commit phase.
Change-Id: I3ebbcfe9c42ee6d1201a141f553bbb0a0ae97ad6
Signed-off-by: Jayaprakash <jmadiset@codeaurora.org>
For CTL_ACTIVE targets, slave ctl need not to be reserved
as both the interfaces can be driven with single ctl.
Add a necessary check before enabling the feature.
Change-Id: Id68d7dd4fc1cf9534466fd5bfa50c3f551d06ce4
Signed-off-by: Jayaprakash <jmadiset@codeaurora.org>
There can be few cases of ESD where CTL_START is cleared but
wr_ptr interrupt does not come. Signaling retire fence in these
cases to avoid freeze and dangling pending_retire_fence_cnt.
Change-Id: I167f69dce5cbe43b4771e5056d8a73bd7587e76e
Signed-off-by: Raviteja Tamatam <travitej@codeaurora.org>
Reset MDP ctl path and DSI ctl on autorefresh
disable failure. This will enable the hardware
to recover from the hang.
Change-Id: Ia9acc8573c22e0713179ef4f6ef604caacabfadb
Signed-off-by: Veera Sundaram Sankaran <veeras@codeaurora.org>
This change updates mandatory wb property to
optional as few low tier targets do not have wb
hardware block.
Change-Id: I39e6bf80a527dff95905e0a204401185e9e7bc03
Signed-off-by: Yashwanth <yvulapu@codeaurora.org>
BW_INDICATION indication must be programed before BWI_THRESHOLD.
Otherwise, it will revert to legacy behaviour and rsc wakeup is
delayed by one vsync causing janks. In current code BW_INDICATION
is done after LM/SSPP programming and plane fence wait. Moved the
perf_crtc_update before this and just after ctl prepare configuration
to avoid chances of BW_INDICATION crossing BWI_THRESHOLD time.
Change-Id: Ie976720910c34aaf140f1ce7daef38ba20bc10f5
Signed-off-by: Raviteja Tamatam <travitej@codeaurora.org>
Update the uidle wd timer load value to 12. This change will allow
for 10us wd timer per power team recommendation.
Change-Id: I8a654fc1f70886c75c077e77c926bebf3bad2305
Signed-off-by: Samantha Tran <samtran@codeaurora.org>
Update the DSC initial line calculations to use logical
or operator instead of bitwise operator. Additionally
this change takes care of removing unnecessary brackets.
Change-Id: Ie7fd099e726f0dbed012d5406860300a48d9b2eb
Signed-off-by: Abhijit Kulkarni <kabhijit@codeaurora.org>
