Add debug capability to dump clocks before entering pm suspend.
This will help debug invalid register access when clocks are off
during adversarial test cases.
Change-Id: I80d19b751a3b9a1de0cc64699a21a1852d614ced
Signed-off-by: Amine Najahi <anajahi@codeaurora.org>
Add support to read cphy boolean flag from panel dtsi
and configure DSI PHY registers accordingly. Update the
bit/byte clock calculation according to cphy specifications.
Update clock parents so that the relevant divider blocks
are configured to support cphy.
Change-Id: Iaca61eec01a488657b086f59910c52f8c79e26a4
Signed-off-by: Chandan Uddaraju <chandanu@codeaurora.org>
Signed-off-by: Yuan Zhao <yzhao@codeaurora.org>
Add DSI api to control the connection status of the
DSI interface. This would be used in the VM usecase,
where the connection would be enabled/disabled during
device assign/unassign while switching to the VM.
Change-Id: Ifff41244824ade7a6b8dca77651d82fd5207f8e0
Signed-off-by: Veera Sundaram Sankaran <veeras@codeaurora.org>
If DPU hardware supports demura feature, install the connector
properties related to demura feature.
Change-Id: Ieaddfc695e9f57e3c45e2bc0bd2c2e103f895ba8
Signed-off-by: Gopikrishnaiah Anandan <agopik@codeaurora.org>
DSI host vsync is expected to align with panel internal vsync
during transition from command mode to video mode operation.
In order to facilitate this, keep panel TE enabled in video mode
operation until it is aligned with vysnc.
Change-Id: I3fc59b01336b30cd436be332af6953c5a01be7fd
Signed-off-by: Narendra Muppalla <NarendraM@codeaurora.org>
The current solution triggers the DMA command and waits till
the command dma done and ISR signals completion. This change
introduces asynchronous wait after a DCS command has been
triggered. Enable this mode only during pre kickoff, so as to not
block commit thread.
Change-Id: Iead7b6328883e844147d47ff68dc878943879553
Signed-off-by: Satya Rama Aditya Pinapala <psraditya30@codeaurora.org>
Add changes to support avr mode config update during
prepare commit which happens before gpu fence wait
for the input buffers.
Change-Id: Ib2cb5b7e1f10501914c003f6cf066b85048f79d4
Signed-off-by: Kalyan Thota <kalyant@codeaurora.org>
Signed-off-by: Jayaprakash <jmadiset@codeaurora.org>
Video and command mode will be included in same timing node
when POMS is enabled, but DFPS is only applicable for video
mode, so add this change to differentiate panel mode, and fill
display mode according to panel mode.
Change-Id: I6aa0f8572f23f0612684ed7cdf406b20ab3df822
Signed-off-by: Lei Chen <chenlei@codeaurora.org>
A new API to get drm_panel from dsi_display.
The drm_panel was defined as a member of drm_connector.
When doing connector initialize, can set drm_panel to
drm_connector. So this API is needed to get drm_panel
from dsi_dsiplay.
Change-Id: I0ec9de5a9407085048a8fef421b7b28d466085ed
Signed-off-by: Yuan Zhao <yzhao@codeaurora.org>
This change adds support for dynamic switching of dsi clocks
to avoid RF interference issues. Also with dynamic dsi clock
switch feature coming into picture, now populate the supported
refresh rate as list instead of providing a range. Modify the
logic to enumerate all the modes in dsi driver, taking dynamic
bit clocks, resolutions and refresh rates into account.
Change-Id: I5b6e62bc935cf2234bdd96fcb3c7537b4e735fff
Signed-off-by: Sandeep Panda <spanda@codeaurora.org>
Signed-off-by: Ritesh Kumar <riteshk@codeaurora.org>
Signed-off-by: Yujun Zhang <yujunzhang@codeaurora.org>
Add support to selectively enable clock gating for supported
DSI clocks using a new debugfs node - config_clk_gating. This
new node would be created for every display node. See below
for usage examples:
To enable clock gating only for BYTE clock:
echo 1 > /sys/kernel/debug/<display_name>/config_clock_gating
To enable clock gating only for PIXEL clock:
echo 2 > /sys/kernel/debug/<display_name>/config_clock_gating
To enable clock gating only for PHY clock:
echo 4 > /sys/kernel/debug/<display_name>/config_clock_gating
To enable clock gating only for all clock:
echo 7 > /sys/kernel/debug/<display_name>/config_clock_gating
To disable clock gating for all clocks:
echo 8 > /sys/kernel/debug/<display_name>/config_clock_gating
To go back to default setting:
echo 0 > /sys/kernel/debug/<display_name>/config_clock_gating
Change-Id: I83713d86eb1b9675d40d51fc20de81cca0aeb1c0
Signed-off-by: Aravind Venkateswaran <aravindh@codeaurora.org>
DSI display may support video mode and command mode both and it may
support transition between these two modes.
This change adds seamless transition between these two modes for DSI
display by avoiding crtc enable/disable and panel power on/off
during modeset.
Change-Id: Id7ddaef7d1f0f7cc7d52283755bad53a246adec6
Signed-off-by: Lei Chen <chenlei@codeaurora.org>
Add runtime_pm ops support in drm driver instead
of direct sde_power_resource_enable/disable call.
It allows drm driver to use runtime pm refcount logic
to track the resources instead of custom implementation.
The change also removes the NRT_CLIENT support from
sde_power_handle code to simplify it further.
Change-Id: Ib14692dca5876703d0a230da2512d731b69b8ebb
Signed-off-by: Dhaval Patel <pdhaval@codeaurora.org>
This change brings msm display driver including sde,
dp, dsi, rotator, dsi pll and dp pll from base 4.19 kernel
project. It is first source code snapshot from base kernel project.
Change-Id: Iec864c064ce5ea04e170f24414c728684002f284
Signed-off-by: Narendra Muppalla <NarendraM@codeaurora.org>
