Graphe des révisions

333 Révisions

Auteur SHA1 Message Date
Samantha Tran
790eda032e disp: msm: drmP.h removed, add new headers
Commit ("drm: delete drmP.h + drm_os_linux.h") removes the
drmP header file. This changes updates the msm driver
by adding the individually required header files.

Change-Id: I360aa028c2ce75317d33da988b36164041177014
Signed-off-by: Samantha Tran <samtran@codeaurora.org>
Signed-off-by: Nilaan Gunabalachandran <ngunabal@codeaurora.org>
2020-12-17 09:50:47 -05:00
Samantha Tran
0c08cb1fb5 disp: msm: update parameters for drm_bridge_attach
Commit a25b988ff83f ("drm/bridge: Extend bridge API to
disable connector creation") and commit ee68c743f8d0 ("drm: Stop
including drm_bridge.h from drm_crtc.h) add additional input flags.
This change adds fixes to the drm bridge attach API and includes
relevant drm_bridge header files.

Change-Id: I85e84eaff7df2995243896108a217fae81716b63
Signed-off-by: Samantha Tran <samtran@codeaurora.org>
Signed-off-by: Nilaan Gunabalachandran <ngunabal@codeaurora.org>
2020-12-16 17:27:46 -08:00
Samantha Tran
d2aea44026 disp: msm: dsi: drm_panel_init parameter change
Commit 6dbe0c4b0fc0 ("drm/panel: Initialise panel dev and funcs
through drm_panel_init()") and commit ba2fad4c9648 ("drm/panel:
Add and fill drm_panel type field") modify input parameters for
drm_panel_init. This change updates the relevant changes to the
dsi driver by passing in the device and panel type.

Change-Id: I76a271fea08190bd8633831442ca48882f8a97e6
Signed-off-by: Samantha Tran <samtran@codeaurora.org>
Signed-off-by: Nilaan Gunabalachandran <ngunabal@codeaurora.org>
2020-12-16 17:25:54 -08:00
Samantha Tran
16cc165833 disp: msm: obtain bridge from bridge chain
Commit 05193dc38197 ("drm/bridge: Make the bridge chain
a double-linked list") creates a bridge chain linked
list. This change updates the relevant changes to msm
driver to use the list to find the bridge associated to
the encoder.

Change-Id: I59eb2910be96f4fff7bdbeb040d6ad204c41d747
Signed-off-by: Samantha Tran <samtran@codeaurora.org>
Signed-off-by: Nilaan Gunabalachandran <ngunabal@codeaurora.org>
2020-12-16 17:24:59 -08:00
Samantha Tran
6d65c2b613 disp: msm: dsi: pass drm_display_info to mode_valid
Commit 12c683e12cd8 ("drm: bridge: Pass drm_display_info to
drm_bridge_funcs .mode_valid()") passes the drm_display_info to
mode valid. This change updates relevant changes to dsi display,
that will make it available during bridge validation.

Change-Id: I2772e9e3920de940f22341be5019213d562352ff
Signed-off-by: Samantha Tran <samtran@codeaurora.org>
Signed-off-by: Nilaan Gunabalachandran <ngunabal@codeaurora.org>
2020-12-16 17:20:28 -08:00
qctecmdr
93331df7d7 Merge "disp: msm: dsi: enable DMA cmd scheduling for video mode panels" 2020-12-11 09:49:33 -08:00
Rajeev Nandan
e60959b052 disp: msm: dsi: move backlight operations to post kickoff
This change moves the backlight update operation from
drm bridge enable to connector post kickoff.

When timing engine is enabled with programmable fetch
enabled, the timing engine will start counting from
the prog_fetch_start point (which is somewhere in VFP).
It’s a grey area from that point to the actual panel
vsync and SW should not trigger DMA command during that
time.

During display resume, sometimes the INTF timing engine
do not get enabled completely at the first vblank irq.
The backlight update cmd transfer trigger as part of the
drm bridge enable can also take place at the same time,
that may cause DSI cmd transfer failure.

Change-Id: I2722d3c23012ef0e7bcc7f728ec5658318ce4e60
Signed-off-by: Rajeev Nandan <rajeevny@codeaurora.org>
2020-12-11 12:14:54 +05:30
Rajeev Nandan
37b2f80ad4 disp: msm: dsi: enable DMA cmd scheduling for video mode panels
This change enables the DMA CMD scheduling as default for
video mode panels.

In video mode panel, if the DMA is triggered very close to
the beginning of the active window and the DMA transfer
happens in the last line of VBP, then the HW state will
stay in ‘wait’ and return to ‘idle’ in the first line of VFP.
But somewhere in the middle of the active window, if SW
disables DSI command mode engine while the HW is still
waiting and re-enable after timing engine is OFF. So the
HW never ‘sees’ another vblank line and hence it gets
stuck in the ‘wait’ state.
Scheduling the DMA cmd to the first line in VFP fixes
this issue.

Change-Id: If9e5bd1923c012f10dee50c791a2b2b001d97553
Signed-off-by: Rajeev Nandan <rajeevny@codeaurora.org>
2020-12-10 04:19:33 -08:00
qctecmdr
59a266aa8e Merge "disp: msm: dsi: Add support for 5nm C-PHY shadow clock" 2020-12-07 17:09:16 -08:00
Satya Rama Aditya Pinapala
fcb453c0b8 disp: msm: dsi: Add support for 5nm C-PHY shadow clock
Add support for 5nm DSI PLL C-PHY shadow clocks, which
will be used during dynamic dsi clock switch.

Change-Id: I55b11f2d0cffd8494d4641e9b2de0b88e7229978
Signed-off-by: Satya Rama Aditya Pinapala <psraditya30@codeaurora.org>
2020-12-05 08:33:29 -08:00
Satya Rama Aditya Pinapala
ae5b602b4f disp: msm: dsi: trigger broadcast commands using DMA start window
As per the HW requirements it is highly recommended to use DMA start
window to trigger  broadcast commands. If not used then it can
result in a hardware hang with the DSI controllers going out
of sync. This behavior is even more prominent in cases of higher
refresh rates. As part of the change we change the default DMA
scheduling behavior to default to maximum possible DMA window
in case it is not specified in the panel device tree.

Change-Id: Ied4df9063664cedbc18ce009054d4e5ecae30ab2
Signed-off-by: Satya Rama Aditya Pinapala <psraditya30@codeaurora.org>
2020-12-04 20:01:55 -08:00
qctecmdr
559b960ba7 Merge "disp: msm: read mdp intf line count and trigger dma accordingly" 2020-11-22 22:51:31 -08:00
qctecmdr
69e06f9fd7 Merge "disp: msm: dsi: avoid TE status check based on rechecks count" 2020-11-21 13:13:35 -08:00
Veera Sundaram Sankaran
db67b18a28 disp: msm: dsi: avoid TE status check based on rechecks count
The rechecks count in dsi_display_status_check_te defines the
number of times the TE status needs to be checked before exiting.
Avoid the execution if rechecks is set to zero as it would avoid
unnecessary irq status changes.

Change-Id: Ice31701ac06f5b0a82f29b5f415dcb0b055e7b16
Signed-off-by: Veera Sundaram Sankaran <veeras@codeaurora.org>
2020-11-19 12:13:18 -08:00
Harigovindan P
8dd3b42c57 disp: msm: read mdp intf line count and trigger dma accordingly
when a broadcast DSI command is scheduled, the command can get
triggered close to the schedule line. This might cause DMA
timeout. This change reads the video line count from
MDP_INTF_LINE_COUNT register and checks whether DMA trigger
happens close to the schedule line. If it is not close to the
schedule line, then DMA command transfer is triggered.

Change-Id: Ida92e63e46b4cc703d57ce24097834f810776aa8
Signed-off-by: Harigovindan P <harigovi@codeaurora.org>
2020-11-18 23:41:05 -08:00
qctecmdr
d0add46ba2 Merge "disp: msm: dsi: avoid TE-based panel status check in Trusted-vm" 2020-11-16 14:22:17 -08:00
qctecmdr
7e52459f8e Merge "disp: msm: dsi: Add support for parsing mdp_intf base address from dt" 2020-11-13 05:34:43 -08:00
Veera Sundaram Sankaran
899b201a0a disp: msm: dsi: avoid TE-based panel status check in Trusted-vm
Add check to avoid the dsi panel status check with TE
method as the GPIO support is not available in Trusted-vm.

Change-Id: I5ad6e7b77b189b5150302ab34767dfc4d97aaf61
Signed-off-by: Veera Sundaram Sankaran <veeras@codeaurora.org>
2020-11-12 23:34:22 -08:00
Veera Sundaram Sankaran
c99f3fd6ae disp: msm: dsi: enable ESD trigger through debugfs in trsuted-vm
Add support to trigger ESD through debugfs by directly
modifying the reset GPIOs TLMM register in trusted-vm as GPIO
driver support is not enabled.

Change-Id: I859affe69c13dbe115a48b0a63a600a57027db58
Signed-off-by: Veera Sundaram Sankaran <veeras@codeaurora.org>
2020-11-12 23:34:22 -08:00
Veera Sundaram Sankaran
6dd2c3cd87 disp: msm: dsi: parse & store gpio registers used by the host & panel
Parse all the GPIO pins used by the DSI host and the display panel
along with its register ranges and store it in panel struct. This
avoids parsing the device-tree everytime during transitions between
trusted and primary vm.

Change-Id: Ibbb646358c0409703afda1c4f758f044fc8c0001
Signed-off-by: Veera Sundaram Sankaran <veeras@codeaurora.org>
2020-11-12 22:27:10 -08:00
Lipsa Rout
5407bf18f3 disp: msm: dsi: Add support for parsing mdp_intf base address from dt
Currently, mdp_intf_line_count and mdp_intf_tear_line_count register
addresses are defined in dsi_ctrl_hw for debug feature. But mdp_intf
base address is target specific and independent of dsi controller
version. This change adds support for parsing the mdp intf base
address from dt, thereby remapping using base + offset addressing.

Change-Id: Ibb72dfe84a786a5c8b95f6a400e8333f6b46814a
Signed-off-by: Lipsa Rout <lrout@codeaurora.org>
2020-11-12 09:48:52 +05:30
Zhao, Yuan
0cf3838ac8 disp: msm: dsi: recount drm mode count
Drm driver will remove the same mode that defined
in dsi panel dtsi. But the mode count was not updated,
so when checked drm mode, need to recount the mode.

Change-Id: I51a2c40ceb7d4ee83a15f74d9d724b4fb9c8a618
Signed-off-by: Zhao, Yuan <yzhao@codeaurora.org>
2020-11-06 00:36:40 -08:00
Narendra Muppalla
9b133dd201 disp: msm: dsi: add dsi ramdump support without DEBUG_FS
This change adds dsi display ramdump support when DEBUG_FS
is not enabled.

Change-Id: Ic6659a9380acd5eb55a3270d3e3b7016a9cd2bd7
Signed-off-by: Narendra Muppalla <NarendraM@codeaurora.org>
2020-10-28 13:07:28 -07:00
qctecmdr
a27dce97f8 Merge "disp: msm: dsi: invoke DSI soft reset when video engine is stuck" 2020-10-22 11:28:20 -07:00
qctecmdr
2372f6e819 Merge "disp: msm: dsi: error handling during debugfs command transfer" 2020-10-22 08:18:12 -07:00
Ritesh Kumar
97dcdc695a disp: msm: dsi: invoke DSI soft reset when video engine is stuck
During ESD check failure, DSI video engine can get stuck
sending data from display engine. In use cases where GDSC
toggle does not happen like DP MST connected or secure video
playback, display does not recover back after ESD failure.
This change adds support to perform soft reset when DSI
video engine gets stuck.

Change-Id: I9cb31e6c71c4da171f9fe22fc3bee9175711831d
Signed-off-by: Ritesh Kumar <riteshk@codeaurora.org>
2020-10-22 11:48:24 +05:30
Satya Rama Aditya Pinapala
3cf46fba79 disp: msm: dsi: error handling during debugfs command transfer
Change clears the DSI TX command buffer allocated for debugfs
command transfers and destroys the command packets in case of
error during command transfer.

Change-Id: Ia1e822b9b60d44f7eba325116d416916419471fa
Signed-off-by: Satya Rama Aditya Pinapala <psraditya30@codeaurora.org>
2020-10-21 21:39:53 -07:00
Satya Rama Aditya Pinapala
bbe18a1689 disp: msm: dsi: batching multiple DSI commands using debugfs node
The change batches DSI commands sent using the debugfs node, in a
separate buffer from the TX command buffer to ensure that they are not
triggered before the last command bit is set. Once the last command
bit is set the buffer is then copied to the DSI TX buffer and triggered.

Change-Id: I9ba624e4e19341696a974994817603315c6c8a45
Signed-off-by: Satya Rama Aditya Pinapala <psraditya30@codeaurora.org>
2020-10-21 15:25:48 -07:00
Ritesh Kumar
ba3d7304f5 disp: pll: Fix cfg1 value when pclk_src_mux parent is updated
Currently, PLL_CFG1(1:0) register is updated with cached values
in dsi_pll_enable. This can create issue when UEFI and kernel
cfg1 programming is not same. To fix it, return cached value
of cfg1 when its read in pclk_mux_read, so that pclk_mux_write
is called and cached value is updated.

Change-Id: I1e45ff0685797bf4dd2e3a52af4753425f31edfc
Signed-off-by: Ritesh Kumar <riteshk@codeaurora.org>
2020-10-20 23:17:23 -07:00
qctecmdr
68f4129cc6 Merge "disp: msm: sde: add support for qsync min fps list" 2020-10-19 16:18:30 -07:00
qctecmdr
7d1acf4361 Merge "disp: msm: dsi: add support to set continuous clock through phy" 2020-10-19 16:18:30 -07:00
qctecmdr
6edad6b0ad Merge "disp: msm: dsi: Add support for secondary display using firmware approach" 2020-10-15 21:39:04 -07:00
qctecmdr
95955d984a Merge "disp: msm: dsi: Fix num of displays for firmware approach" 2020-10-15 10:08:10 -07:00
Lipsa Rout
a43ff33da8 disp: msm: dsi: Add support for secondary display using firmware approach
Currently, changing panel configuration from firmware approach is present
for single display. This change adds support for secondary display using
firmware approach.

Change-Id: I8095dceed1567d8582c7473c0ac7f59c4666a200
Signed-off-by: Lipsa Rout <lrout@codeaurora.org>
2020-10-15 18:04:32 +05:30
Raviteja Tamatam
e5ff0b8f30 disp: msm: sde: add support for qsync min fps list
In current implementation qsync min fps is single value.
It is same for all the list of supported dfps list.
Added support for new dt entry dsi-supported-qsync-min-fps-list
corresponding to the fps supported in the dfps list
dsi-supported-dfps-list.

Change-Id: Ifd5309c2f51865a3c0d9fadb65cbcd291b6ef42b
Signed-off-by: Raviteja Tamatam <travitej@codeaurora.org>
2020-10-15 12:32:25 +05:30
qctecmdr
4e1159d7c6 Merge "disp: msm: add support to have same panel names for dual display" 2020-10-14 03:17:39 -07:00
qctecmdr
484801e93c Merge "disp: msm: dsi: fix return value for alter_esd_check_mode" 2020-10-13 22:45:51 -07:00
Harigovindan P
e290135ccf disp: msm: add support to have same panel names for dual display
This change adds support to have same panel names for dual displays.
Without this change, the secondary panel bind will fail if it has the
same panel name as primary since the primary panel debugfs directory
would have been created during its display bind and when display bind
for secondary panel is initiated with the same name it will try to
create a debugfs directory with the same name resulting in bind failure.
This change appends a string as secondary in the panel name and creates the
debugfs directory.

Change-Id: I2bd25672ce0105a3b8225bbf17e13d4e373ad10b
Signed-off-by: Harigovindan P <harigovi@codeaurora.org>
2020-10-13 22:20:45 -07:00
Lipsa Rout
298cb1459b disp: msm: dsi: Fix num of displays for firmware approach
Currently, in firmware approach, the panel node is null
for secondary display. As a result, the number of display
remains one, in case of dual display also. This change
updates the number of displays.

Change-Id: I4b945b8b94d931e0dedf7ca7b27cb1a288b9d6ab
Signed-off-by: Lipsa Rout <lrout@codeaurora.org>
2020-10-12 23:37:21 -07:00
Ritesh Kumar
ee90425ea7 disp: msm: dsi: add support to set continuous clock through phy
For phy ver 4.0 chipsets, configure DSI controller and DSI PHY to
force clk lane to HS mode always. This change was missed while
propagating from 4.19 to 5.4.

Change-Id: I60370034f7b9ed5d036d9d22f0807250afbcbcd5
Signed-off-by: Ritesh Kumar <riteshk@codeaurora.org>
2020-10-10 16:33:32 +05:30
Ritesh Kumar
4a82bfb9c7 Revert "disp: msm: dsi: Panic on getting continuous ESD check failures"
This reverts commit 93fa9bdf60.

Change-Id: Ia29c690202d53207377fad9117199d9c024a33cf
Signed-off-by: Ritesh Kumar <riteshk@codeaurora.org>
2020-10-08 21:50:15 -07:00
qctecmdr
48aedc81e0 Merge "disp: msm: dsi: decrease log level of messages during modeset" 2020-10-02 14:14:01 -07:00
Satya Rama Aditya Pinapala
3617217ecf disp: msm: dsi: decrease log level of messages during modeset
Change decreases logs during a mode set in dsi_display and adds the
info to event logs.

Change-Id: I3bbe328f942008004c15b39230dd8be3e4cb64b5
Signed-off-by: Satya Rama Aditya Pinapala <psraditya30@codeaurora.org>
2020-10-02 01:33:33 -07:00
qctecmdr
d2aca007bb Merge "disp: msm: dsi: update DSI CPHY enable sequence" 2020-10-01 00:36:12 -07:00
qctecmdr
1916b3ae6c Merge "disp: msm: dsi: fix ESD checks for sim and vid panel modes" 2020-10-01 00:36:12 -07:00
Satya Rama Aditya Pinapala
ca818526c3 disp: msm: dsi: fix return value for alter_esd_check_mode
The file operation write expects a non zero return value for a
successful exit from the file op.

Change-Id: I5e956333f39c33708ba24e2722713484c613f0ee
Signed-off-by: Satya Rama Aditya Pinapala <psraditya30@codeaurora.org>
2020-09-30 10:38:50 -07:00
Satya Rama Aditya Pinapala
cfa1f49125 disp: msm: dsi: fix ESD checks for sim and vid panel modes
Enure that ESD check doesn't result in a false negative while
booting up with a simulation panel or if TE based check is enabled
and panel switches it operating mode to video.

Change-Id: I62ff088f513d28d2883ce5a6d22f8bac1783fcd2
Signed-off-by: Satya Rama Aditya Pinapala <psraditya30@codeaurora.org>
2020-09-29 21:13:39 -07:00
Satya Rama Aditya Pinapala
a84ce9e4f7 disp: msm: dsi: update DSI CPHY enable sequence
Update the DSI CPHY enable sequence as per latest HW recommendation.

Change-Id: Ibb8e9a70e9ea0ebc3d054e5e376beefbde416aef
Signed-off-by: Satya Rama Aditya Pinapala <psraditya30@codeaurora.org>
2020-09-29 13:41:14 -07:00
qctecmdr
90c3cec488 Merge "disp: msm: dsi: Panic on getting continuous ESD check failures" 2020-09-29 09:59:58 -07:00
Lipsa Rout
93fa9bdf60 disp: msm: dsi: Panic on getting continuous ESD check failures
During stability stress testing, there are many instances where
the panel is unreachable which results in the ESD check mechanism
failing continuously with PANEL_DEAD events. There are two possible
reasons. Either the device is bad or DSI controller is hung. As of
today, logs/xlog is flooded and info on root cause is missed in the
logs. To catch the root cause for such issues, this patch induces
forced crash when there are five consecutive ESD check failures.

Change-Id: Id0a5762ac977f8a209af651f65cbe9da199cb8d0
Signed-off-by: Lipsa Rout <lrout@codeaurora.org>
2020-09-24 22:51:39 +05:30