Commit Graph

43 Commits

Author SHA1 Message Date
Steve Cohen
8487925f2c disp: msm: sde: remove unused output parameter in _get_tearcheck_threshold
Remove the output parameter "extra_frame_trigger_time" from this
function as callers are not using it, so it is not needed.

Change-Id: I98fcfe974c64da9ce62456a693330b898707e6b4
Signed-off-by: Steve Cohen <cohens@codeaurora.org>
2020-06-28 21:31:21 -07:00
Steve Cohen
36bf90e02f disp: msm: sde: adjust qsync linecount calculation
Adjust the QSYNC line count calculation to compensate for the
idle time, when no transfers are actively taking place.

Change-Id: If91eab25321eea6e6880f07605c5a9c1b7b7ee05
Signed-off-by: Steve Cohen <cohens@codeaurora.org>
2020-06-28 21:31:15 -07:00
qctecmdr
b299a0f04c Merge "disp: msm: sde: manage vblank refcount concurrency" 2020-06-28 04:32:57 -07:00
Dhaval Patel
44cde01fc7 disp: msm: sde: manage vblank refcount concurrency
Vblank refcount can reach out of sync with below case
 1. event_thread triggers the vblank_enable
 2. commit_thread triggers the modeset
   2.a modeset resets the vblank refcount with mode_set
 3. event_thread triggers the vblank_disable

Event 2.a resets the vblank refcount and vblank disable
request after 2.a is going to fail. This can be fixed
by avoiding concurrency between mode_set call and vblank
request.

Change-Id: Ibb810ec90e81d63feee443f1c37dd736d5cfac0d
Signed-off-by: Dhaval Patel <pdhaval@codeaurora.org>
2020-06-25 13:54:21 -07:00
Jeykumar Sankaran
06ab29478d disp: msm: sde: avoid physical encoder disable(s) in trusted VM
VM switches during TUI usecase are expected to be seamless i.e without
display reset. In SDE language, this translates to respective display
drivers not tearing down the HW pipeline while releasing the HW.

In Primary VM, this taken care by keeping the DRM pipeline alive when
TUI is active.

In Trusted VM, since the client creates and destroys the display per
session, checks are needed to bypass the physical encoder disable(s).

Change-Id: Iac42f02806962405c9364b1ffed85778229977e9
Signed-off-by: Jeykumar Sankaran <jsanka@codeaurora.org>
2020-06-19 17:46:43 -07:00
Narendra Muppalla
5a1af16b1a disp: msm: fix kw issues in sde driver
This change addresses out of range and null checks in
sde driver.

Change-Id: I4ee82760ce3ee7053c336e49ec9eaae8b4c31b1e
Signed-off-by: Narendra Muppalla <NarendraM@codeaurora.org>
2020-06-05 10:48:46 -07:00
Steve Cohen
d26bf3c6fd disp: msm: sde: move HW recovery outside ppdone wait
With posted start enabled SW no longer waits for ppdone events
unless more than one frame is in queue. HW recovery logic relied
on these waits to know when we recover from a timeout. This
change moves the HW recovery SUCCESS event signalling outside of
the wait to ensure this event is sent to user-space regardless
of the status of posted start.

Change-Id: I8896e8126284b415513499723ccf0155ee8bc6a7
Signed-off-by: Steve Cohen <cohens@codeaurora.org>
2020-05-04 19:48:51 -07:00
Narendra Muppalla
d07ef2efe0 disp: msm: fix kw issues in sde and dp driver
This change addresses out of range and null checks in
sde and dp driver.

Change-Id: I142196d7394f0bf0abab1bfa89abfd784a5521c8
Signed-off-by: Narendra Muppalla <NarendraM@codeaurora.org>
2020-04-24 16:01:02 -07:00
Rajkumar Subbiah
c0d4857a81 disp: msm: sde: adjust intf timing for widebus
From Lahaina onwards, widebus is enabled for compressed DSI stream.
This change adjusts interface timing parameters to account for widebus.

Change-Id: Ie6b739ed2cdb515064e3a94404b3e0fe07755d7e
Signed-off-by: Rajkumar Subbiah <rsubbia@codeaurora.org>
2020-04-09 14:14:55 -04:00
Dhaval Patel
e7123aec1c disp: msm: sde: update autorefresh disable seq-2
Update autorefresh disable sequence-2 by avoiding
tearcheck enable configuration. Updated sequence
will trigger the frame by resetting the write
line count with tearcheck start position.

Change-Id: I984251c0cb23475f20cd5ea62122a167324d6670
Signed-off-by: Dhaval Patel <pdhaval@codeaurora.org>
2020-03-29 19:24:54 -07:00
Dhaval Patel
1a9e3bae54 disp: msm: sde: update autorefresh disable sequence
Autorefresh might be still in enabled state after
write_ptr reached to display height. This patch
checks the autorefresh status bit and keeps polling
the bit till autorefresh sequence is in enabled
state. It times out after 1 second if autorefresh
is still in enabled state.

Change-Id: I5d4f4cb35e5cc8c680c1878f52cee385f709d764
Signed-off-by: Dhaval Patel <pdhaval@codeaurora.org>
2020-03-29 19:24:42 -07:00
Samantha Tran
0064a0227b drm/msm/sde: fix race condition in vblank control interrupts
In Dual display concurrencies there are certain cases where
irq_idx and vblank_refcount state mismatch can occur.
To avoid it, during setup of irq_hw_idx, reset the vblank_refcount
and unregister read ptr irq if not yet done by then along with
maintaining global mutex lock for vblank_refcount.
Also, if register IRQ fails, correct vblank_refcount so
that IRQ registration can be tried again.

Change-Id: I06bcbf71c6a43bd161ff61093d9f6063a292d6bc
Signed-off-by: Raviteja Tamatam <travitej@codeaurora.org>
Signed-off-by: Samantha Tran <samtran@codeaurora.org>
2020-03-29 16:54:43 -07:00
Ray Zhang
782d4feb24 disp: msm: sde: Initialize wr_ptr_wait_success after kickoff
wr_ptr_wait_success is true only if wr_ptr interrupt arrives, so
initialize it after display kickoff.

Change-Id: I5790d9dac25352898ece160f6b258b50ca2edefa
Signed-off-by: Ray Zhang <rayz@codeaurora.org>
2020-03-29 16:50:29 -07:00
Raviteja Tamatam
c763a14ba0 disp: msm: sde: signal retire fence in wr_ptr timeout
There can be few cases of ESD where CTL_START is cleared but
wr_ptr interrupt does not come. Signaling retire fence in these
cases to avoid freeze and dangling pending_retire_fence_cnt.

Change-Id: I167f69dce5cbe43b4771e5056d8a73bd7587e76e
Signed-off-by: Raviteja Tamatam <travitej@codeaurora.org>
2020-03-29 09:50:55 -07:00
Veera Sundaram Sankaran
bceea4e1fe disp: msm: sde: reset ctl on autorefresh disable failure
Reset MDP ctl path and DSI ctl on autorefresh
disable failure. This will enable the hardware
to recover from the hang.

Change-Id: Ia9acc8573c22e0713179ef4f6ef604caacabfadb
Signed-off-by: Veera Sundaram Sankaran <veeras@codeaurora.org>
2020-03-28 23:07:32 -07:00
Nilaan Gunabalachandran
f51424f8a7 disp: msm: sde: ctl hw flush ops clean up
Using individual flush functions for each active hw blk
is not scable-able for future use. Clean up the ops to merge
all flush functions into one and manage HW block id
with same API.

Change-Id: I62afbc51fa7d345b3a1f5721e5e09661a4215f7a
Signed-off-by: Nilaan Gunabalachandran <ngunabal@codeaurora.org>
2020-02-25 14:18:59 -05:00
Abhijit Kulkarni
7317dc417f disp: msm: sde: intf accept 64-bit compressed pixels
This change enables the interface hw block to accept
64-bit compressed pixels. This configuration is enabled based
on hw capability. For current hw, this is required any time
the compressed pixels flow through the interface block,
whereas in the previous version of DPU hw this configuration
is only required for topology using 4 way dsc merge.

Change-Id: I7bf79d035dba5084c5057022a7fa1117479e8d52
Signed-off-by: Abhijit Kulkarni <kabhijit@codeaurora.org>
2020-01-29 22:39:44 -08:00
Steve Cohen
18b3e27f49 disp: msm: sde: use device tree node to enable INTF TE capability
Set the INTF TE capability bit only on interfaces which have a non-zero
value in the device tree node qcom,sde-intf-tear-irq-off instead of
enabling it for all interfaces based only on the HW version. The HW
doesn't support TE programming for non-TE enabled interfaces, so this
patch only populates the TE ops for those which support it.

Change-Id: I00518e846dc44e1e0808a049625dc14099656e11
Signed-off-by: Steve Cohen <cohens@codeaurora.org>
2019-11-26 18:02:34 -05:00
qctecmdr
27c7bc5e5e Merge "disp: msm: sde: handle another case for lost pp-done interrupt" 2019-11-02 13:41:38 -07:00
qctecmdr
7139bedc5a Merge "disp: msm: sde: Use platform independent API for 64-bit div" 2019-11-02 06:58:12 -07:00
Veera Sundaram Sankaran
a823531c33 disp: msm: sde: handle another case for lost pp-done interrupt
Due to interrupt delays, sometimes the pp-done interrupt
for an in-between frame is lost, as with posted-start
frames are queued to the hardware before the completion
of the previous frame. Handle the lost pp-done interrupt
in the case where frame-n pp-done interrupt is missed
and frame-n+1 pp-done interrupt is processed before
frame-n+1 wr-ptr interrupt.

Change-Id: I36ec7ac494b2720fc005dab75047d2f4a5a2a699
Signed-off-by: Veera Sundaram Sankaran <veeras@codeaurora.org>
2019-11-01 10:52:39 -07:00
Ravikanth Tuniki
b0df721f2d disp: msm: sde: Use platform independent API for 64-bit div
64-bit division( operator "/") on 32-bit platforms is not supported.
Using platform independent API's here.

Change-Id: I1ec71ac120bb29b7f0bceed581b979606f81e2a5
Signed-off-by: Ravikanth Tuniki <rtunik@codeaurora.org>
2019-10-31 15:38:00 +05:30
qctecmdr
cf2991ac07 Merge "disp: msm: sde: update wr_ptr_success state post wait" 2019-10-24 21:31:57 -07:00
Jayaprakash
97f10bf143 disp: msm: sde: update wr_ptr_success state post wait
Update the wr_ptr_success state to avoid waiting for
two frames pp_done_tx_irq. It ensures frame done callback
is triggered, if IRQ's are disabled for long time by
some external entity.

Change-Id: I9ee72bd65dd7251bf8db0b6843fad02b675935bc
Signed-off-by: Jayaprakash <jmadiset@codeaurora.org>
2019-10-17 18:40:26 +05:30
Veera Sundaram Sankaran
e167ae786c disp: msm: sde: fix handling the missing pp-done interrupt cases
With posted-start, ctl scheduler status and pending-kickoff
count are checked to address the missing pp-done interrupt
cases, which can occur if the IRQs are disabled for a long
time by some entity. Currently this check is done after
the wr-ptr-irq. At this point the scheduler status may
or may not be idle, based on the frame-transfer. Move this
handling after the timeout, so the scheduler is guaranteed
to be in idle state for working use-case.

Change-Id: I3fa9ecce8139ff667c1882e286571169c543c797
Signed-off-by: Veera Sundaram Sankaran <veeras@codeaurora.org>
2019-10-15 11:31:19 -07:00
Nilaan Gunabalachandran
47b493a29a disp: msm: sde: add spinlocks to handle_frame_done call
By adding spin locks around the handle frame done, a race
condition, between the wait for idle of one frame, and the pp
done of the next frame, is mitigated.

Change-Id: I78650fc9688b22db6d314b9bed023e0ddad20dbf
Signed-off-by: Nilaan Gunabalachandran <ngunabal@codeaurora.org>
2019-10-08 11:44:03 -04:00
qctecmdr
d8e9978b94 Merge "disp: msm: sde: wait for lp2 and pm_suspend frame trigger" 2019-10-05 13:54:05 -07:00
Dhaval Patel
96d5b9646d disp: msm: sde: wait for lp2 and pm_suspend frame trigger
PM_SUSPEND API adds extra pm_runtime refcount and calls
the device driver for pm_suspend. At this point display
device may not be in power collapse state. This patch
makes sure that crtc_commit thread is idle and triggers
power collapse also.

Change-Id: Ia21d6a6b6fd32caeb9d16fa5cf998b91ef990e01
Signed-off-by: Dhaval Patel <pdhaval@codeaurora.org>
2019-10-04 09:31:09 -07:00
Veera Sundaram Sankaran
fb54f6e6e7 disp: msm: sde: switch to WD vsync on unexpected panel jitter
Switch to watchdog vsync whenever panel jitter is
identified during frame-transfer on command mode display.
This would allow the HW to finish processing the frame
with watchdog vsync source. Switch back to default vsync
source after the frame-transfer is complete. This would
help in the MDP hang issues in panels that generate TEs
with thresholds greater than the projected jitter.

Change-Id: Ic3fa78d90e7f44cb0186857716ac27e72505fd32
Signed-off-by: Veera Sundaram Sankaran <veeras@codeaurora.org>
2019-10-01 13:32:42 -07:00
Dhaval Patel
6f06e5cd6f disp: msm: sde: wait for specific pp_done instead of zero
2 Frames transfer pending is possible with posted start.
One ongoing frame and another triggered frame. Current SW
waits for pp_done interrupt if pending frame count is greater
than 1. It is possible that interrupt may be missed for ongoing
frame. In that case, SW should run pp_done wait for one by one
frame instead of two frames together. It allows encoder to
check the ctl scheduler status and trigger the frame done
event on time.

Change-Id: I4817842292d96747890ee70da8a5bdf9b56816ed
Signed-off-by: Dhaval Patel <pdhaval@codeaurora.org>
2019-08-20 21:12:52 -07:00
Veera Sundaram Sankaran
5a2dfc1e83 disp: msm: sde: fix release fence signaling in error cases
Handle release fence/frame-done error signalling for
error case like esd failure, pp_done timeout, interrupt
disable on cpu, etc. It fixes the race condition for
pending_frame count update and also triggers correct
wait function for wr_ptr wait failure.

Change-Id: Iad08f20592c97221a1626bb40e607c398a9812b6
Signed-off-by: Veera Sundaram Sankaran <veeras@codeaurora.org>
Signed-off-by: Dhaval Patel <pdhaval@codeaurora.org>
2019-08-07 18:56:47 -07:00
Satya Rama Aditya Pinapala
edef6ae040 disp: msm: dsi: snapshot of dsi from 4.14 to 4.19
This change is a snapshot of dsi files taken of 4.14
as of commit 764f7c2 (Merge remote-tracking branch
'quic/dev/msm-4.14-display' into msm-4.14)

Change-Id: I8361a844c35a4450f7800964a8da2741676fd6c7
Signed-off-by: Satya Rama Aditya Pinapala <psraditya30@codeaurora.org>
2019-07-11 12:29:10 -07:00
qctecmdr
40e4d191d3 Merge "disp: msm: sde: log intf framecount in event logs" 2019-07-02 02:26:16 -07:00
Nilaan Gunabalachandran
c6092f3e66 disp: msm: sde: log intf framecount in event logs
Log hardware interface framecount during te and vblank irqs for
command and video mode panels, respectively. This will help in
debugging any missed frames.

Change-Id: Ie86f686c4cc12de6a1f31aa47d4c7a5b8a68ea55
Signed-off-by: Nilaan Gunabalachandran <ngunabal@codeaurora.org>
2019-06-26 11:54:51 -04:00
Veera Sundaram Sankaran
6da6eb6774 disp: msm: sde: reset ctl during wr_ptr_irq timeout
wr_ptr_irq timeout signifies that the MDP is stuck
on either the current or previous frame. Handle
ctl reset and fence signalling as part of this
timeout handling. This logic would help to recover
the HW faster in case of posted-start.

Change-Id: I09b3d21772df431f9fc4a58b2fd9b4fcac4a7de7
Signed-off-by: Veera Sundaram Sankaran <veeras@codeaurora.org>
2019-06-24 15:33:56 -07:00
Veera Sundaram Sankaran
b8b095b57d disp: msm: sde: avoid multiple frame-done encoder events
Currently there is a race condition in checking the
pending_kickoff_cnt in wr_ptr_irq wait from display-thread
and pp_done_irq from interrupt context. In both places,
pending_kickoff_cnt is read first and modified later. In
partial update cases where the frame-transfer is short,
such a race condition might happen and would lead to both
triggering the frame-done/release fence for the same frame.
Fix it by combining read/modify to one statement in both places.

Change-Id: I9162e7dc3f12af3590514f1ebfd68023aa920181
Signed-off-by: Veera Sundaram Sankaran <veeras@codeaurora.org>
2019-05-30 15:24:54 -07:00
Veera Sundaram Sankaran
6daf1c58e7 disp: msm: sde: use wr_ptr interrupt instead of ctl_start
SDE driver triggers the frame and waits for the
ctl_start interrupt for command mode display. This interrupt
provides confirmation that hardware has picked up the
frame. Retire fence signaling is associated with
this interrupt and it is sent at the rd_ptr interrupt
after ctl_start. Due to lut dma delay, ctl_start interrupt
may be trigger before rd_ptr or after rd_ptr. SW manages
this complexity and handle retire fence for different cases
with 500us threshold logic.

This change replaces the ctl_start interrupt with wr_ptr
interrupt by programming it to trigger at 1st write line
count. This is guaranteed to come every time and it is close
to rd_ptr interrupt. That allows retire fence trigger at
wr_ptr interrupt and simplifies the SW logic. CRTC commit
thread would be held slightly longer with this change
as the wr_ptr is always close to rd_ptr and after
ctl_start.

Change-Id: Ic47a8f82c854b4aded0d70c95af853b28a68ffd6
Signed-off-by: Veera Sundaram Sankaran <veeras@codeaurora.org>
2019-05-23 10:29:30 -07:00
Samantha Tran
3be27eafcc disp: msm: snapshot of msm and sde driver
This snapshot ports changes from 4.14 to 4.19 into
the msm and sde layer. Snapshot was taken as of
commit 0f8fb25421ff ("cnss2: Add device version to
SOC info structure").

Change-Id: I59b799a78319c2db6930a2a10bc38976f8c09898
Signed-off-by: Samantha Tran <samtran@codeaurora.org>
2019-05-22 13:08:31 -07:00
qctecmdr
3f35432626 Merge "disp: msm: avoid vbif and wb register dumps in secure mode" 2019-05-21 01:20:03 -07:00
Veera Sundaram Sankaran
1e3d105dc0 disp: msm: sde: log pp-line count in event logs
Log ping-pong current line count during ctl-start
and rd-ptr interrupt. This will help in debugging
ping-pong timeout issues.

Change-Id: I58185330fe9e8a64f48d6da60c974b23a9e68b44
Signed-off-by: Veera Sundaram Sankaran <veeras@codeaurora.org>
2019-05-15 15:36:06 -07:00
Veera Sundaram Sankaran
bbd12dee59 disp: msm: avoid vbif and wb register dumps in secure mode
VBIF and WB register HLOS access is revoked during
secure-display session. Dumping those registers at
ping pong done timeout causes access violation.
Hence avoid vbif and wb register space dumping in secure mode.

Change-Id: I5d327178e9f6232257b3d2fbfef8ca7ef78db2e1
Signed-off-by: Lakshmi Narayana Kalavala <lkalaval@codeaurora.org>
Signed-off-by: Veera Sundaram Sankaran <veeras@codeaurora.org>
2019-05-13 15:22:41 -07:00
Dhaval Patel
0a6213522e disp: msm: sde: get ctl scheduler status at each vsync
Get controller scheduler status at each vsync to verify
pending frame status.

Change-Id: I01401a57b68828294299977a7be7e796d07c7472
Signed-off-by: Dhaval Patel <pdhaval@codeaurora.org>
2019-04-24 13:21:58 -07:00
Narendra Muppalla
3709853456 Display drivers kernel project initial snapshot
This change brings msm display driver including sde,
dp, dsi, rotator, dsi pll and dp pll from base 4.19 kernel
project. It is first source code snapshot from base kernel project.

Change-Id: Iec864c064ce5ea04e170f24414c728684002f284
Signed-off-by: Narendra Muppalla <NarendraM@codeaurora.org>
2019-04-14 22:20:59 -07:00