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230 Commit

Autore SHA1 Messaggio Data
Abhijit Kulkarni
acb8d98e66 disp: msm: use upstream dsc config data
This change enforces dp, dsi and the sde drivers to use the
drm framework defined dsc_config data structure. As a part of this,
it introduces the sde_dsc_helper API to configure the dsc params
and creating a PPS command. Earlier each driver implemented it's
private versions leading to duplication of code. Additionaly the
helper api supports DSC spec 1.2 422 and 420 mode.

Change-Id: I25933fab08cdabbc6787079926885d1a78945e97
Signed-off-by: Abhijit Kulkarni <kabhijit@codeaurora.org>
2020-01-22 12:33:24 -08:00
Satya Rama Aditya Pinapala
649c6b973d disp: msm: dsi: update DSI command buffer for MSM
This change takes care of swapping the byte order in
the packet header to work with MSM hardware.

Change-Id: I38b92a277aa4677d53e263ce343721b8f2b48497
Signed-off-by: Satya Rama Aditya Pinapala <psraditya30@codeaurora.org>
2020-01-20 17:47:04 -08:00
Steve Cohen
8469b7be9e disp: msm: use iterator APIs to walk the connector list
Use the DRM APIs for walking the list of connectors. This ensures
the proper locks are taken to prevent possible corruption by other
threads.

Change-Id: Iacdd1c6ad8eab224ceac550e0229489851a09706
Signed-off-by: Steve Cohen <cohens@codeaurora.org>
2020-01-17 18:21:38 -05:00
Satya Rama Aditya Pinapala
5694bc2eee disp: msm: dsi: move dsi pll as subnode to dsi PHY
DSI PLL is tightly coupled with DSI PHY. This change removes
separate DSI pll driver and makes DSI pll as a subnode to DSI
PHY which is an accurate way of representation. In addition, this
change adds support for 5nm DSI ctrl and PHY revisions and adds
DSI pll support for 5nm. Remove support for older DSI pll revisions
such as 7nm, 10nm, 14nm, 20nm, 28nm.

Change-Id: Ic8b886a9fe24b906e4ec5130720600efa1e59b68
Signed-off-by: Satya Rama Aditya Pinapala <psraditya30@codeaurora.org>
2020-01-10 17:06:58 -08:00
Linux Build Service Account
8e2dde8420 Merge changes If37ec780,Ia691c95d into display-kernel.lnx.1.0
* changes:
  disp: msm: sde: remove sde wrapper for clock set flags
  Disp: Snapshot change for lahaina display driver
2019-12-04 17:27:51 -08:00
Yuan Zhao
cc564849ae disp: msm: dsi: remove dsi bus scaling setting
DSI driver did not use msm bus scaling setting,
remove the code.

Change-Id: I71675c8f4e3e97f1ded72ecac3fa87bdc7fb3774
Signed-off-by: Yuan Zhao <yzhao@codeaurora.org>
2019-12-03 18:46:45 -08:00
Narendra Muppalla
d1d9ae8b19 Disp: Snapshot change for lahaina display driver
This snapshot change adds downstream support
for drm 5.x+(msm_lahaina branch) linux kernel.

Change-Id: Ia691c95da155a00e449c91a2f1a5b20a8e71aed4
Signed-off-by: Narendra Muppalla <NarendraM@codeaurora.org>
2019-11-24 12:30:51 -08:00
qctecmdr
d34c5f2215 Merge "disp: msm: add check for buffer length before copy" 2019-11-01 12:09:12 -07:00
Satya Rama Aditya Pinapala
c404a2f158 disp: msm: dsi: check bit clock before bypassing clock set during DMS
This change ensures that if the dsi clock rate is not specified
in the timing modes, setting clkrate_change_pending is not bypassed.

Change-Id: I2475da1e548f29c68a6a4466c5ef540f7f11d553
Signed-off-by: Satya Rama Aditya Pinapala <psraditya30@codeaurora.org>
2019-10-30 11:01:23 -07:00
Satya Rama Aditya Pinapala
8bc240b71d disp: msm: dsi: handle wait for dma cmd completion
The current solution triggers the DMA command and waits till
the command dma done and ISR signals completion. This change
introduces asynchronous wait after a DCS command has been
triggered. Enable this mode only during pre kickoff, so as to not
block commit thread.

Change-Id: Iead7b6328883e844147d47ff68dc878943879553
Signed-off-by: Satya Rama Aditya Pinapala <psraditya30@codeaurora.org>
2019-10-29 18:40:25 -07:00
qctecmdr
21f22b1fc8 Merge "disp: msm: dsi: Config panel test pin to input mode when panel off" 2019-10-29 12:06:39 -07:00
qctecmdr
c096bfcf2a Merge "disp: msm: sde: Fix 32-bit compilation issues" 2019-10-29 10:03:27 -07:00
qctecmdr
3fcfb0fdbb Merge "disp: msm: dsi: reject seamless commit with active changed" 2019-10-29 07:27:03 -07:00
Yuan Zhao
6ed9f4a3d3 disp: msm: dsi: Config panel test pin to input mode when panel off
The pin was configured to input mode when panel on. But
if continuous splash was on, driver will not power on panel
when booting up, the first time panel off, this gpio was
the default mode or the UEFI config mode.

Change-Id: Ib352343848ab38cab828cc10388b366aeac8905d
Signed-off-by: Yuan Zhao <yzhao@codeaurora.org>
2019-10-29 00:23:30 -07:00
qctecmdr
ee16fbb03f Merge "disp: msm: sde: update avr mode config during commit prepare" 2019-10-24 21:31:57 -07:00
Ravikanth Tuniki
1e60728ab8 disp: msm: sde: Fix 32-bit compilation issues
1.Typecast to avoid distinct pointer type comparison
2.Keep DMA mask aligned with api definition.
3.Add Suffix for literals
4.Remove multfrac func to avoid uncompatible division.
5.64-bit division( operator "/") on 32-bit platforms is not supported.
  Using platform independent API's here

Change-Id: I0e7305418e53876bd1adf00c1963f85cbdf980cc
Signed-off-by: Ravikanth Tuniki <rtunik@codeaurora.org>
2019-10-24 14:48:40 +05:30
Jayaprakash
4f3de7c548 disp: msm: dsi: reject seamless commit with active changed
Reject composition if any seamless transition such as
VRR, dynclk is requested during power on/off commits.

Change-Id: I731bfc06b3bd1e7ae920c12cbc68f95f5cc01687
Signed-off-by: Kalyan Thota <kalyant@codeaurora.org>
Signed-off-by: Jayaprakash <jmadiset@codeaurora.org>
2019-10-24 12:37:45 +05:30
Satya Rama Aditya Pinapala
be08b4e451 disp: msm: add check for buffer length before copy
Length of the buffer to be copied is checked
against both source and destination buffer lengths
before copying. This ensures that there is  no
buffer overflow while reading as well as writing.

Change-Id: I4bd1a5892b47771aef4c23a4d1594fc1c8361577
Signed-off-by: Satya Rama Aditya Pinapala <psraditya30@codeaurora.org>
2019-10-21 17:06:59 -07:00
Vara Reddy
03af5b7083 drm/msm/dsi: bypass dsi clock set during changing mode
Bypass setting clkrate_change_pending flag if the current mode
and the mode to be set has the same preferred clock rate.

Change-Id: Id1f6c45e822492427cf3555beeaa5f0e7ea3243c
Signed-off-by: Vara Reddy <varar@codeaurora.org>
2019-10-21 11:07:17 -07:00
qctecmdr
ca2fbfd531 Merge "disp: msm: dsi: commit DSI PHY timings after update" 2019-10-20 01:37:41 -07:00
qctecmdr
0f4eb17208 Merge "drm/msm/dsi: fix panel physical dimensions updated to connector" 2019-10-19 01:51:16 -07:00
Satya Rama Aditya Pinapala
f372981434 disp: msm: dsi: commit DSI PHY timings after update
DSI PHY timings must be committed every time the values
are updated after a dynamic mode switch.

Change-Id: Id605c76dfe75ec41ceb89000f24baccda189e82f
Signed-off-by: Satya Rama Aditya Pinapala <psraditya30@codeaurora.org>
2019-10-18 14:00:05 -07:00
Vara Reddy
7e86c13d25 drm/msm/dsi: allocate current mode memory early for DMS
There can be a scenario where dynamic mode set can come
for first commit also, allocate memory for current mode
before checking for DMS.

Change-Id: Ief856a372629112380f199bc336160b3fa278eef
Signed-off-by: Vara Reddy <varar@codeaurora.org>
2019-10-18 13:49:45 -07:00
Vara Reddy
45ad6294fe drm/msm/dsi: fix panel physical dimensions updated to connector
Change overrides the panel physical dimensions with correct
value upto a precision of millimeter, which was getting
truncated to centimeter as drm structures maintain it in
centimeters.

Change-Id: I035357596ed42154b657b791846aee6f940f2e53
Signed-off-by: Vara Reddy <varar@codeaurora.org>
2019-10-18 13:49:41 -07:00
Jayaprakash
aad3dd4525 disp: msm: sde: update avr mode config during commit prepare
Add changes to support avr mode config update during
prepare commit which happens before gpu fence wait
for the input buffers.

Change-Id: Ib2cb5b7e1f10501914c003f6cf066b85048f79d4
Signed-off-by: Kalyan Thota <kalyant@codeaurora.org>
Signed-off-by: Jayaprakash <jmadiset@codeaurora.org>
2019-10-18 12:53:56 +05:30
Jayaprakash
985ffddc71 disp: msm: sde: add one-shot qsync mode support
Add support to enable one-shot mode during qsync
update. This feature ensures the frame drops can be
reduced due to delayed software flush for the
current commit. Also, add changes to disable the qsync
feature post commit.

Change-Id: Icb158853f52284bcf8fa641e5f62200c5460b660
Signed-off-by: Kalyan Thota <kalyant@codeaurora.org>
Signed-off-by: Jayaprakash <jmadiset@codeaurora.org>
2019-10-18 12:53:17 +05:30
Jayaprakash
ad40a300a1 disp: msm: sde: allow qsync support along with VRR
Allow Qsync and VRR features to be supported independently
by display driver. Restrict the feature availability in
same composition cycle.

Change-Id: I696eb72a2b4f9451e142ffdc5acccc8987c36b6d
Signed-off-by: Kalyan Thota <kalyant@codeaurora.org>
Signed-off-by: Jayaprakash <jmadiset@codeaurora.org>
2019-10-17 17:07:33 +05:30
qctecmdr
4fbdc64598 Merge "drm/msm/dsi: add flag for mode switch with fps" 2019-10-16 07:19:40 -07:00
qctecmdr
0a9855fc8f Merge "drm/msm/dsi-staging: use usleep_range instead of msleep in dsi enable" 2019-10-15 11:35:53 -07:00
Vara Reddy
6a574a6e3c drm/msm/dsi: add flag for mode switch with fps
Change adds flag to identify dynamic mode switch with same
resolution and different fps. Block sending PPS command
if we hit this scenario, this optimizes mode switch time.

Change-Id: If5c86084cde641952fe294b512e937cfd1bb5479
Signed-off-by: Vara Reddy <varar@codeaurora.org>
2019-10-14 11:13:41 -07:00
Vara Reddy
b712eb76c9 drm/msm/dsi-staging: update mdp transfer time preference
With this change, mdp transfer time updated to userspace
will be the preferred dtsi entry, when both dsi clock
and mdp transfer time nodes are set.

Change-Id: I37cd55e3d6f3f0f78f4ca4bddf921f6cf743c1b9
Signed-off-by: Vara Reddy <varar@codeaurora.org>
2019-10-01 11:31:30 -07:00
qctecmdr
f96023f963 Merge "disp: msm: dsi: Set OLED reugalor mode when exit LP1" 2019-09-26 06:35:28 -07:00
qctecmdr
8dab90d54d Merge "disp: msm: config AB/IBB power when AOD mode enter/exit" 2019-09-26 04:35:18 -07:00
qctecmdr
ccffe7be5f Merge "disp: msm: Set the dsi panel type" 2019-09-26 02:22:44 -07:00
qctecmdr
19e23cd72e Merge "disp: msm: only set nolp command when panel in LP1/LP2 mode" 2019-09-26 00:23:18 -07:00
Samantha Tran
70a1445d18 disp: msm: dsi: add null check for panel and proper ctrl iteration
This change moves the panel null check to the beginning of the function
so panel can be used throughout the function. This change also replaces
looping through display ctrls with proper display_for_each_ctrl.

Change-Id: I0014ee7ad6d8514734f9233a1abb314e60d29b5f
Signed-off-by: Samantha Tran <samtran@codeaurora.org>
2019-09-24 12:56:50 -07:00
Vara Reddy
4534e1912d drm/msm/dsi-staging: use usleep_range instead of msleep in dsi enable
Use usleep_range api instead of msleep in dsi enable path to
improve accuracy, which improves bootup time.

Change-Id: I5d00d666bfacddea58b824267eb0eb39b5b2641c
Signed-off-by: Vara Reddy <varar@codeaurora.org>
2019-09-24 11:51:57 -07:00
Yuan Zhao
3b554d4fba disp: msm: dsi: Set OLED reugalor mode when exit LP1
When panel exits LP1, need to set OLED power mode.

Change-Id: I045777a0dce941e45b71bc74c7b2908b24df3396
Signed-off-by: Yuan Zhao <yzhao@codeaurora.org>
2019-09-24 01:26:36 -07:00
Yuan Zhao
2da9889075 disp: msm: config AB/IBB power when AOD mode enter/exit
ELVDD/ELVSS has a dip during AMODE panel AOD exit hand-off.
According to PMIC team's suggestion, need to config the AB/IBB power
to REGULATOR_MODE_IDLE/REGULATOR_MODE_NORMAL to fix dips.

Change-Id: Ia5cbd4d698de262e02a660f670865c03dda1e04a
Signed-off-by: Wenjun Zhang <wjzhan@codeaurora.org>
Signed-off-by: Yuan Zhao <yzhao@codeaurora.org>
2019-09-24 01:26:31 -07:00
Yuan Zhao
bb2f60b35c disp: msm: Set the dsi panel type
Parse the DTS panel type settings. Consider the default
panel physical type as LCD. We need to set OLED in DTS if
the panel is an OLED type.

Change-Id: Ib53651ab3861e75bf061f38d60a2f6135c1f537d
Signed-off-by: Wenjun Zhang <wjzhan@codeaurora.org>
Signed-off-by: Yuan Zhao <yzhao@codeaurora.org>
2019-09-24 01:26:23 -07:00
Yuan Zhao
f2873cd69f disp: msm: only set nolp command when panel in LP1/LP2 mode
DSI driver sends nolp commands when DSI connector power
modes is set SDE_MODE_DPMS_ON or SDE_MODE_DPMS_OFF. This
is invalid panel configuration. It should only send nolp
commmand to panel when it is in LP1/LP2 mode.

Change-Id: Ie94eaef6899d292fd20f42c1b7ef2c7a99178d13
Signed-off-by: Wenjun Zhang <wjzhan@codeaurora.org>
Signed-off-by: Yuan Zhao <yzhao@codeaurora.org>
2019-09-24 01:23:41 -07:00
qctecmdr
8a9b4f9b81 Merge "drm/msm/dsi-staging: update dsi debug bus error message" 2019-09-19 09:05:22 -07:00
qctecmdr
690701d8c0 Merge "disp: msm: dsi: refine the logic for mode filling and calculation" 2019-09-18 19:21:04 -07:00
Lei Chen
e4fc324197 disp: msm: dsi: refine the logic for mode filling and calculation
Video and command mode will be included in same timing node
when POMS is enabled, but DFPS is only applicable for video
mode, so add this change to differentiate panel mode, and fill
display mode according to panel mode.

Change-Id: I6aa0f8572f23f0612684ed7cdf406b20ab3df822
Signed-off-by: Lei Chen <chenlei@codeaurora.org>
2019-09-12 11:30:36 +08:00
qctecmdr
6795628a68 Merge "disp: msm: dsi: enable multi mode support for video mode panel" 2019-09-11 16:07:01 -07:00
Vara Reddy
ddd2b4fe12 drm/msm/dsi-staging: update dsi debug bus error message
Change lowers the log level of the debug bus dump to info.

Change-Id: I129f9f2e611428dc392d7888df43870beddac307
Signed-off-by: Vara Reddy <varar@codeaurora.org>
2019-09-11 14:33:58 -07:00
qctecmdr
5dab5f4592 Merge "drm:msm:dsi: Add check for max controller count" 2019-09-10 09:21:21 -07:00
Lei Chen
6c75ae324d disp: msm: dsi: enable multi mode support for video mode panel
Multi-panel can't be supported by video panel, but multi panel
operating mode can be supported for video mode panel, so enable
multi-mode support for video mode panel for panel operating mode
switch.

Change-Id: I9a62ba0c880d13c7201235b9cb65728fa13e3232
Signed-off-by: Lei Chen <chenlei@codeaurora.org>
2019-09-09 02:50:28 -07:00
Lei Chen
4e679c086d disp: msm: dsi: Enable ESD check after POMS done
ESD check is disabled while switching panel operating mode.
This change enables ESD check after panel operating
mode switch is done.

Change-Id: I421d70d9be4c14107a7b51470801157d28874ffb
Signed-off-by: Lei Chen <chenlei@codeaurora.org>
2019-09-04 15:18:27 +08:00
Vishnuvardhan Prodduturi
ea1176e4f8 drm:msm:dsi: Add check for max controller count
Add check for max controller count while iterating through
display ctrl structure to avoid out of bounds access.

Change-Id: If4d32c648e7d34591726286226600a92a357479a
Signed-off-by: Vishnuvardhan Prodduturi <vproddut@codeaurora.org>
2019-08-16 18:35:07 +05:30