For each DBR ring, add debugfs entry to dump at real-time the ring
parameters like head, tail index, the timestamps at which a buffer is
received and replenished. Issues that are specific to tail index
movement from the target can be identified with this debugfs entry.
CRs-Fixed: 2466514
Change-Id: Iafbc61726264464212cb783a1cce46e16b8a48ff
It required to support multiple srng per module in direct buffer rx
component.So extend the array "dbr_mod_param" in dbr pdev object and
let it to support two more srngs per module.
Change-Id: Ia2c649dacc3787cdc13b06f0b22c1c175fb451cc
CRs-Fixed: 2523365
CFR requires to configure the number of DBRs that can be packed
in a single DBR event. Currently, this is fixed value.
Make this configurable at the time of registration.
CRs-Fixed: 2415489
Change-Id: Ifcd606641f986a5345f8ccb361c3f45db07fdc37
CFR needs to correlate data received from direct dma ring and WMI event
for tx completion. These two events can come in any order. To facilitate
correlation CFR module has to hold on to the buffer until both events
are received and then replenish buffer back to direct dma ring. To
facilitate this requirement direct rx buf module is modified to change
callback return to bool to indicate whether buffer can be replenished
immediatley or not. Also add API to indiciate buffer release/replenish
later.
Change-Id: I848c0e7cf0118156fff7cf37ac9027cdf8e2e416
CRs-Fixed: 2403395
In the existing converged component, WMI TLV APIs are implemented in
a generic manner without proper featurization. All the APIs exposed
outside of WMI are implemented in wmi_unified_api.c and all the APIs
forming the CMD or extracting the EVT is implemented in wmi_unified_tlv.c.
Since WIN and MCL have a unified WMI layer in the converged component and
there are features within WIN and MCL that are not common, there exists a
good number of WMI APIs which are specific to WIN but compiled by MCL and
vice-versa. Due to this inadvertent problem, there is a chunk of code and
memory used up by WIN and MCL for features that are not used in their
products.
Featurize WMI APIs and TLVs that are specific to WIN
- Air Time Fareness (ATF)
- Direct Buffer Rx (DBR)
- Smart Antenna (SMART_ANT)
- Generic WIN specific WMI (AP)
Change-Id: I7b27c8993da04c9e9651a9682de370daaa40d187
CRs-Fixed: 2320273
Add per module logging macros without function/line info
to avoid adding function/line info where it is not required.
Change-Id: I34ba6f6485f9b506264daf4e116052d2858bed40
CRs-Fixed: 2278876
Map all enter/exit log macros to enter/exit QDF TRACE macro
to provide option to compile out enter/exit logs if required
Change-Id: I913ef0fb2486fde6b2ec4dfe8465884ca4d66ce4
CRs-Fixed: 2274857
Map all module level log APIs to per-level log APIs
to compile out specific log level if required.
Change-Id: I4072b6740cb43200fd95c40943b66e1d5f8f1847
CRs-Fixed: 2266719
Direct buffer rx framework is cleaned up to have the following
changes -
1. Init and deinit during target interface open and close to avoid
multiple inits and deinits in case of multi-SOC chipsets
2. Register WMI events required for the framework through PSOC
enable and disable
3. Rename API that attaches hal soc and osdev objects to psoc object
4. Module ID numbering starts from 0. Modify usage to adhere to it
5. Add API to get LMAC IF tx ops from psoc
Change-Id: Ieceeb6c0e1a89c32f23b9c252e74671cd5c4a69b
CRs-Fixed: 2167614
Direct Buffer Receive provides the driver with a mechanism by which
target can transfer information directly into host memory via DMA.
In the Direct DMA mechanism, target will transfer information directly
into host memory via DMA. Host will allocate DMA target buffers and
place their addresses in one or more rings (circular buffers) to be
read by the target. Host will determine the features that will be
utilizing the Direct DMA service through the service bitmap obtained
from the target through service available event. Host will also
determine the Direct DMA capabilities such as the minimum number of
pointers, minimum buffer size and minimum alignment for the DMA
buffers through a separate TLV part of the extended service ready
event.
Host with the help of service and the DMA capabilities received,
will initialize and configure the ring of DMA buffers to be shared
with the target. Once the rings are initialized, host will send a
WMI command to inform the target of their locations. Target responds
to the host with an acknowledgment event for the shared configuration.
When the host requests for the data captured, target will read the
destination addresses from the rings configured and use the addresses
to perform DMA transfer. When a single or multiple DMA transfers are
complete, target will notify the host via a WMI event. This WMI event
will include information on the number of DMA transfers completed, and
the associated addresses of the buffer that was used to transfer the
data. When the host has finished processing the contents of the DMA
buffer, it will replenish the ring and place the buffer back on the
appropriate ring to make it re-usable.
Change-Id: I7542036636e62701839ef36beafb463909001853
CRs-Fixed: 2127045
