If MP limit fuse feature is enabled in DTSI then
read the fuse register to get information about maximum
allowed resolution. According to that restrict CSID acquire.
Also if only DTSI based max_width is enabled then restrict acquire
with maximum allowed width.
CRs-Fixed: 2785460
Depends-on: 3349044
Change-Id: If861289aebe2921183276780a086dfa1b1d5f372
Signed-off-by: Wyes Karny <wkarny@codeaurora.org>
While dumping OPE req list we were not protecting it in context mutex,
this can result into unexpected behaviors. This change take care of
protecting the dump logic using mutex.
CRs-Fixed: 2750458
Change-Id: I916822b498cde3922274c18a06b98c898bff1d65
Signed-off-by: Vikram Sharma <vikramsa@codeaurora.org>
Clear registers hold the programmed values unless explicitly set to zero.
This can cause problems in cases where a global clear is issued which
encompasses the registers for which clear mask was set in a different
instance of IRQ controller. We should not wait for the next IRQ to clear
the undesired bits in clear register. This change makes sure that the
actions of a particular IRQ controller do not affect the other. Write
zeros explicitly to clear registers corresponding to status registers
after global clear is issued in IRQ handler.
CRs-Fixed: 2775499
Change-Id: Ic57302e5862d9453a94c4e8f470215dacb8978ec
Signed-off-by: Mukund Madhusudan Atre <matre@codeaurora.org>
During first CCI HW initialization, CCI HW global reset has to be called.
CRs-Fixed: 2782553
Change-Id: Ifc02f512859932636c79b0bfed1f60e7c0626cee
Signed-off-by: Anil Kumar Kanakanti <akanakan@codeaurora.org>
This change resets the number of sync links in
case unsync link fails due to any reason, which
will result in device crash, since the number of
sync links can be increased to an invalid value,
then we will get an invalid link.
CRs-Fixed: 2786144
Change-Id: I61bbac9849ce80c319de40ffae411f61c8deeaa9
Signed-off-by: Depeng Shao <depengs@codeaurora.org>
EPD support is configured as a part of config blob. Currently global
reset is invoked after CSID is configured and as a part of that
epd support attributre gets reset. This cause CPHY_EOT_RECEPTION
error from CSID. This change removes reset part of epd supported
attribute to continue with the expected opertion set during
configuration of CSID. Also, set this attribute to zero by default
at probe time to make sure epd is not supported.
CRs-Fixed: 2775508
Change-Id: I0f49f952d2156d92eb0fb1813951a325b63e60b0
Signed-off-by: Jigarkumar Zala <jzala@codeaurora.org>
Tfe hardware support the last consumed buf address.
Request port buf done verified with last consumed buffer
Address. Buf done irq delays can be handled through
last consumed address verification.
CRs-Fixed: 2784348
Change-Id: I4d629da44cf6f1b7755c7785eac11f72384c78c7
Signed-off-by: Ravikishore Pampana <rpampana@codeaurora.org>
Make sure we perform the necessary unlock operations before we return
on an invalid HFI state.
CRs-Fixed: 2783934
Change-Id: I7c611fb98d245952f2f4e9a57dc5fcb249572a40
Signed-off-by: Fernando Pacheco <fpacheco@codeaurora.org>
This change updates the order of error notification, in case
the UMD already receive the error notification and power down
the isp, then the following register dump may meet problem.
This change also add lock protection for csid cmd processing,
in case the csid has released before processing the cmd.
CRs-Fixed: 2783264
Change-Id: I7399d819d1cdadb96b6824cdb4b53aa0167e527b
Signed-off-by: Depeng Shao <depengs@codeaurora.org>
Process tfe page faults based on the pid and mid values.
When page fault happen kernel api gives the pid and mid value,
From pid and mid values TFE hw and tfe port that caused the
Page fault can be find. Added support for this in the tfe driver.
Based on the Pid and Mid values, get the HW id and port ids,
go through all context which has this hw id and port id and log
the data. Once context id is identified, log the acquire data and
last consumed client address details. Dump the hw register data
in the given buffer. Send the smmu page fault event through
v4l2 queue to user.
CRs-Fixed: 2775154
Change-Id: Iafaa7d1283ea0b836c223ed1fe6c419b0ac50c15
Signed-off-by: Ravikishore Pampana <rpampana@codeaurora.org>
Currently pinctrl is handled together regardless of pinctrl
is requested for the active/suspend state. This change adds
the per pinctrl handling when pinctrl gpio is shared among
multiple slaves. Also remove mclk specific logic as this
change will handle it at gpio/pinctrl level.
CRs-Fixed: 2758167
Change-Id: I4fa028d3eee80e056a74324a420c08967cbf6c5f
Signed-off-by: Jigarkumar Zala <jzala@codeaurora.org>
During first CCI HW initialization, CCI HW global reset has to be called.
Removed is_initialized removed, as it can be controlled through
master_active_slave ref count to verify there is any active slave or not.
CRs-Fixed: 2782553
Change-Id: Id845bfc936b976e160231ed3a0acbc951c32ad7f
Signed-off-by: Anil Kumar Kanakanti <akanakan@codeaurora.org>
Reduced maximum no of requests per context from 20 to 8
in isp driver.
CRs-Fixed: 2720238
Change-Id: If557b190fe94af72cc6fb28f36c3e1f6189218a5
Signed-off-by: Shravya Samala <shravyas@codeaurora.org>
Fix the order of imports for to resolve cam_sync
typedef for kernel CFI.
CRs-Fixed: 2772200
Change-Id: I4e5e642e6b45412904585aaa68c0ef77fedeee2d
Signed-off-by: Karthik Jayakumar <kjayakum@codeaurora.org>
Increase max bl limit for OPE to 24 to support maximum
48 stripes.
CRs-Fixed: 2761455
Change-Id: I961be1344fac0084649df321225e94a50d4e5a98
Signed-off-by: Rishabh Jain <risjai@codeaurora.org>
Modify the sof monotonic boot timestamp logic. Boot time
stamp difference between two frames should not change,
it should be same as qtime csid time stamp difference.
So modified logic to give proper boot time stamp with no
difference in the successive frames, the difference of sof
time stamp taken from qtime stamp value.
Delayed IRQ handling can lead to torn read of timestamp
register (LSB from nth frame and MSB from n+1th frame).
This change tries to detect torn read cases and corrects
timestamp close to the actual value.
CRs-Fixed: 2688271
Change-Id: I1dc75629887cfcf971d51a7dae6ea28624d272f1
Signed-off-by: Ravikishore Pampana <rpampana@codeaurora.org>
Remove following unused CCI and CPHY flags.
CRs-Fixed: 2709537
Change-Id: I7a936733da75c71877ae52cfae9ddd358775c305
Signed-off-by: Jigar Agrawal <jigar@codeaurora.org>
This change takes care of a race which we see when we halt master
csid immediately and slave csid halt to follow. In some scenarios
after master csid halt, slave gives violation errors.
With this change we are first changing the mode of slave to master
then issue halt commands to both master and slave.
CRs-Fixed: 2773668
Change-Id: Iab7baa41a69b2e4e0a658c7abac29d2dcb80c289
Signed-off-by: Ayush Kumar <ayushkr@codeaurora.org>
When workqueue is congested, CRM may apply same
request to device which will trigger recovery
due to apply fails. This change prevent CRM
triggering recovery if the time interval of
continuous applying req less than 5ms.
CRs-Fixed: 2775372
Change-Id: I45c2ed76334b1bbf4547bbf21f90cf0a6c169323
Signed-off-by: Depeng Shao <depengs@codeaurora.org>
Drop references to A5 within the debugfs entries so that they
may be reused with other processors.
CRs-Fixed: 2722486
Change-Id: I2680a98dd3d38906e616712da3d6e2835ebb9a85
Signed-off-by: Fernando Pacheco <fpacheco@codeaurora.org>
The A5 references sprinkled throughout the hw manager will no
longer make sesne within the context of two possible processors.
We will instead prefer the more generic "icp" term to reference
the processor in use e.g. icp_dev instead of a5_dev.
Note that some references to A5 remain and will be cleaned up
when LX7 is introduced.
CRs-Fixed: 2722486
Change-Id: I9af73cc2af27a2aed2f4d7baaead89a20442e9ed
Signed-off-by: Fernando Pacheco <fpacheco@codeaurora.org>
