This changes is to detect workqueue and tasklet
scheduling and execution delay.
CRs-Fixed: 2977775
Change-Id: Ia4b4845a067c22bd1f24bd63a971d103fcfc049c
Signed-off-by: Ayush Kumar <ayushkr@codeaurora.org>
For SW sync to work, CRM needs to apply the first 6 requests in
initial sync mode. This change is to increase the count of requests
to be applied in the initial sync mode.
CRs-Fixed: 3000684
Change-Id: Ic35d37ac727fc10ec113dd9f05074cec7a52e39a
Signed-off-by: Ayush Kumar <ayushkr@codeaurora.org>
In some race conditions, CSID registers can be accessed after disabling
the clock. This can result in NOC errors due to unclocked access.
This commit prevents the register access with spin locks.
This commit also moves the halt call of CSID path before unsubcribing
the IRQ.
CRs-Fixed: 3005024
Change-Id: I45bc3410f9562ce328ebe02b39dc63061130faeb
Signed-off-by: Gaurav Jindal <gjindal@codeaurora.org>
Add support to update packer format per request.
CRs-Fixed: 2841729
Change-Id: I5d01ea0d8176d8a022bb079a53b6fb218f94b437
Signed-off-by: Karthik Anantha Ram <kartanan@codeaurora.org>
Add support to re-configure packer format per request.
CRs-Fixed: 2841729
Change-Id: I2df1b523117aa3bafea047aff5e640b94169ad16
Signed-off-by: Karthik Anantha Ram <kartanan@codeaurora.org>
Add uapi structure to add support for enforcing the size
restriction on JPEG thumbnail images.
CRs-Fixed: 2999106
Change-Id: Icee615eb5674b3f0869631a57eed0d46aa6c2799
Signed-off-by: Jigar Agrawal <jigar@codeaurora.org>
Since recovery callback happens in workqueue context, it can run in
parallel with stop dev ioctl. This leads to many possible race
conditions. Instead, protect the recovery callback with the same context
mutex as ioctls to prevent parallel execution.
CRs-Fixed: 3003703
Change-Id: I92a635cfaeee4cf09047672a5cb925cf262cd816
Signed-off-by: Anand Ravi <ananravi@codeaurora.org>
SFE should print violation information along with overflow information
when triggered by IFE HW manager to print overflow information.
Otherwise, there are instances where CSID reports overflow due to SFE
violation but SFE is stopped before IRQ can be fired.
This commit also fixes null pointer dereference in SFE irq handlers
caused by 'commit 1c1d221ff7 ("msm: camera: isp: Add support of SFE
HW for v780")'.
CRs-Fixed: 2977145
Change-Id: I974a1afca84740a72916141db6e5fd0aced2d745
Signed-off-by: Anand Ravi <ananravi@codeaurora.org>
RX disable should be triggered on error in top half even if bottom half
payload is not available.
CRs-Fixed: 2846451
Change-Id: I723e6cac97ab8df4cdda3fd3edb722c581878b5d
Signed-off-by: Anand Ravi <ananravi@codeaurora.org>
Add support to print illegal programming IRQ errors for 780 CSID.
Illegal programming Could be due to following reasons within a path.
1. User has to program either RAW formats or PAYLOAD on both
for multi VCDT with the second decode format. It can neither be a
mix of these.
2. Say in a multi VCDT situation for an active VC, the programmed value
of DECODE_FORMAT is PAYLOAD_ONLY (0xF), the value of DECODE_FORMAT1
should also be programmed as PAYLOAD_ONLY. Failing this check would
trigger the IRQ.
3. In a similar case, if both VCs and DTs are programmed to be same
values, the DECODE_FORMATs should also match.
4. User has to perform sensor switching with a new RUP. For
this, we need the MUP bit to be programmed along with RUP.
5. Early EOF enabled without VCROP registers programmed could also
trigger this IRQ.
CRs-Fixed: 2948116
Change-Id: Ib8cede8607d52586ef178c14a9a4bfd8d0b0b80e
Signed-off-by: Chandan Kumar Jha <cjha@codeaurora.org>
Decode format1 is required for payload decoding in
multi VCDT usecase.Format type is packed in 8 bits.
We will get 8 bits value as format type from UMD to
get decode format1.
CRs-Fixed: 2948116
Change-Id: I81bc816c1fc53ff8949d8920d076461ff1895e45
Signed-off-by: Chandan Kumar Jha <cjha@codeaurora.org>
For Mimas 2.0 TFE RDI port has a width of 128 bit compared
to 64 bit on Mimas 1.0. This change takes care of correct
packer format w.r.t rdi width.
CRs-Fixed: 2982472
Change-Id: I89b16dc517e68e5417ec4683a394b092ff0850f5
Signed-off-by: Vikram Sharma <vikramsa@codeaurora.org>
Earlier, constraint violation was received as part of image size
violation status. Add constraint violation check in vfe bus error
bottom half handler to accommodate changes to the bus irq status
register.
CRs-Fixed: 3005893
Change-Id: I62327b0900ecb3c05cb38a5079d6d9ffb8c5408e
Signed-off-by: Mukund Madhusudan Atre <matre@codeaurora.org>
Since the CAM_TRIGGER_MAX_POINTS equal to CAM_TRIGGER_POINT_EOF,
so we need to use CAM_TRIGGER_MAX_POINTS + 1 to define the
trigger count.
CRs-Fixed: 3007296
Change-Id: Ia0cefd8381417a4b7ecd8636796bf25df705101d
Signed-off-by: Depeng Shao <depengs@codeaurora.org>
In case of dynamic switch shdr use-case ensure discard config is only
applied on number of starting exposures. The change also avoids
programming fetch enable/disable via AHB if already programmed
via CDM at stream on.
CRs-Fixed: 2841729
Change-Id: I36719ca447eeb890f0059489709ab11dcc37dd38
Signed-off-by: Karthik Anantha Ram <kartanan@codeaurora.org>
Configure WM config to frame based mode for PLAIN16 formats in
case of SFE RDI WMs.
CRs-Fixed: 2841729
Change-Id: I8d21e593d13d46486fe3a1c03b51282efad015f0
Signed-off-by: Karthik Anantha Ram <kartanan@codeaurora.org>
Register read writes are expected to go through wrapper
functions in presil so that they can be overridden by presil
code. Change register read during tpg start to use this wrapper.
CRs-Fixed: 2932495
Change-Id: Ib72f2de381e096bde146e4fb1ff8f5187eaa5717
Signed-off-by: Mukund Madhusudan Atre <matre@codeaurora.org>
CAMIF SOF is subscribed as secondary event, change INPUT SOF
check to CAMIF SOF.
CRs-Fixed: 2986303
Change-Id: I0416c35c437edf75e86c3e6b0852ee1943415d2b
Signed-off-by: Karthik Anantha Ram <kartanan@codeaurora.org>
Based on arch, config flag can be set for presil and when enabled,
presil code will be compiled.
CRs-Fixed: 2932495
Change-Id: Iabf1a74be3582d0b84b70777e406b4ce02218220
Signed-off-by: Mukund Madhusudan Atre <matre@codeaurora.org>
Signed-off-by: Suraj Dongre <sdongre@codeaurora.org>
