Commit Graph

67 Commits

Author SHA1 Message Date
qctecmdr
d31237b183 Merge "pitti: Add compilation support for target pitti" 2023-10-30 06:45:17 -07:00
sarath varma ganapathiraju
9bb0f01c5d pitti: Add compilation support for target pitti
Add Compilation support for target pitti.

Change-Id: Ibb06ace7332aa87eb5f8082db95f0c0f8b3deb66
Signed-off-by: sarath varma ganapathiraju <quic_ganavarm@quicinc.com>
2023-10-19 22:01:23 -07:00
Ganapathiraju Sarath Varma
374374a0c4 asoc: codec: wsa884x: check for spkr status before enabling PA
added condition to check for spkr status before enabling
GLOBAL_PA to make sure PA is enabled only when Speaker
is in Enabled state.

Change-Id: Ifa4eeb7d8561bb68193abae16221dd8b2464029c
Signed-off-by: Ganapathiraju Sarath Varma <quic_ganavarm@quicinc.com>
2023-10-17 23:41:24 -07:00
Vangala, Amarnath
d326604d2f asoc: codecs: wsa884x: Remove pre ssr handling
Remove handling for PRE_SSR event.
Move the gpio handling during SSR to SSR UP event.

Change-Id: I2bb1b66db455c6211f1bf12c9e19d7e306a6243a
Signed-off-by: Vangala, Amarnath <quic_avangala@quicinc.com>
2023-09-25 01:39:08 -07:00
Prasad Kumpatla
0a93a99156 asoc: wsa884x: adjust the deglitch settings for wsa884x
Issue: when we change the UVLO_DEGLITCH_SETTING (0x3460) 6.8ms
and above, we can’t hear any audio playback from the Music app
even at max voltage (4.1V).

HW team suggest to change the UVLO_DEGLITCH_SETTING from 0x1B
to 0x1D and WSA884X_PA_FSM_TIMER0(0x3433) to 0xC0. By these
two settings playback is not getting mute.

Change-Id: I5d2d57c26d7f467ba3d2231f1642f34643f6d716
Signed-off-by: Ganapathiraju Sarath Varma <quic_ganavarm@quicinc.com>
Signed-off-by: Prasad Kumpatla <quic_pkumpatl@quicinc.com>
2023-08-01 00:07:45 +05:30
Prasad Kumpatla
23853e3c76 asoc: wsa884x: update INTR_CLEAR0/1 register to volatile
In PDR cases INTR_CLEAR registers values are not updating
properly while doing reg_cache in recover from PDR. So add
these registers as volatile to get the exact HW values.

When these registe values are properly updated the FSM_PA
status is reseting properly and working.

Change-Id: I8fa7b01b3256ec8f01edc3fe48a519accfff9638
Signed-off-by: Prasad Kumpatla <quic_pkumpatl@quicinc.com>
2023-04-28 10:46:38 +05:30
qctecmdr
db55976826 Merge "asoc: wsa884x: add null check for wsa884x->component" 2023-04-16 08:07:36 -07:00
Prasad Kumpatla
58a039c9e6 asoc: wsa884x: add null check for wsa884x->component
add null check before accessing for wsa884x->component.

Change-Id: I0694ad6426317f2f80d5084125c5b24876f96a65
Signed-off-by: Prasad Kumpatla <quic_pkumpatl@quicinc.com>
2023-04-11 13:43:09 +05:30
Ganapathiraju Sarath Varma
7f605534e2 asoc: wsa88XX: Enable/Disable swr ports based on setbit.
During some concurrencies even though we are not
enabling the swrm port, we are trying to disable it.
which causes problem w.r.t clock disablement,
To avoid that we are updating the set bit only
when port is enabled, based on that bit we are taking
decision to disable or enable the port.

Change-Id: I6707c56c40dd3716917edc097c4b7bcad68261fd
Signed-off-by: Ganapathiraju Sarath Varma <quic_ganavarm@quicinc.com>
2023-04-04 22:20:42 +05:30
Phani Kumar Uppalapati
f4a5ac64cc asoc: wsa884x: update uvlo registers for wsa884x
update uvlo registers for wsa884x codec.

Change-Id: I225403378b2e2774fb069446fa2072eb27da0ee7
Signed-off-by: Phani Kumar Uppalapati <quic_phaniu@quicinc.com>
2023-03-27 15:58:09 -07:00
qctecmdr
20d45c2bfa Merge "asoc: codec: Use regmap_update_bits on wsa884x post IRQ" 2023-02-15 05:28:03 -08:00
Eric Rosas
9b11a9ddae asoc: codec: Fix wsa884x IRQ deinitialization
Fix wsa884x deinitialization to avoid double
free and use correct kfree function to prevent
crash.

Change-Id: If7e0e3ceb76f9a29fbafee274147f2992e02085f
Signed-off-by: Eric Rosas <quic_erosas@quicinc.com>
2023-02-13 16:14:44 -08:00
Eric Rosas
d898a57ffd asoc: codec: Use regmap_update_bits on wsa884x post IRQ
Change snd_soc_component_update_bits to
regmap_update_bits because wsa884x may not be
initalized post IRQ.

Change-Id: I3018c680e8b2db346e5acaefc330a5af98150cf2
Signed-off-by: Eric Rosas <quic_erosas@quicinc.com>
2023-02-10 16:03:25 -08:00
Sam Rainey
e520775dec asoc: codec: Add support for 2S battery configuration in the WSA884x driver
Add register initialization for 2S battery configuration, including adding
relevant register shifts and masks.

Change-Id: Ie3bee4283aa57fb489153a3588db638a8a25719c
Signed-off-by: Sam Rainey <quic_rainey@quicinc.com>
2022-11-02 11:07:44 -07:00
Yuhui Zhao
19b039aa73 asoc: add config files to support pineapple target
add pineapple config file to all drivers:
Kbuild, including soc/dsp/ipc

Change-Id: I2357c7c96739bd42cb8764753d2a4fd5dd1c9634
Signed-off-by: Prasad Kumpatla <quic_pkumpatl@quicinc.com>
2022-10-07 11:24:42 +05:30
Ganapathiraju Sarath Varma
7968abf8db asoc: wsa884x: Out of bound check for wsa dev mode.
Out of bound check for wsa dev mode.

Change-Id: I7a244b8f7a55e4ced06991ce8e945d737eac6f77
Signed-off-by: Ganapathiraju Sarath Varma <quic_ganavarm@quicinc.com>
2022-08-18 11:58:57 +05:30
Phani Kumar Uppalapati
52ca984e68 asoc: use BIAS_LEVEL_OFF for LPM trigger
Use BIAS_LEVEL_OFF trigger from ASoC to mark the wcd/wsa power
supplies to LPM (if supported).

Change-Id: I9afdd255ecb385176de82813ed9a638adfdf0292
Signed-off-by: Uppalapati, Phani Kumar <quic_phaniu@quicinc.com>
2022-07-15 15:50:14 -07:00
qctecmdr
aee4a55108 Merge "asoc: codecs: Reinitialize WSA SWR Params during SSR" 2022-07-12 15:15:21 -07:00
Ganapathiraju Sarath Varma
c143a07c13 asoc: codec: update index to read bat cfg.
Update index to read bat cfg from dtsi.

Change-Id: I48ca32d149e14d8ce917be1ffa0822233f69239c
Signed-off-by: Ganapathiraju Sarath Varma <quic_ganavarm@quicinc.com>
2022-06-29 10:19:02 -07:00
Matthew Rice
cea5de36f8 asoc: codecs: Reinitialize WSA SWR Params during SSR
During any restart scenario, it is possible for WSA L and WSA R
to be enumerated differently than bootup, causing them to get assinged
with different swr dev_num than during bootup. Add logic to ensure that
during restarts, the swr port params from device tree are reset in
swrm driver to ensure that they match with the new dev_num.

Change-Id: Ied3eca08a95c8d6a92397c446f7c10f41886f29e
Signed-off-by: Matthew Rice <quic_mrice@quicinc.com>
2022-06-15 16:14:20 -07:00
qctecmdr
0cbf88ed1d Merge "asoc: codecs: Set WSA884X Compander ON by default" 2022-05-03 13:28:07 -07:00
qctecmdr
a6c0e859aa Merge "asoc: codecs: Change WSA SPKRRECV control to bool" 2022-05-03 13:03:17 -07:00
qctecmdr
372908eb84 Merge "asoc: codecs: Add bat cfg check" 2022-05-03 12:37:52 -07:00
qctecmdr
995cee83f6 Merge "asoc: codec: Fix WSA SWRS Reg Dump" 2022-05-02 21:08:21 -07:00
qctecmdr
f6b4d8a856 Merge "asoc: codecs: Revamp dev_index uses" 2022-05-02 20:41:28 -07:00
Matthew Rice
4a43e97d76 asoc: codecs: Set WSA884X Compander ON by default
Due to certain write-once registers needing to be set during
bootup, assume that compander on will be the default usecase, unless
haptics SKU is used.

Change-Id: I7903f3a4bf1eae82b4b9302ddc4f1e4c59d2cad3
Signed-off-by: Matthew Rice <quic_mrice@quicinc.com>
2022-04-27 14:36:54 -07:00
Matthew Rice
c117389d88 asoc: codecs: Change WSA SPKRRECV control to bool
Update from SOC_ENUM to SOC_SINGLE to match rest of driver
implementation. Also remove remaining dev_mode enum references
in wsa884x driver.

Change-Id: I2a477c4fa8c29373ffa1e8e2eb599a0f1c61653d
Signed-off-by: Matthew Rice <quic_mrice@quicinc.com>
2022-04-27 10:52:03 -07:00
Shazmaan Ali
16a78f8cb3 asoc: codecs: Add bat cfg check
Add check to validate bat cfg,
bat cfg register read compared to dts read

Change-Id: Ib62ae3b3535a75dbc7c71b2b2ac3752fb2e61156
Signed-off-by: Shazmaan Ali <quic_shazmaan@quicinc.com>
2022-04-21 19:08:30 -07:00
Matthew Rice
f07906e34d asoc: codec: Fix WSA SWRS Reg Dump
Add missing 0x60, 0x70, 0xC0, 0xC1, 0xC8
to reg dump for better debugging.

Change-Id: I6e7174e432d562c44eba2282ff3c03f513ebc960
Signed-off-by: Matthew Rice <quic_mrice@quicinc.com>
2022-04-20 10:03:13 -07:00
Matthew Rice
22d45f2149 asoc: codecs: Revamp dev_index uses
Add mod % 2 to allow dev_index to work with WSA2 Macro.
Also fix issues associated with incorrect parameter
checking of dev_index leading to potential array index
out-of-bounds issues.
Change WSA MODE mixer control to be SOC_SINGLE_EXT for
extra parameter validation.

Change-Id: I030ee64d87fa60c6b44feebf5ccb1265f4291cc1
Signed-off-by: Matthew Rice <quic_mrice@quicinc.com>
2022-04-18 14:03:07 -07:00
Phani Kumar Uppalapati
dbc14a1d20 ASoC: kalama: Add support for WSA883X speaker amp
Add support for WSA883X speaker amp on kalama platform.

Change-Id: I922b5aeaf264ae9b430f20e83ec99e3ced509dcc
2022-04-16 09:03:18 -07:00
qctecmdr
be2f9dada8 Merge "asoc: codecs: Replace dev_err/info with ratelimit prints" 2022-04-14 16:25:40 -07:00
qctecmdr
abd86fc157 Merge "asoc: codecs: Fix WSA PBR equation" 2022-04-14 13:55:27 -07:00
Shazmaan Ali
a20e11e0c3 asoc: codecs: Replace dev_err/info with ratelimit prints
replace all dev(pr)_err/info logs
that could potentially flood kernel logs with
ratelimit functions dev_err_ratelimited and
dev_info_ratelimited

Change-Id: I32dc6002dead1a07622978c4de63d541c01982fd
Signed-off-by: Shazmaan Ali <quic_shazmaan@quicinc.com>
2022-04-13 12:43:20 -07:00
Shazmaan Ali
7f29f390e1 asoc: codecs: error fix for soc_component_read_no_lock
the offset between LPASS_CDC_WSA_RX_INP_MUX_RX_INT0_CFG1 and
LPASS_CDC_WSA_RX_INP_MUX_RX_INT1_CFG1 is 8 so updating
0x104 + 8* interp
update ng block register write for NG2 mode in Kundu

Change-Id: I44da894feebb5d25bd467ffd4d54adde111778e6
Signed-off-by: Shazmaan Ali <quic_shazmaan@quicinc.com>
2022-04-12 01:26:35 -07:00
Matthew Rice
2e8c4069b5 asoc: codecs: Fix WSA PBR equation
Update equation that converts from the PBR table to
the correct register value.
Improve accuracy of truncation by moving the division
into one operation at the end of the formula and adding 1.
Update a few table values that were copied incorrectly.

Change-Id: I685c02778468e910820a90e2de216e0daf2491ac
Signed-off-by: Matthew Rice <quic_mrice@quicinc.com>
2022-04-11 07:05:27 -07:00
Matthew Rice
448e5c5a77 asoc: codecs: Implement WSA IRQ retry/shutdown scheme
Whenever there is an interrupt,
mute the PA, then wait 1ms and unmute the pa and
check for another interrupt. Then if there are still interrupts,
retry muting and unmuting the pa with delay.
If interrupts persist, the PA will remain muted until there is a
usecase teardown or reset.

Change-Id: Ic59fc33d4606c1c630a61796d513a9ec99a4979c
Signed-off-by: Matthew Rice <quic_mrice@quicinc.com>
2022-03-31 12:34:31 -07:00
Matthew Rice
5403d47a9a asoc: codecs: Add WSA init reg writes
Update to latest sequence from WSA hardware systems team.
Add writes for VADC, BG, Boost

Change-Id: Ic61e1c36154ff673fce05546332e89fe683a3075
Signed-off-by: Matthew Rice <quic_mrice@quicinc.com>
2022-03-24 22:30:07 -07:00
Shazmaan Ali
b62c934b61 asoc: codecs: Resolve checkpatch errors
Change-Id: I33dca97f388b524c7476e0da0ea8b1cbca4b849c
Signed-off-by: Shazmaan Ali <quic_shazmaan@quicinc.com>
2022-03-15 02:39:22 -07:00
Matthew Rice
2e70df2efe asoc: codecs: Add checking of WSA SWR dt params
Add to avoid crashing related to device tree parsing
of SWR port params.

Change-Id: Id839cc908fb5f7843e5fd6260b3205c8844349ba
Signed-off-by: Matthew Rice <quic_mrice@quicinc.com>
2022-03-10 10:18:23 -08:00
Matthew Rice
9d7405ec04 asoc: codecs: Fix Bolero and WSA out-of-range variables
Found potential issues relating to uninitialized or out-of-bounds variables
present in codec drivers. Place checks to ensure proper ranges are used.

Change-Id: Ib68cba2413788a57237f1f18fc5ce5fb5c6bfb0a
Signed-off-by: Matthew Rice <quic_mrice@quicinc.com>
2022-03-02 22:02:03 -08:00
Matthew Rice
3a6ef472dd asoc: codecs: Enable custom WSA SWRS port settings
For PBR and CPS ports, need the ability to customized slave
SWR frame OFFSET1 settings. Add similar method to WCD TX where
offset1 and lane_ctrl parameters are parsed from WSA device tree
and configured in SWRM.

Change-Id: Ib973ed93d9daa5ba02461a156e5b0a8c816d371e
Signed-off-by: Matthew Rice <quic_mrice@quicinc.com>
2022-03-02 22:01:34 -08:00
Matthew Rice
f3d67be087 asoc: codecs: Fix WSA dapm_ignore_suspend pin names
Update to 5.15 kernel dapm api.
Pin name no longer needs prefix as it is added in API.

Change-Id: I5c1378839f4c4d2aa70fb11706c5bb65d4eb0952
Signed-off-by: Matthew Rice <quic_mrice@quicinc.com>
2022-02-17 17:51:57 -08:00
Matthew Rice
09ddecf85c asoc: codecs: Remove unused asoc kcontrols in WSA884x
Removed PA Mute, COMP Offset, Ext_vdd as they will not be used
in WSA884x.

Change-Id: I58ffd490c9929fa3388678d9ab7114207779191d
Signed-off-by: Matthew Rice <quic_mrice@quicinc.com>
2022-01-21 12:55:20 -08:00
Shazmaan Ali
da66f4540f asoc: codecs: Add WSA884X set config func
Add set config function to validate and
set battery stack mode, rload and system gain

Change-Id: I075bf3cde6a9671a8d93f32aec43b941ea86f2ea
Signed-off-by: Shazmaan Ali <quic_shazmaan@quicinc.com>
2022-01-20 21:30:19 -08:00
Shazmaan Ali
152f664978 asoc: codecs: Add noise gating register writes
Read noise gate mode from device tree,
set NG2 based on the register read or
set to idle detect mode

Change-Id: Id1e478ad230125d1e35229493cb0fbd6867c6a3b
Signed-off-by: Shazmaan Ali <quic_shazmaan@quicinc.com>
2022-01-20 21:30:16 -08:00
Matthew Rice
823dd9bab9 asoc: codecs: Add current_limit updates to WSA884x
Boost current limit is now dependent on PBR and bat_cfg.
Add BOP2 VTH/HST initial settings.
Add OCP LOW VBAT ITH sel settings dependent on bat_cfg.

Change-Id: I235f4b75ee12e5f24d46fa0ebca67547997934e2
Signed-off-by: Matthew Rice <quic_mrice@quicinc.com>
2022-01-20 21:30:13 -08:00
Matthew Rice
233a0dcb1b asoc: codecs: Updated swr slave debug w/ new ports
Add PBR/CPS ports to debugging by adding logic to
is_swr_slave_reg_readable.

Change-Id: I9ef09ed90ccce2c696eaec7b1eed9c47a7e73f58
Signed-off-by: Matthew Rice <quic_mrice@quicinc.com>
2022-01-20 21:30:04 -08:00
Matthew Rice
9284d9af02 asoc: codecs: Implement lpass PBR feature
Lpass-side enablement of new WSA feature.
Configure PBR registers based on WSA bat_cfg/rload/sys_gain.
Some registers updated during init, others during enable_interpolator.

Change-Id: Iac42672182827a9da47700319c61b9d0a17d0936
Signed-off-by: Matthew Rice <quic_mrice@quicinc.com>
2022-01-20 21:30:01 -08:00
Matthew Rice
d8711a3a66 asoc: codecs: Implement PBR feature for WSA884X
Change PBR enable to be acquired from device tree.
Using system_gain, bat_cfg, rload, set pbr thresholds based on tables.
Table values are x100 to avoid kernel float issues,
truncate when converting to reg val.
Set pbr registers during initialization.
Rename WSA_8OHMS -> WSA_8_OHMS to match system gain naming.

Change-Id: I28985496e1da37ceeb8c9db6e17f4c48d37d11c7
Signed-off-by: Matthew Rice <quic_mrice@quicinc.com>
2022-01-20 21:29:51 -08:00