Commit Graph

1193 次程式碼提交

作者 SHA1 備註 提交日期
Jeykumar Sankaran
53db678726 disp: msm: sde: expose api to control encoder irq
Expose an API in encoder to control display irq's
when the VM enters and exits TUI use case.

Change-Id: Ic2386dcebfd8a9dd2ce06f068c6daf066a3e885f
Signed-off-by: Jeykumar Sankaran <jsanka@codeaurora.org>
2020-07-10 15:48:34 -07:00
Jeykumar Sankaran
c3389d315c disp: msm: sde: register io resource collection VM event hook
Add support to read register ranges and IRQ lines that needs
isolation during VM switch. Register for vm resource collection
event providing the callback function.

Change-Id: Ie1edf0794a8de89cc44279892433b45a54eba609
Signed-off-by: Jeykumar Sankaran <jsanka@codeaurora.org>
2020-07-10 15:48:19 -07:00
Jeykumar Sankaran
bd60dce87c disp: msm: add io resource collection hook to vm events
When the TUI use case starts, HLOS prepares for sharing the HW
by collecting the register io spaces and IRQ lines from all the
participating subdrivers before the switch. This change
adds necessary hook in the VM event framework, so that
subdrivers can provide their callback functions while
registering for events. It also adds necessary helpers
in the sde io util to parse and populate the IO memory
region that needs to be shared.

Change-Id: I4c0825fa76453a1c1ec421640deff36158d6ef8c
Signed-off-by: Jeykumar Sankaran <jsanka@codeaurora.org>
2020-07-10 15:47:48 -07:00
Jeykumar Sankaran
99df0d5052 disp: msm: add support for vm event register framework
Besides SDE, other subdrivers may be interested in participating in
the VM switch. This change provides framework for display dependent
drivers like DSI, DP and RSCC to register for various VM switch
event hooks.

The following hooks to provided through msm_vm_ops:
post_hw_acquire: invoked before the first frame push after gaining
                 HW access.
pre_hw_release: invoked after the last frame commit before releasing
                the HW.
check:       check with vm clients for their readiness for HW
             releasing.

Change-Id: I616db04e979f78f76f6f97ee3b068dd348339ab6
Signed-off-by: Jeykumar Sankaran <jsanka@codeaurora.org>
2020-07-08 23:14:31 -07:00
Jeykumar Sankaran
cd0ab0f62e disp: msm: sde: fix space between operators
Fix overdue kernel check patch errors by adding needed
spaces between operators in sde_kms file.

Change-Id: I7d734736d26366ac44ea2b66decb2fcf271b4382
Signed-off-by: Jeykumar Sankaran <jsanka@codeaurora.org>
2020-07-08 23:13:55 -07:00
Linux Build Service Account
b86633e592 Merge changes Iea651a2f,Idb564927 into display-kernel.lnx.5.4
* changes:
  disp: sde: add CRTC property for VM requests
  disp: msm: sde: add capability flag for trusted VM support
2020-07-01 11:36:06 -07:00
qctecmdr
ffa7156d3a Merge "disp: msm: sde: Add checksum support for LTM for lahaina target" 2020-07-01 07:52:03 -07:00
qctecmdr
4fbdcba865 Merge "disp: msm: sde: wait for pending crtcs before lastclose commits" 2020-06-30 17:33:14 -07:00
qctecmdr
a0617ca0ce Merge "disp: msm: handle panel detection after a pp done timeout" 2020-06-30 15:12:07 -07:00
qctecmdr
5634bb0af9 Merge "disp: msm: sde: fix prefill line calculation for high fps" 2020-06-30 06:29:30 -07:00
qctecmdr
14d7aaccef Merge "disp: msm: sde: schedule idle notify after frame trigger" 2020-06-30 03:33:22 -07:00
Steve Cohen
f030fa4c2a disp: msm: sde: wait for pending crtcs before lastclose commits
If a SIG_TERM/SIG_KILL or other signal is sent to the final drm
client, the driver will be force-closed. A -ERESTARTSYS error is
occasionally seen from the interruptible wait in
msm_atomic_commit when this occurs, and causes the lastclose
cleanup to fail if any crtc is busy at that point. To prevent
this, wait for any pending crtcs to complete before calling
the lastclose cleanup commits.

Change-Id: Ib6a5e55a4b737213756cb9ed8364d5c34ab47c16
Signed-off-by: Steve Cohen <cohens@codeaurora.org>
2020-06-29 23:45:19 -04:00
qctecmdr
fc320f34cf Merge "disp: msm: sde: serialize rm reserve for check only commit" 2020-06-29 17:50:54 -07:00
Dhaval Patel
11b2a41dc8 disp: msm: sde: fix prefill line calculation for high fps
Fix prefill line calculation for high refresh rate
usecase and define correct number of prefill lines
for lahaina target.

Change-Id: Ib3467b9beb43de9c5faa2b1af2d8873a89c9c481
Signed-off-by: Dhaval Patel <pdhaval@codeaurora.org>
2020-06-29 16:17:34 -07:00
Raviteja Tamatam
bbf3d7949f disp: msm: sde: modify from fixed to variable programmable fetch start
With 120 fps panels and vfp method of dfps ,the vfp is very large in lower
fps and there is huge time gap between programmable fetch start (MDP vsync)
and panel vsync.  As fence is released early timing registers are modified
by the next commit before the previous timing parameters takes effect and
this is leading to underrun. With variable programmable fetch start MDP
vsync is close to panel vsync and avoids such condition.

Change-Id: Id88b5e2957bf4af751f49f1f32327715a34b102b
Signed-off-by: Raviteja Tamatam <travitej@codeaurora.org>
2020-06-29 16:15:06 -07:00
Dhaval Patel
f774d21f54 disp: msm: sde: schedule idle notify after frame trigger
Existing idle notify schedule logic tries to schedule
this event before display power on. If display power on
takes more than 80ms, it triggers the idle notify before
processing first display power on frame. This patch
schedules the idle notify after frame trigger for
valid notification.

Change-Id: If94108e141b5c19d123033e9d37333e98fb987f7
Signed-off-by: Dhaval Patel <pdhaval@codeaurora.org>
2020-06-29 16:14:56 -07:00
Satya Rama Aditya Pinapala
182d88e3b9 disp: msm: handle panel detection after a pp done timeout
The change allows for multiple TE checks during a pp done timeout.
With this change, when a timeout occurs the panel status is checked
using the default ESD check status method followed by multiple TE checks.

Change-Id: If813964bab55c5e8113721060aa5b279f30fa5e0
Signed-off-by: Satya Rama Aditya Pinapala <psraditya30@codeaurora.org>
2020-06-29 15:52:01 -07:00
qctecmdr
4d45309328 Merge "disp: msm: fix vram allocation when IOMMU is not present" 2020-06-28 04:32:57 -07:00
qctecmdr
1e80d51447 Merge "disp: msm: refactor dma buf attach device assignment" 2020-06-28 04:32:57 -07:00
qctecmdr
b299a0f04c Merge "disp: msm: sde: manage vblank refcount concurrency" 2020-06-28 04:32:57 -07:00
qctecmdr
e5e4004854 Merge "disp: msm: sde: avoid physical encoder disable(s) in trusted VM" 2020-06-28 01:57:54 -07:00
qctecmdr
1b5e5c1590 Merge "disp: msm: specify default value for msm enum property" 2020-06-27 23:15:27 -07:00
Linux Build Service Account
1a94387741 Merge "disp: msm: dp: log the status of the uevent" into display-kernel.lnx.5.4 2020-06-26 18:54:50 -07:00
Linux Build Service Account
8fb0e26527 Merge "disp: msm: sde: add xin client clock status for wb2" into display-kernel.lnx.5.4 2020-06-26 18:53:49 -07:00
Linux Build Service Account
c700dd47ea Merge "disp: msm: sde: update sspp multi rect programming" into display-kernel.lnx.5.4 2020-06-26 17:18:18 -07:00
Linux Build Service Account
7016ab641e Merge "disp: msm: dp: check ERR_PTR when creating a new connector" into display-kernel.lnx.5.4 2020-06-26 17:18:16 -07:00
Prabhanjan Kandula
690139ccd1 disp: msm: sde: serialize rm reserve for check only commit
During back to back mode set, current driver logic fails
atomic check during resource allocation with test only if
previous commit also with modeset, has tagged resources for
allocation but did not commit the resources yet. Since client
invoking atomic check before previous mode set commit complete
is an expected scenario now, instead of failing atomic check,
this change allows resource allocation for next commit also go
through by pollong till the first mode set is complete.

Change-Id: I1261b7d205bb0d886085664fab3664162a419c99
Signed-off-by: Prabhanjan Kandula <pkandula@codeaurora.org>
2020-06-26 10:38:43 -07:00
Dhaval Patel
44cde01fc7 disp: msm: sde: manage vblank refcount concurrency
Vblank refcount can reach out of sync with below case
 1. event_thread triggers the vblank_enable
 2. commit_thread triggers the modeset
   2.a modeset resets the vblank refcount with mode_set
 3. event_thread triggers the vblank_disable

Event 2.a resets the vblank refcount and vblank disable
request after 2.a is going to fail. This can be fixed
by avoiding concurrency between mode_set call and vblank
request.

Change-Id: Ibb810ec90e81d63feee443f1c37dd736d5cfac0d
Signed-off-by: Dhaval Patel <pdhaval@codeaurora.org>
2020-06-25 13:54:21 -07:00
Veera Sundaram Sankaran
88037da799 disp: msm: fix vram allocation when IOMMU is not present
Allocate DSI/LUTDMA buffers from VRAM when IOMMU is not
available. Add checks in msm_gem to avoid few operations
when aspace is not available due to no IOMMU. Parse the
VRAM size from device tree, when available.

Change-Id: Iedf5749b71c2e772ac5434048520a34705c54b45
Signed-off-by: Veera Sundaram Sankaran <veeras@codeaurora.org>
2020-06-24 16:20:38 -07:00
Jeykumar Sankaran
8b032e5e46 disp: sde: add CRTC property for VM requests
Add a CRTC property to request the VM to acquire/release
HW resources.

Display driver in trusted VM boots up without HW ownership. Set
the default value of the property as RELEASED to handle resource
assignments.

Change-Id: Iea651a2fea902d95d4b954052af4ef016af15a91
Signed-off-by: Jeykumar Sankaran <jsanka@codeaurora.org>
2020-06-19 17:46:43 -07:00
Jeykumar Sankaran
06ab29478d disp: msm: sde: avoid physical encoder disable(s) in trusted VM
VM switches during TUI usecase are expected to be seamless i.e without
display reset. In SDE language, this translates to respective display
drivers not tearing down the HW pipeline while releasing the HW.

In Primary VM, this taken care by keeping the DRM pipeline alive when
TUI is active.

In Trusted VM, since the client creates and destroys the display per
session, checks are needed to bypass the physical encoder disable(s).

Change-Id: Iac42f02806962405c9364b1ffed85778229977e9
Signed-off-by: Jeykumar Sankaran <jsanka@codeaurora.org>
2020-06-19 17:46:43 -07:00
Jeykumar Sankaran
98a6a1131c disp: msm: sde: add capability flag for trusted VM support
Add a new hw catalog flag to indicate target support for
trusted VM. Currently, the flags is set for Lahaina target.

Change-Id: Idb56492758ef580673b2ebf44fecd577a2876f1b
Signed-off-by: Jeykumar Sankaran <jsanka@codeaurora.org>
2020-06-19 17:46:43 -07:00
Prabhanjan Kandula
f946219084 disp: msm: sde: update sspp multi rect programming
Current SDE driver allows staging of rect1 only configuration. When a
real plane is disabled sspp multi rect configuration is not updated.
This can lead to iommu faults and ping pong timeouts as framebuffer of
disabled plane is unmapped. This change fixes it by updating multi rect
config accordingly when a plane is disabled.

Change-Id: I67ae45ad0e607184c7fc49f4b220220ba1d8a2ae
Signed-off-by: Prabhanjan Kandula <pkandula@codeaurora.org>
2020-06-19 16:45:29 -07:00
Dhaval Patel
31d4bb10a6 disp: msm: sde: add xin client clock status for wb2
CWB may trigger frame missed message if interrupts
are disabled on specific CPU. WB2 will only find single
interrupt status for two posted start triggered frame.
SDE driver will start checking the xin client clock
status for wb2 timeout case to trigger the valid
frame done status.

Change-Id: I16a99667116732002e6dec8a18330f8b45199387
Signed-off-by: Dhaval Patel <pdhaval@codeaurora.org>
2020-06-19 16:28:14 -07:00
Jeykumar Sankaran
935af8104a disp: msm: sde: avoid MDSS register access during boot in trusted VM
Trusted VM will be assigned MDSS HW access dynamically only on TUI
use case start boundary. So, any HW access during the boot sequence
will result in stage2 faults. But SDE driver initializes few HW
blocks during the boot up sequence. This change fixes them by either
skipping those accesses, if those registers expected to be programmed
by the Primary VM or postponing those accesses until the HW is
assigned.

Change-Id: Ic85238c5d734e9ac993072374c1b0ae661708fca
Signed-off-by: Jeykumar Sankaran <jsanka@codeaurora.org>
2020-06-19 15:39:03 -07:00
qctecmdr
743dc695c4 Merge "disp: msm: sde: fix cwb enable detection logic" 2020-06-19 12:44:59 -07:00
Veera Sundaram Sankaran
bd28c729e8 disp: msm: refactor dma buf attach device assignment
Assign default drm device for dma buf_attach when
IOMMMU is not present and for stage-2 only buffers.
Avoid setting lazy_unmap for stage-2 only buffers as
it doesn't have any impact without nested translations.
Assign default drm device when no device is found to
support transitions between secure usecases where
the nested context banks might not be attached back
at the prime_fd_to_handle time. These buffers would
be attached with the correct context bank device
during the delayed_import.

Change-Id: I9ccb38876d7843b4411762c7b8006ae8fca85391
Signed-off-by: Veera Sundaram Sankaran <veeras@codeaurora.org>
2020-06-19 11:36:29 -07:00
qctecmdr
1bd126d328 Merge "disp: msm: sde: add dt property for QSEED scalar HW revision" 2020-06-19 02:38:54 -07:00
Yuan Zhao
c1c2e1ca63 disp: msm: dp: check ERR_PTR when creating a new connector
sde_connector_init will return an ERR_PTR if connector
creation failed, so need to use IS_ERR_OR_NULL to check
the return value.

Change-Id: I4fee5a624261898bbd079c54705e6eaebc71bac6
Signed-off-by: Yuan Zhao <yzhao@codeaurora.org>
2020-06-18 19:49:05 -07:00
qctecmdr
4ebc0e1f34 Merge "disp: msm: dp: add private state to dp_mst_bridge" 2020-06-18 16:02:54 -07:00
qctecmdr
05617b0c83 Merge "disp: msm: dp: take port refcount for MST sim ports" 2020-06-18 16:02:54 -07:00
Jeykumar Sankaran
e81f110f6e disp: msm: sde: make mnoc icc paths optional
ICC frameworks may not be enabled for all the OS
environments. SDE is expected to work in the environments
where ICC paths are not defined e.g Trusted VM. Except
mnoc bus, SDE is keeping all the other paths optional.
This change adds mnoc bus to the optional list.

Change-Id: I1e3d31a3b0f49fb32041bc7e2192b014f6497267
Signed-off-by: Jeykumar Sankaran <jsanka@codeaurora.org>
2020-06-18 11:28:46 -07:00
Jeykumar Sankaran
cb4f390241 disp: msm: sde: add helper api to check executing VM
Adds a DT property to indicate trusted VM execution
environment and support catalog parsing for the same.
Add helper API to read the value.

Change-Id: I9194618b6f080119f1f15271a9b3c7edf938ca08
Signed-off-by: Jeykumar Sankaran <jsanka@codeaurora.org>
2020-06-18 11:28:40 -07:00
Dhaval Patel
1eda6392b0 disp: msm: sde: fix cwb enable detection logic
Existing cwb enable detection logic relies on
crtc id matching with each encoder->crtc. This
may not be available on first power on commit
because it updated after encoder_atomic_check
call. This patch fixes the cwb enable detection
logic by checking the encoder_mask on crtc_state.

It also fixes the cwb concurrency with mode_set
and secure display.

Change-Id: I70f656dd9e7d94d3ba761c25745b473a1c204173
Signed-off-by: Dhaval Patel <pdhaval@codeaurora.org>
2020-06-17 16:49:16 -07:00
Jeykumar Sankaran
b87b13690b disp: msm: specify default value for msm enum property
Allow caller to specify the default value of the enum
property while installing with msm prop layer. It is
not always the case that the default value to be the
first entry.

Change-Id: Ie0bb1ad7479e3e07810b3d817fdf618b1935858c
Signed-off-by: Jeykumar Sankaran <jsanka@codeaurora.org>
2020-06-17 15:36:33 -07:00
Sankeerth Billakanti
a0cc0eceee disp: msm: dp: add private state to dp_mst_bridge
Current dp_mst_bridge has variables that are accessed by both
check phase and commit phase, which causes racing issues. This
change will add private state to dp_mst_bridge to separate check
phase and commit phase.

Furthermore, this change is a partial rollback of commit 2446602565ec
("drm/msm/dp: add private state to dp_mst_bridge") where active_enc_cnt
is removed. In this change we retain the encoder availability check in
mode_valid.

Change-Id: I8ac05cf5f1755375e4e9f34e42dbaea1d23bac64
Signed-off-by: Xiaowen Wu <wxiaowen@codeaurora.org>
Signed-off-by: Sankeerth Billakanti <sbillaka@codeaurora.org>
2020-06-16 13:30:14 -07:00
Steve Cohen
199065f8be disp: msm: dp: take port refcount for MST sim ports
The single "port" refcount has been split in 2 on 5.4.  MST sim
layer is only getting the topology refcount but never initializes
or obtains references for the memory allocated for this port.
Add the new refcount logic required on 5.4 to MST sim layer.

Change-Id: I6e25c048fa26352c4fb718996514a1ca91432408
Signed-off-by: Steve Cohen <cohens@codeaurora.org>
Signed-off-by: Rajkumar Subbiah <rsubbia@codeaurora.org>
2020-06-16 13:30:08 -07:00
Satya Rama Aditya Pinapala
2d62ccb15b disp: msm: add func to parse pll_codes from dfps_data_region
Add function to parse pll_codes from dfps_data_region, and the
pll_codes are used as trim_codes for RFI.

Change-Id: Ic81529cd685f17012809fb68cefc4b36cb1172ca
Signed-off-by: Satya Rama Aditya Pinapala <psraditya30@codeaurora.org>
2020-06-16 13:30:02 -07:00
Lakshmi Narayana Kalavala
a27534e143 disp: msm: sde: Add checksum support for LTM for lahaina target
This change adds the support for checksum collection and notifies
to user space as part of drm event.

Change-Id: Ib2a6c38c74d1fb60d274cdb685b74979202604eb
Signed-off-by: Lakshmi Narayana Kalavala <lkalaval@codeaurora.org>
2020-06-15 20:13:14 -07:00
qctecmdr
4b24ccb9d8 Merge "disp: msm: sde: avoid access out of range issues in sde cp code" 2020-06-12 22:59:38 -07:00