The following configurations are changed
- Change numer of WBM2SWRELEASE rings from 7 to 8
- Use configurable RBM value when enqueuing packets for TX. This is needed
since WBM release ring numbers do not have an easy mapping to RBM values
for HMT1.0.
Change-Id: Idcf9e48e00b7039331fc1837bb1e900b12f19eb3
CRs-Fixed: 2984362
In WBM error path, add handling for packets received with
rxdma_psh_rsn as rxdma_rx_flush. Also add assert for packets
received with an invalid push reason.
Change-Id: I4e445d52f00bbbdca358225aef488da0e8dccaa7
CRs-Fixed: 2978262
Initialize the last_desc_cleared pointer to -1 not 0, and
also fix the check it should always behind tp.
Change-Id: I281e066d45a99ac99d4f3c4e0bcc3f65f14bb589
CRs-Fixed: 2987029
HAL generic APIs which use HW definitons that
do not have same value across all lithium chipset
are moved to header files. So that these will be
compiled with appropriate header files
Change-Id: I6c167afa4212c5e884f5e18ff1ccb3bbbba8f5f5
For WCN7850, all the REO errors are supposed to be handled
by the APPS core. In accordance with this design, re-route
all the REO error frames to the APPS facing rx-error ring.
Change-Id: Id6f956a1459d318a5876696842ca87fa29e1e27b
CRs-Fixed: 2965087
Register, for WCN7850, the hal ops to get the
current PN for a packet from the tlvs.
Change-Id: I9fabc84aee318de2031bfa5f88dafe19b723079a
CRs-Fixed: 2965086
Currently the EAPOL/ARP/DHCP frames arriving as 2K-jump
or out-of-order frmaes are being delivered to the network
stack, without checking for the packet-number sequence.
WCN7850 has hardware support to provide the packet number
of the previous successful re-ordered packet from hardware.
Use this feature to check if the packet-number are in proper
sequence for these EAPOL/ARP/DHCP packets arriving as 2k-jump
or out-of-order packets before submitting it to the network
stack.
Change-Id: I1078452afce4bc00b2509436295e5bd80000feb4
CRs-Fixed: 2965086
Currently the hardware srng register offset is statically
assigned to the handle. This can lead to incorrect index access
when targets (eg: wcn7850) is added which require additional
register offsets to be stored in the hw srng register offset table.
Move to the index based assignment of the srng register offset.
Change-Id: I8e38bdd0c28068029a0267fce706edf4378b9df8
CRs-Fixed: 2965081
WCN7850 has support for near full indication for
the consumer srngs. This interrupt is used to take
preventive actions to avoid ring full watchdog irq
trigger.
Register for the near full irq and add the necessary
ext groups for these near-full irqs.
Change-Id: Ic16381fceabc54e6c52b34dd13abea74cad4d38c
CRs-Fixed: 2965081
HW macros used for hal_rx_wbm_err_info_get_generic_li are
different across chipset. Move this API to header file to
ensure chipset specific HAL is compiled with appropriate
HW headers
Change-Id: I053d243235f187d931048d1fd22293f9142a00c7
hal_reg_write_need_delay is invoked immediately after
q_elem->valid check. The first two instructions in
hal_reg_write_need_delay could be in the CPU instruction
pipeline which could result in possible loading and
dereferencing of NULL srng from an invalid q_elem.
Fix is to invoke hal_reg_write_need_delay just before
hal_process_reg_write_q_elem and also add NULL checks
to avoid the srng NULL pointer dereference.
Change-Id: I2de50b1e78782e3c91a9cb4477f28d91f9c29439
CRs-Fixed: 2973257
To fix the below compilation error, included "hal_be_rx_tlv.h" header file
in hal_be_generic_api.c file.
"cmn_dev/hal/wifi3.0/be/hal_be_generic_api.c:754:40: error:
'hal_rx_tlv_get_pn_num_be' undeclared (first use in this function);
did you mean 'hal_rx_tlv_get_pn_num'?"
Change-Id: I57074967dad8cee98fc8094c4eadc9289b7e7984
CRs-Fixed: 2974607
PN number get function handler is not initialized,
This lead to CFI assert. Add correct handlers for
differnt chipsets.
Change-Id: Ib8836af0d69380da597822d1755bb5dd2309c95f
CRs-Fixed: 2968223
Return LMAC start id also as part of hal_get_meminfo API.
This field is added to hal_mem_info struct.
Change-Id: I013d357cf4337702c06a91ed15e8337469865270
Refactor FISA packet history to not access "struct rx_pkt_tlvs". This is
because this structure may be different for Li and BE chips and should
not be accessed directly and only via hal_soc->ops in common code.
CRs-Fixed: 2888556
Change-Id: I0d9f2785a81c130a2dc506020a02ee5581c0bbd3
Implement core DP rx processing to functions in to corresponding
architecture specific be/li rx files. Keep common utility functions
in DP common files.
Change-Id: I40083e10772fd2b6ce2f1fa9e197f2ad92d0522a
CRs-Fixed: 2891021
Add the changes to the generic HAL APIs.
The APIs generic across lithium and beryllium
architecture are kept in common HAL code.
The APIs which are generic across lithium
chipsets are moved to lithium specific files.
The APIs which are generic across beryllium
chipsets are kept in beryllium specific files.
Change-Id: Ie5e28aca5de02aa42f63b4a13fcb1cb32ffa8a28
CRs-Fixed: 2891049
Assign th HAL TX/RX ops in a function instead of assining a structure
directly. This can be later extended to have default ops for a family of
chips and then override that with chip specific ops.
This also helps the case where a new hal_soc->ops needs to be added.
The new 'op' will need to be added to only a default ops initializer
(with assumption that it applies to all chips).
Change-Id: Iefa23d14110fa5252444fad89737a3b2b2fbab6f
CRs-Fixed: 2891049
Introduce intermediate EP voting state during this transition state
access the votes only if direct writes are not possible.
Change-Id: Ib4522aef2209b4797100ca84e4e230a00e14b654
CRs-Fixed: 2954903
While Rx buffers are getting umapped from net rx context if IPA
pipes are enabled at same time from MC thread context this is
leading to race condition and IPA map/unmap is going out of sync.
To fix this introducing IPA mapping lock and IPA mapping need to
be handled with lock held.
Change-Id: I9fa71bdb6d4e4aa93fc795cc5dd472a181325991
CRs-Fixed: 2945063
Even though HP/TP updates are posted writes at CPU level, they
are getting blocked until soc comes out retention which is hogging
CPU.
To avoid this if EP is in low power state update HP/TP writes from
delayed work context. In delayed work vote for EP awake wait till it
comes out low power state and then proceed to HP/TP update.
Change-Id: I61d5795f58f25f850b5a9ad4d30e3181dba23713
CRs-Fixed: 2913495
hal_get_entrysize_from_srng returns the entry size
in dwords but the caller expects in bytes. This results
in insufficient data to be recorded for CE event.
Fix is to left shift the entry size by two bits in
hal_get_entrysize_from_srng so that the entry size
value returned is in bytes.
Change-Id: If532da7abe5ce9c293969f0052455085f18b1926
CRs-Fixed: 2935196
Add iwpriv option 34 to dump the reo rx h/w descs
in DDR for debugging. This cmd will first send cache
flush cmd to REO for all rx tids and invalidate the h/w
cache. Henceforth ensuring that the reo status tlvs and
the DDR values are in sync.
iwpriv wlan0 txrx_stats 34 0
Add fix to ensure bar frame with 2k jump err code is
processed correctly using the REO error code instead of the
REO push reason.
Change-Id: Ia05be668343f3a5d4b3262b8d6a367a50875add5
CRs-Fixed: 2895965
