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3394 次代码提交

作者 SHA1 备注 提交日期
Shamika Joshi
42d9137a04 disp: msm: sde: fix min fps in EPT calculations
In non-qsync panels when min FPS is not published in DT,
the default min fps is set to 10 FPS. This change handles mode
switch cases, when panel FPS drops below 10 FPS by updating
min FPS to panel FPS for Expected Present Time calculations.
As part of the change, reduce 2ms from EPT to account for
scheduling delays after schedule_timeout.

Change-Id: Idc206f39adfb3517b4ea2cfa303fe53182a8e63e
Signed-off-by: Shamika Joshi <quic_shamjosh@quicinc.com>
2023-05-09 10:27:03 -07:00
qctecmdr
b02c68b75c Merge "disp: msm: sde: avoid concurrency while calculating max mode width" 2023-05-08 15:24:22 -07:00
qctecmdr
ea39f24f67 Merge "disp: msm: sde: fix out of bounds memory access" 2023-05-08 15:24:22 -07:00
qctecmdr
6ce26bb091 Merge "disp: msm: dsi: add new function to cleanup post command transfer" 2023-05-08 11:44:03 -07:00
qctecmdr
190dc72bf9 Merge "disp: msm: dsi: handle case where panel sends more bytes than requested" 2023-05-08 11:44:03 -07:00
qctecmdr
2368cac3d8 Merge "disp: msm: dsi: Send Qsync commands asynchronously to avoid frame drops" 2023-05-08 11:44:03 -07:00
qctecmdr
a0eb3b7090 Merge "disp: msm: sde: propagate the error code in dual display TUI cases" 2023-05-07 22:46:00 -07:00
Saurabh Yadav
8f73dc7e9d disp: msm: sde: fix out of bounds memory access
Change-Id: I74324fc1032086ac4362a059a9f76a6dcdc19193
Signed-off-by: Saurabh Yadav <quic_sauyad@quicinc.com>
2023-05-05 00:09:17 -07:00
Srihitha Tangudu
ddb854d52d disp: msm: dsi: add new function to cleanup post command transfer
Currently we are always doing command transfer cleanup which includes
disabling command engine, clocks, gdsc and unmasking overflow interrupt
as part of post command transfer function only after CMD DMA wait is
done. Cleanup should also be done if an ESD failure happens before
kickoff of a batch command. Organize code so that command transfer
cleanup can be done irrespective of whether command kickoff is done
or not.

Change-Id: Ieb92daa7f5da62c16c71f1b23ceff20adfbf3621
Signed-off-by: Srihitha Tangudu <quic_tangudu@quicinc.com>
2023-05-04 10:36:44 -07:00
Srihitha Tangudu
47eb93ed08 disp: msm: dsi: handle case where panel sends more bytes than requested
Reset number of bytes read from panel to the expected value when panel
sends more bytes than requested during DSI read. This can otherwise lead
to negative value of repeated bytes and array out of bounds access.

Change-Id: I9310c521a862108940142ba7c1a8c39838be0f79
Signed-off-by: Srihitha Tangudu <quic_tangudu@quicinc.com>
2023-05-04 10:33:45 -07:00
Ayushi Makhija
5ba1ca1738 disp: msm: dsi: Send Qsync commands asynchronously to avoid frame drops
Qsync ON/OFF commands have to be sent to the panel before connector
kickoff and sending them in the commit thread blocks it for few
millliseconds, and can lead to frame drops. Avoid this by sending
them asyncronously.

Change-Id: Ia7bc694871faf02b7c1a068b3d0ee7056c272506
Signed-off-by: Ayushi Makhija <quic_amakhija@quicinc.com>
2023-05-02 23:12:40 -07:00
qctecmdr
8ef80f7cf4 Merge "disp: msm: dsi: Fix DSI lane swapping" 2023-04-29 23:02:10 -07:00
qctecmdr
f993f4d8e0 Merge "disp: msm: sde: program INTF VSYNC src_en bits for vsync TS" 2023-04-28 00:59:51 -07:00
Raviteja Tamatam
26c011089e disp: msm: sde: propagate the error code in dual display TUI cases
Propagate error in case the number of active displays is greater
than 1, in dual display scenario to fail the validate.

Change-Id: I04250af8d7a6b0c290132abbaed2ed8e5e311a4f
Signed-off-by: Raviteja Tamatam <quic_travitej@quicinc.com>
2023-04-26 12:01:53 -07:00
Veera Sundaram Sankaran
a599814880 disp: msm: sde: program INTF VSYNC src_en bits for vsync TS
From MSSS 10.x, the src_en bits needs to be set appropriately for
vid/cmd mode for getting the vsync timestamp. Program it based
on the new feature flag SDE_INTF_VSYNC_TS_SRC_EN.

Change-Id: Ia9c59d66afb436f082c7ebe6bf28e3953fde27a5
Signed-off-by: Veera Sundaram Sankaran <quic_veeras@quicinc.com>
2023-04-25 11:51:02 -07:00
Rohith Iyer
f59a9af17c disp: msm: dsi: Fix DSI lane swapping
Replaced lane swap register for lane swap in DSI controller.
Added check for where to perform lane swap based on DSI controller
version. Replaced function to parse device tree data for lane swap,
as previous function did not work.

Change-Id: I5e50a761b6ac0d2658ba73a5648e2f80f3470b96
Signed-off-by: Rohith Iyer <quic_rohiiyer@quicinc.com>
2023-04-25 10:36:23 -07:00
Nilaan Gunabalachandran
c6bdb5db3a disp: msm: sde: avoid concurrency while calculating max mode width
With DP plug-ins, it is possible for the connector fill modes API
to be called to update available modes on the connector and at the
same time have the commit thread calculate the max mode width
on the available modes. As a result, it is possible to access
pruned modes from the modelist.

This change moves the calculation into the fill modes call-flow,
so that the max mode width is determined once, and stored to be
used during virt enable.

Change-Id: I6c332c57e6e98ed98444a303add97d163a2031bf
Signed-off-by: Nilaan Gunabalachandran <quic_ngunabal@quicinc.com>
2023-04-25 12:39:05 -04:00
Grace An
612cf09d0f disp: msm: sde: add hw-fence QOS priority config
This change updates the hw-fence QOS priority level.

Change-Id: I61e832f15d060cd563986dbd7135c00fce9dd5c9
Signed-off-by: Christina Oliveira <quic_coliveir@quicinc.com>
Signed-off-by: Grace An <quic_gracan@quicinc.com>
2023-04-25 09:18:22 -07:00
Nilaan Gunabalachandran
825dd16313 disp: msm: sde: correct llcc_slice_getd/putd usage
The llcc_slice_getd/putd APIs were previously used to get/put the
slice descriptor reference, for every time the driver needed the
descriptor. However, the APIs should be used to get the reference
once, and only put after completing usage of the slice
(ie. if the slice is still active, the descriptor cannot be putd).

This change corrects the usage of the llcc_slice_getd/putd APIs by
storing the descriptor after initialization.

Change-Id: I33e6448290ff7a4d8bfa72e1e6bc8ca133283e12
Signed-off-by: Nilaan Gunabalachandran <quic_ngunabal@quicinc.com>
2023-04-24 16:46:38 -04:00
Rajkumar Subbiah
8722b154e7 disp: msm: dp: fix unused label for kalama compilation
This change fixes the unused label warning, when compiling
this driver for kalama, introduced by change
I383680c54feb826676965282e76bb3e5c3e17c4c.

Change-Id: Ia7c51fd1956b847220ebeae29a51edcc9f4dbf7e
Signed-off-by: Rajkumar Subbiah <quic_rsubbia@quicinc.com>
2023-04-20 18:18:22 -07:00
Veera Sundaram Sankaran
336212e10a Revert "disp: msm: sde: enable EPT_FPS feature for cmd mode in pineapple target"
This reverts commit ae24e846e1.
Enable the feature only when user-mode support is added. With this
feature enabled in driver, it expects EPT_FPS to be set for qsync
enabled cmd-mode panels and will not honor EPT(expected present time).
With the EPT_FPS feature disabled, all panels cmd/video with/without
qsync can use EPT.

Change-Id: Ib8b1625bb1927ece3ec435e4b9a724da0555e518
Signed-off-by: Veera Sundaram Sankaran <quic_veeras@quicinc.com>
2023-04-19 22:08:50 -07:00
qctecmdr
8dcfe0cb6b Merge "disp: msm: dp: catch and propagate slot allocation failures" 2023-04-19 14:34:14 -07:00
qctecmdr
a6e0f3a73d Merge "disp: msm: dp: log an error when connector has no modes" 2023-04-19 14:34:14 -07:00
qctecmdr
337c29b341 Merge "disp: msm: dp: fix messaging on dp mode validation failure" 2023-04-19 14:34:14 -07:00
qctecmdr
a5b7dc6eb9 Merge "disp: msm: sde: reset dsc 4hs merge enable" 2023-04-19 14:34:14 -07:00
qctecmdr
92bc0435a0 Merge "disp: msm: dp: fix aux error handling" 2023-04-19 14:34:14 -07:00
qctecmdr
c8692b921b Merge "disp: msm: dp: Update vcpi start slot for MST single port plug/unplug" 2023-04-19 14:34:14 -07:00
qctecmdr
a5dd993196 Merge "disp: msm: sde: remove EPT & QSYNC dependency" 2023-04-17 17:42:31 -07:00
Nisarg Bhavsar
902ac9549a disp: msm: dp: Update vcpi start slot for MST single port plug/unplug
Update vcpi start slot for other connectors when an individual connector is unplugged.
Currently the driver is caching the previous start slot and doing the adjustment
in a single pass. When the connectors are removed and added in a specific order,
it is possible that the list of payloads are not sorted by start_slot and the
removed payload is not the first payload in the list.
The current logic does not support this case and will leave the start_slot of
the first payload unadjusted thereby resulting in an invalid slot allocation.

This change does the caching and adjustment in two separate passes to make sure
the start slot adjustment happens irrespective of the order of the payloads.

Change-Id: I5ca7ded263740590b0fe3cc31c8d67441a42c92f
Signed-off-by: Nisarg Bhavsar <quic_bhavsar@quicinc.com>
2023-04-17 14:00:19 -07:00
qctecmdr
2e5aa28b7a Merge "disp: msm: dsi: add support for dual display with shared dsi" 2023-04-15 20:49:21 -07:00
qctecmdr
d7785cad31 Merge "disp: msm: dsi: register clk cb in display prepare" 2023-04-15 20:49:21 -07:00
qctecmdr
c8f2760a56 Merge "disp: msm: dp: check for atomic phase" 2023-04-14 17:44:24 -07:00
Soutrik Mukhopadhyay
05863e8521 disp: msm: dp: check for atomic phase
This change checks for the atomic state and ensures
that allocation and deallocation of vcpi slots is
prevented in the same phase.

Change-Id: I05c87db43eca8ba749ed8a0907dcaf95945dd645
Signed-off-by: Soutrik Mukhopadhyay <quic_mukhopad@quicinc.com>
2023-04-14 15:42:52 -07:00
qctecmdr
a0c954eea2 Merge "disp: msm: sde: add debugfs node to get current uidle status" 2023-04-14 13:12:08 -07:00
qctecmdr
2ccae39402 Merge "disp: msm: sde: program both rc config and ram through lut dma" 2023-04-14 13:12:08 -07:00
qctecmdr
1d9d243a82 Merge "disp: msm: sde: flush pp event work queue before vm release" 2023-04-14 13:12:08 -07:00
Nilaan Gunabalachandran
6962242207 disp: msm: sde: reset dsc 4hs merge enable
If DSC 4hs merge is enabled and disabled on n+1 commit, possible
due to resolution switch, driver does not currently clear the
previous programming.

This change cleares dsc 4hs merge enable if it is not enabled.

Change-Id: I4024073362257b7efabcff22603bcb28a0bc4c5a
Signed-off-by: Nilaan Gunabalachandran <quic_ngunabal@quicinc.com>
Signed-off-by: Nisarg Bhavsar <quic_bhavsar@quicinc.com>
2023-04-14 12:02:19 -07:00
Lei Chen
8ed479026a disp: msm: sde: add debugfs node to get current uidle status
Add a read only debugfs node to get current uidle status.
Usage:
      cat /sys/kernel/debug/dri/0/debug/core_perf/uidle_status
       N: indicate uidle is disabled.
       Y: indicate uidle is enabled.

Change-Id: I7f28b406588c19decc4efc9012f5bac63925618a
Signed-off-by: Lei Chen <quic_chenlei@quicinc.com>
2023-04-14 09:49:37 -07:00
Saurabh Yadav
c27d7c56ce disp: msm: sde: program both rc config and ram through lut dma
Currently, only rc ram is programmed through lut dma and
rc config is programmed through ahb.
This change programs both rc config and rc ram through lut dma.

Change-Id: I50a6e87dfbadb9c4a93cebdaa1e813f5be9ba5f5
Signed-off-by: Saurabh Yadav <quic_sauyad@quicinc.com>
2023-04-14 09:48:43 -07:00
qctecmdr
90ba54e04b Merge "disp: msm: sde: defer S2-only and tvm dma_buf_map_attachment" 2023-04-14 04:33:12 -07:00
qctecmdr
5bf05d0f69 Merge "disp: msm: dp: avoid using freed panel for dp mst" 2023-04-14 04:33:12 -07:00
qctecmdr
dc5a69d265 Merge "disp: msm: sde: check for hardware ownership before histogram read" 2023-04-13 23:29:59 -07:00
qctecmdr
d6553c5775 Merge "disp: msm: dp: turn off aux switch on dp cable disconnect" 2023-04-13 23:29:59 -07:00
qctecmdr
d82440542e Merge "disp: msm: dp: stop forcing max bpp to 24 for MST" 2023-04-13 23:29:58 -07:00
qctecmdr
fc31a42052 Merge "disp: msm: dp: limit mode clock for MST" 2023-04-13 23:29:58 -07:00
Ritesh Kumar
5fa719d990 disp: msm: dsi: add support for dual display with shared dsi
In dual display configuration, where only one display is active at a time,
dsi0 and dsi1 can be used to drive primary large display and, one of the
dsi (dsi0 or dsi1) can be used to drive secondary display. This helps to
time division multiplex shared DSI for primary and secondary panel which
solves the bandwidth limitation problem. This change adds support to allow
sharing of dsi ctrl and phy between dual displays.

Change-Id: Ib4ed1bf51f587b544ec24b1b558ff83225b36e4b
Signed-off-by: Ritesh Kumar <quic_riteshk@quicinc.com>
2023-04-13 11:13:44 +05:30
Veera Sundaram Sankaran
62b643a4d6 disp: msm: sde: remove EPT & QSYNC dependency
Expose Expected Present Time property to usermode immaterial of the
panel qsync support. EPT can be used to delay the frame with/without
qsync support.

Change-Id: If4e628dda64181995ba9ba0b008d15d3d9a9cfd4
Signed-off-by: Veera Sundaram Sankaran <quic_veeras@quicinc.com>
2023-04-12 18:28:51 -07:00
Rajkumar Subbiah
6d55e0b68e disp: msm: dp: fix messaging on dp mode validation failure
Updated the log message on a LM check failure during mode validation
to print the correct available LM value that is being used in the
check.

Change-Id: Ie719dead04bacee70d44e30c0069ce9099a69570
Signed-off-by: Rajkumar Subbiah <quic_rsubbia@quicinc.com>
2023-04-12 14:40:31 -07:00
Rajkumar Subbiah
d29268e7e1 disp: msm: dp: catch and propagate slot allocation failures
During atomic check for MST plugins, the driver is not catching and
propagating failures properly thereby incorrectly returning a
success even though the slot allocation had failed. This causes
invalid access of payload data in the MST topology manager.

This change checks the return code for slot allocation and atomic
check calls and propagates them to caller.

Change-Id: I383680c54feb826676965282e76bb3e5c3e17c4c
Signed-off-by: Rajkumar Subbiah <quic_rsubbia@quicinc.com>
2023-04-12 14:24:04 -07:00
Anand Tarakh
d83f4c93b2 disp: msm: dsi: register clk cb in display prepare
The clk_ctrl_cb and post_cmd_tx_workq callbacks are assigned
to individual ctrl during display bind. In case of dual display
with shared DSI, where primary display has ctrl0 & ctrl1 and
secondary display has ctrl1, the callbacks of ctrl1 of the
primary display gets overwritten with the callbacks of ctrl1
of the secondary display.

In the shared DSI design, only one display will be active at
a time. So, move the callback assignment of clk_ctrl_cb and
post_cmd_tx_workq to display prepare to fix this.

Change-Id: Ic02fa2f00c430fd5759400e06d82d004d4f7cba4
Signed-off-by: Anand Tarakh <quic_atarakh@quicinc.com>
2023-04-12 14:09:18 +05:30