Commit Graph

139 Commits

Author SHA1 Message Date
qctecmdr
34e547a74b Merge "asoc: lpass-cdc: reset TX datapath during path teardown" 2022-11-22 07:03:43 -08:00
Phani Kumar Uppalapati
5555970830 audio-kernel: fix compilation issues for pineapple target
Fix compilation issues in audio-kernel for pineapple target.

Change-Id: I93fa4fb670989f82139dd2cd0dbe57b52ad52504
Signed-off-by: Phani Kumar Uppalapati <quic_phaniu@quicinc.com>
2022-11-18 11:58:44 -08:00
Meng Wang
5938e32aac asoc: lpass-cdc: reset TX datapath during path teardown
When switching from 16KHz to 48KHz recording, mute issue happens.
Addd TX datapath reset during path teardown to resolve this issue.

Change-Id: I7445b397c20ce4e4968fec2326267f63dcba5a8c
Signed-off-by: Meng Wang <quic_mengw@quicinc.com>
2022-10-28 02:35:16 -07:00
Yuhui Zhao
19b039aa73 asoc: add config files to support pineapple target
add pineapple config file to all drivers:
Kbuild, including soc/dsp/ipc

Change-Id: I2357c7c96739bd42cb8764753d2a4fd5dd1c9634
Signed-off-by: Prasad Kumpatla <quic_pkumpatl@quicinc.com>
2022-10-07 11:24:42 +05:30
Yuhui Zhao
1dacaf014f audio-kernel: Compilation fixes with "Break" and "fallthrough"
Compilation fixes with "Break" and "fallthrough".

Change-Id: Ica05d0410efc5e9dc52addcf4cd8c0253f49fada
2022-10-06 22:40:29 -07:00
Ganapathiraju Sarath Varma
8280a19ab8 asoc: lpass-cdc: Handle pbr clk based with its ref cnt.
Disable the common pbr clk register only when no one uses
RX0 and RX1 channels.

Change-Id: Ia5fab1d3e4be7d9ecb01ad0b612b9f6ef7406bea
Signed-off-by: Ganapathiraju Sarath Varma <quic_ganavarm@quicinc.com>
2022-09-13 10:55:09 -07:00
Ganapathiraju Sarath Varma
3533e47a4d ASoC: lpass_cdc: Disable va_swr gpio on clk failure
During SSR down event,
ensure swr gpios are put to sleep even in error conditions.

Change-Id: I649d088d0bc429c9b7a02304272eaea06774ca51
Signed-off-by: Ganapathiraju Sarath Varma <quic_ganavarm@quicinc.com>
2022-08-15 21:49:40 -07:00
Ganapathiraju Sarath Varma
dd683bb7fd asoc: lpass_cdc: Enable lpass cdc clk as per sequence
Enable the clk as per sequence.

Change-Id: I54d6981a70b218d4655514bb69ff39a7581264a2
Signed-off-by: Ganapathiraju Sarath Varma <quic_ganavarm@quicinc.com>
2022-08-10 14:11:37 +05:30
qctecmdr
290f69973e Merge "asoc: lpass: add pm stay awake to avoid suspend" 2022-07-20 23:00:34 -07:00
Ganapathiraju Sarath Varma
c7d5b69be6 asoc: update out of bound check for comp_mode.
updated the out of bound check for comp_mode
if any such occurence happens setting it to default mode.

Change-Id: Ie4a7275d45af6a96f1a2ec4b6ece6dc7a5dca464
Signed-off-by: Ganapathiraju Sarath Varma <quic_ganavarm@quicinc.com>
2022-07-20 12:54:13 +05:30
Prasad Kumpatla
32f0f8d96d asoc: lpass: add pm stay awake to avoid suspend
add pm stay awake before the queue delayed work to avoid the when apps suspend.

Change-Id: Iad4d55d509e800b352ac7cb8afb0824a89c80c40
Signed-off-by: Prasad Kumpatla <quic_pkumpatl@quicinc.com>
2022-07-17 18:33:21 +05:30
qctecmdr
dd26499468 Merge "lpass-cdc: apply digital unmute after PA is enabled" 2022-07-12 16:14:47 -07:00
Phani Kumar Uppalapati
35ae7a451e lpass-cdc: apply digital unmute after PA is enabled
Unmute digital volume after analog PA is enabled to reduce
pop issues.

Change-Id: Iae4a5b6df3c258e1ab9976bb0a47946c5a681b08
2022-07-11 04:25:26 -07:00
Vangala, Amarnath
e275af3979 asoc: lpass-cdc: fix the vi enable sequence
Enable the VI decimator at the end of Rx and VI enable sequence.

Change-Id: I12045c903b29d4cc830dbbfd242d805a629c0efd
Signed-off-by: Vangala, Amarnath <quic_avangala@quicinc.com>
2022-07-11 16:53:48 +05:30
Ganapathiraju Sarath Varma
e74b2a8eb5 asoc : codec : update audio path and ch_msk for VI.
Update ch_msk and audio path for VI feedback path
in lpass_wsa2 macro.

Change-Id: Ibc96fc1ad82e2e996b11af20522f35e47b94d8f0
Signed-off-by: Ganapathiraju Sarath Varma <quic_ganavarm@quicinc.com>
2022-06-30 00:01:28 +05:30
Phani Kumar Uppalapati
3b4d649430 asoc: Use VA_CORE_CLK for SVA use-cases
Use VA_CORE_CLK without LPI Enable Mixer control
for SVA use-cases on Kalama target.

Change-Id: I0ca66b786691ab3550b6cbc4ad418f2b536c58f4
2022-06-12 13:05:29 -07:00
Prasad Kumpatla
3aa51212be asoc: lpass-cdc: fix for array out-of-bound
add fix for arry out-of-bound.

Change-Id: Ib73c41f4f9b14f21143d88b4d768285a674e5f65
Signed-off-by: Prasad Kumpatla <quic_pkumpatl@quicinc.com>
2022-06-06 11:38:52 -07:00
Ganapathiraju Sarath Varma
ddd5081752 asoc: codec: update wsa2 with wsa bat_cnfg,sys_gain,rloads.
- update wsa2 macro with wsa bat_cnfg, sys_gain,
  rloads dt cnfg.

Change-Id: Idb579b460949a61579e8e27b8f0a4f911c271090
2022-05-23 22:09:58 +05:30
Meng Wang
14b172d92c asoc: lpass-cdc: update logic to vote during ssr
After ADSP is up during SSR, core_hw_vote may fail and audio_hw_vote
may successed in lpass_cdc_runtime_resume which is caused some timing.
When getting slave device_id, as core_hw_vote is 0, it will skip reading
swr registers and return 0 which causes fail to read correct device_id.
Make this change to avoid calling lpass_cdc_runtime_resume when adsp_up
notification doesn't reach lpass_cdc.

Change-Id: I90a97e5c47bb95180a96ba1c60b462f1fa0124b7
Signed-off-by: Meng Wang <quic_mengw@quicinc.com>
Signed-off-by: Kunlei Zhang <quic_kunleiz@quicinc.com>
2022-05-17 17:33:04 +08:00
qctecmdr
2205759439 Merge "asoc: codecs: Update WSA2 Macro to Match WSA Macro" 2022-05-16 16:12:55 -07:00
qctecmdr
401747d67f Merge "asoc: codecs: support for cps soundwire port" 2022-05-16 16:12:55 -07:00
qctecmdr
62975d84b8 Merge "asoc: codes: Update WSA Macro compander dly to 7" 2022-05-16 15:31:02 -07:00
qctecmdr
8ee1e5960e Merge "asoc: update digital_cdc_rsc_mgr_hw_vote API" 2022-05-16 14:01:02 -07:00
Vangala, Amarnath
9a5deb8cc6 asoc: codecs: support for cps soundwire port
Implement backend for CPS soundwire port in Bolero.

Change-Id: Ibbd38d067e46be1a71723de04a83bc83f0ec2925
Signed-off-by: Vangala, Amarnath <quic_avangala@quicinc.com>
2022-05-12 21:38:25 +05:30
Matthew Rice
c3cddd0b43 asoc: codecs: Update WSA2 Macro to Match WSA Macro
Propagate all changes to lpass-cdc-wsa-macro to
lpass-cdc-wsa2-macro. Leave get_channel_map alone
because it is wsa macro specific.

Change-Id: I46733a759490d488f46eda24b4006a1dec63c7cc
Signed-off-by: Matthew Rice <quic_mrice@quicinc.com>
2022-05-10 14:11:40 -07:00
Prasad Kumpatla
c9930cc8d8 asoc: lpass-cdc: fix for array out of bounds for active ch mask and ch_cnt
update check not to exceed the array index for active_ch_mask and active_ch_cnt

Change-Id: Ic6d72d7469edbd004cd34a709384d527e90cd26f
Signed-off-by: Prasad Kumpatla <quic_pkumpatl@quicinc.com>
2022-05-09 10:26:33 +05:30
Meng Wang
95c95b2d67 asoc: update digital_cdc_rsc_mgr_hw_vote API
Update digital_cdc_rsc_mgr_hw_vote_enable/disable API with device
info for easy debug. Also, add swrm clock enable checks during SSR.
When SSR happens, swrm->hw_core_clk_en and swrm->aud_core_clk_en will
be reset without resetting audio_vote and core_vote clk. This would
cause clk mismatch in audio driver and adsp and device fails suspending
when there's no audio usecase. Make this change to reset audio_vote
and core_vote clk when receiving SWR_DEVICE_SSR_DOWN.

Change-Id: I9875aac9f6faf8b6481457a70f31b005073369e0
Signed-off-by: Meng Wang <quic_mengw@quicinc.com>
2022-05-06 10:50:36 -07:00
Matthew Rice
68469d7946 asoc: codecs: Shorten IDLE holdoff time
Decrease idle holdoff time from 60 to 29 samples as per updated
documentation.

Change-Id: Ia8786020d6de8320f057f418e743507030c734c8
Signed-off-by: Matthew Rice <quic_mrice@quicinc.com>
2022-05-06 10:41:28 -07:00
Matthew Rice
8027610611 asoc: codes: Update WSA Macro compander dly to 7
New requirement to update compander_ctl7 again_delay
field to 7.

Change-Id: I4c5ef15c645cabded50203bf92facbe7c8ff8c5b
Signed-off-by: Matthew Rice <quic_mrice@quicinc.com>
2022-05-06 10:35:02 -07:00
qctecmdr
a6c0e859aa Merge "asoc: codecs: Change WSA SPKRRECV control to bool" 2022-05-03 13:03:17 -07:00
qctecmdr
86e51fdfde Merge "asoc: codecs: Fix PBR Battery stack settings" 2022-05-02 20:11:51 -07:00
Matthew Rice
c117389d88 asoc: codecs: Change WSA SPKRRECV control to bool
Update from SOC_ENUM to SOC_SINGLE to match rest of driver
implementation. Also remove remaining dev_mode enum references
in wsa884x driver.

Change-Id: I2a477c4fa8c29373ffa1e8e2eb599a0f1c61653d
Signed-off-by: Matthew Rice <quic_mrice@quicinc.com>
2022-04-27 10:52:03 -07:00
Matthew Rice
0642af910a asoc: codecs: Update types of dmic_clk_enable call
Match datatypes of variables in
lpass_cdc_va_macro_enabl_dmic() with
lpass_cdc_dmic_clk_enable() to prevent CFI issues.

Change-Id: Id378476b1aa6231c8542ca754124716af2b1f50b
Signed-off-by: Matthew Rice <quic_mrice@quicinc.com>
2022-04-18 13:41:11 -07:00
Matthew Rice
f2b4941541 asoc: codecs: Fix PBR Battery stack settings
Update PBR battery stack register settings to write battery stack - 1
Fix register masks to reference correct bit fields.

Change-Id: I20ca099e7180b8d75dfd6ef93d8502500d53b9b7
Signed-off-by: Matthew Rice <quic_mrice@quicinc.com>
2022-04-18 09:28:00 -07:00
qctecmdr
be2f9dada8 Merge "asoc: codecs: Replace dev_err/info with ratelimit prints" 2022-04-14 16:25:40 -07:00
qctecmdr
79f878ecf9 Merge "asoc: codecs: Update clk_div_get returned type" 2022-04-14 13:01:35 -07:00
qctecmdr
b9e34f47d5 Merge "asoc: lpass: add lpass cdc register" 2022-04-14 12:33:43 -07:00
Shazmaan Ali
a20e11e0c3 asoc: codecs: Replace dev_err/info with ratelimit prints
replace all dev(pr)_err/info logs
that could potentially flood kernel logs with
ratelimit functions dev_err_ratelimited and
dev_info_ratelimited

Change-Id: I32dc6002dead1a07622978c4de63d541c01982fd
Signed-off-by: Shazmaan Ali <quic_shazmaan@quicinc.com>
2022-04-13 12:43:20 -07:00
Shazmaan Ali
aa3950aed3 asoc: codecs: remove idle detect thr func (NG)
idle detect thr is a fixed value, do not need to change
Add debug statements in idle detect control func

Change-Id: I68a049f8560a1a444c019df2dc09f7cf62b37d46
Signed-off-by: Shazmaan Ali <quic_shazmaan@quicinc.com>
2022-04-12 13:25:38 -07:00
Shazmaan Ali
7f29f390e1 asoc: codecs: error fix for soc_component_read_no_lock
the offset between LPASS_CDC_WSA_RX_INP_MUX_RX_INT0_CFG1 and
LPASS_CDC_WSA_RX_INP_MUX_RX_INT1_CFG1 is 8 so updating
0x104 + 8* interp
update ng block register write for NG2 mode in Kundu

Change-Id: I44da894feebb5d25bd467ffd4d54adde111778e6
Signed-off-by: Shazmaan Ali <quic_shazmaan@quicinc.com>
2022-04-12 01:26:35 -07:00
Shazmaan Ali
572fd25838 asoc: codecs: Add Idle detect source select condition
Use LEGACY source if any of the below use cases is met:
EAR, PBR OFF, IDLE, NG2 and PA GAIN <= 13.5dB
Use PRE-LA when: All other cases

Change-Id: Iace0c1f6fea367a73cd604b958bd5c8905d29509
Signed-off-by: Shazmaan Ali <quic_shazmaan@quicinc.com>
2022-04-11 07:04:48 -07:00
Matthew Rice
dfab7cf682 asoc: codecs: Update clk_div_get returned type
Cast returned u16 value to int in VA/TX macro: clk_div_get
to avoid possible data type warnings seen in function
caller.

Change-Id: I08943a26294ce54a207b739867292c01d090623e
Signed-off-by: Matthew Rice <quic_mrice@quicinc.com>
2022-04-11 06:59:32 -07:00
Prasad Kumpatla
6dead69b1f asoc: lpass: add lpass cdc register
add lpass cdc va register VAD_MUX.

Change-Id: I8dcad5f7edcefdac358be7a6d1b0c7fa3ca5c7ba
Signed-off-by: Prasad Kumpatla <quic_pkumpatl@quicinc.com>
2022-04-08 02:17:59 -07:00
qctecmdr
dde20c8484 Merge "asoc: codecs: Change LPASS DRE to use WSA sys_gain and bat_cfg" 2022-04-07 11:06:22 -07:00
Matthew Rice
f97140fce0 asoc: codecs: Change LPASS DRE to use WSA sys_gain and bat_cfg
Can now set these registers during init once these values are
acquired.
Method called again before playback in case there are
speaker/recv changes.

Change-Id: I1b544633a660e98acadf94b9589b7656edebdd56
Signed-off-by: Matthew Rice <quic_mrice@quicinc.com>
2022-03-31 12:35:56 -07:00
Matthew Rice
5be0a8ab7d asoc: codecs: Fix lpass_cdc_dmic_clk_div arg type
Update mode argument type from int to u32 to avoid
any potential data loss since input is also u32 type.

Change-Id: I9541a7da20d2a22a0066622736268adffde5adbf
Signed-off-by: Matthew Rice <quic_mrice@quicinc.com>
2022-03-31 12:35:00 -07:00
Matthew Rice
f5d8dd3262 asoc: codecs: Add RX 6,7,8 to WSA Macro
Add new lpass RX paths. Needed to fix
WSA ADIE Loopback.
Update DAPM enum length to include these RXs.

Change-Id: Ie174cfab20b8beb103eefa94636e76ad756c7345
Signed-off-by: Matthew Rice <quic_mrice@quicinc.com>
2022-03-24 22:24:35 -07:00
Shazmaan Ali
b62c934b61 asoc: codecs: Resolve checkpatch errors
Change-Id: I33dca97f388b524c7476e0da0ea8b1cbca4b849c
Signed-off-by: Shazmaan Ali <quic_shazmaan@quicinc.com>
2022-03-15 02:39:22 -07:00
Matthew Rice
9d7405ec04 asoc: codecs: Fix Bolero and WSA out-of-range variables
Found potential issues relating to uninitialized or out-of-bounds variables
present in codec drivers. Place checks to ensure proper ranges are used.

Change-Id: Ib68cba2413788a57237f1f18fc5ce5fb5c6bfb0a
Signed-off-by: Matthew Rice <quic_mrice@quicinc.com>
2022-03-02 22:02:03 -08:00
Phani Kumar Uppalapati
2b5f3e4778 va-macro: Use DT property for selecting the clock ID
Use device tree property "qcom,use-clk-id" for selecting
the clock ID for VA Macro operation.

Change-Id: I759c690ab7f6dc7ca023d5954e9b445a7b91b1b6
2022-02-28 00:18:39 -08:00