To simulate bus overflow recovery in camera, cpas needs sysfs
to take input from shell and vote the final value as given,
instead of consolidated values from cpas clients. Add initial
support for sysfs to add nodes for all drivers. Add sysfs
based debug node to maintain and update all settings. Add cpas
settings to override final bw voted to camnoc and mnoc ports.
Usage:
adb shell "echo <driver_name>#<setting_name>=<value>
> /sys/devices/platform/soc/soc:qcom,cam-req-mgr/debug_node"
Example:i
adb shell "echo cpas#camnoc_bw=100
> /sys/devices/platform/soc/soc:qcom,cam-req-mgr/debug_node"
Input format for updating settings is strict.
CRs-Fixed: 2646825
Change-Id: I8d6063240f9685474bf4b2899e8dfb3f74cbdb75
Signed-off-by: Mukund Madhusudan Atre <matre@codeaurora.org>
Do not compile camera sources for VM image for lahaina.
Guard the source path against CONFIG_QTI_VM to decide to
compile it are not.
CRs-Fixed: 2663712
Change-Id: I4a624cf8d9824b545c8fb70c134a3b7011c4d2ca
Signed-off-by: Vishalsingh Hajeri <vhajeri@codeaurora.org>
Static variables are initialized only once and the compiler
persists with the variable till the end of the program hence
declaring some of the varaibles in header files as static.
CRs-Fixed: 2663712
Change-Id: I55265f5ac1d144ae5b5c62a9984c08d242be157d
Signed-off-by: Vishalsingh Hajeri <vhajeri@codeaurora.org>
Secure CP control register always assume that it contains 7 bit
mask for each PHY. But this register format is different based on
target. Update secure CP control bitmask generation logic for each
PHY index based on phy_version.
So we have below 3 combinations to handle at SW.
1.Old Titan Targets : 7 bits for each PHY.
2.PHY 1_2_1 : for 4 pHYS 7 bits and for
remaining 2 PHYs 8 bits are reserved.
3.Mimas (PHY 2_0_1): 8 bits for each PHY.
CRs-Fixed: 2624698
Change-Id: Iac4c3c718fc96a51592e07b45458fb045c52366d
Signed-off-by: Anil Kumar Kanakanti <akanakan@codeaurora.org>
Auto clock gating was disabled to aid in certain debug scenarios.
However, for normal operation the expectation is for auto clock
gating to be enabled. The writes could be removed as enabled is the
default, but no harm in being explicit.
CRs-Fixed: 2584631
Change-Id: I63336d12b94f270c4962281e14e879a6207ea386
Signed-off-by: Fernando Pacheco <fpacheco@codeaurora.org>
There is a possibility that the priority variable would be
accessed even for the HEAD node which would result in
out of bound errors, so access the elements of the
structure only if the handler is found.
CRs-Fixed: 2646173
Change-Id: I0540658b9c9487f6e3a4601a488a1add1e790dda
Signed-off-by: Tejas Prajapati <tpraja@codeaurora.org>
For some cpas clients like csiphy, cci voting is applied and
removed during their respective start and stop flow. Such
clients do no call for vote update explicitly.
For such cases, camnoc axi ports were not updated. This can
result in camnoc_sf vote to be present.
This commit updates the camnoc ports as well for the clients
for who the voting is applied and removed during the start and
stop only.
CRs-Fixed: 2571273
Change-Id: I2997e5abad904532dc0d582edbf6d6078ac732d7
Signed-off-by: Gaurav Jindal <gjindal@codeaurora.org>
For link with maximum pipeline delay of 1 e.g.,
TPG use case or sensors with pipeline delay of 1,
if the request is not submitted before 2
consecutive triggers we do not get chance to
increment rd idx, in the mean time the slot which
was last applied will be reset and we will not be
able to apply request even if new requests are scheduled.
This will cause the camera to not apply any request
further, hence increasing the rd idx if no lower pd
devices are pending will fix the issue.
CRs-Fixed: 2622845
Change-Id: I012e242c7fca22abecc171ef4d7063d851bb5748
Signed-off-by: Tejas Prajapati <tpraja@codeaurora.org>
For lagoon, few changes in CSID and IFE to handle the
dual vfe sync and halt.
For CSID, while handling the halt, external and internal
core configuration is changed.
For VFE, 3 IFE support is possible with the combinations:
0-1, 1-2, 0-2. This requires changes in dual vfe sync handling.
Also, CSID and IFE versions are updated.
This commit adds the driver header files for the version and
handles the hardware changes in the driver.
CRs-Fixed: 2571273
Change-Id: I48fd3319692cc1044beb20c278cc2fe5676cb668
Signed-off-by: Gaurav Jindal <gjindal@codeaurora.org>
Signed-off-by: Vishalsingh Hajeri <vhajeri@codeaurora.org>
New usecase for flash driver requires to be trigger at EOF.
This change adds the new operation code support in flash
driver along with EOF enable support in crm and across
other drivers. Also to improve the performance, this change
adds the logic to dynamically update the subscribe event to
CRM, so that CRM can enqueue EOF events when Flash or any other
device add the request for EOF.
CRs-Fixed: 2633194
Change-Id: I2f68ac7fc6a4699debd39b64319728cdf17bbcfa
Signed-off-by: Jigarkumar Zala <jzala@codeaurora.org>
During apply vote axi port name is coming as null. Add
missing axi port name info in cpas layer also for more
descriptive log during apply.
CRs-Fixed: 2584631
Change-Id: Ibf99b542101a39c415157797e36b5605962873cb
Signed-off-by: Mukund Madhusudan Atre <matre@codeaurora.org>
Add trace events for IRQ's on IFE top side and IFE
BUS side in top half. These traces when enabled
will help to gather relative timing information of
the IRQ's with systrace.
CRs-Fixed: 2538876
Change-Id: I856a9df1978f90e260da7c62cadf02fa2fe53202
Signed-off-by: Vishalsingh Hajeri <vhajeri@codeaurora.org>
Signed-off-by: Pavan Kumar Chilamkurthi <pchilamk@codeaurora.org>
Intra-client mask is unused in Bus version 2.0 hardware
and can be removed.
CRs-Fixed: 2641529
Change-Id: I89b3620496995dbef8a6b09718f20a419ccf632c
Signed-off-by: Venkat Chinta <vchinta@codeaurora.org>
This change adds a check for slave core in dual IFE usecases
to avoid subscribing to SOF/EOF/EPOCH IRQs. We can use IRQs
from single core to drive our state machine. Error IRQs must
still be subscribed to as earlier.
CRs-Fixed: 2639855
Change-Id: I6aa6ab5b7e1049cd12f702da560b9b4a6ba9562b
Signed-off-by: Venkat Chinta <vchinta@codeaurora.org>
When sync object is invalid and num_in_map > 1,
it will lead to context ref leak. Check sync
object first, then register sync call back.
CRs-Fixed: 2594185
Change-Id: I2d39ce3ea43bbe7bc05420b86b37fdfba4aa795a
Signed-off-by: Ayush Kumar <ayushkr@codeaurora.org>
Do not unlock frame_req_mutex until the request is added
into processing list after submitting the frame to hw.
This can cause a race condition where Flush comes before
adding the frame into processing list and thinks there
is no frame with HW. And there is a possibility that
FrameDone IRQ thread can get the mutex and thinks no frame
in processing list - causing never to reset the flag
ready_to_process. This will cause all subsequent camera
usage to fail as requests will never be submitted to hw.
CRs-Fixed: 2600443
Change-Id: Icd12e155192fccd9adbc7b774b073ca623f1d7ba
Signed-off-by: Pavan Kumar Chilamkurthi <pchilamk@codeaurora.org>
If enabling soc resources has failed, remove the votes
that were voted for this client.
CRs-Fixed: 2585080
Change-Id: I05f460e93a1bf7b96a99dd32f3fd03dbde5b094f
Signed-off-by: Pavan Kumar Chilamkurthi <pchilamk@codeaurora.org>
crm applied both sensor and isp packets,sensor packet failed to
apply due to CCI timeout error. In the meantime ISP packet applied
and that request of ISP moved to free_list.In the next epoch crm
trying to reapply both the packets of sensor and isp again.In this
case ISP always reporting an apply failure because its pending queue
doesn’t have that request.To handle this we are skipping to re-apply
the ISP successful buf_done request and trying to apply only sensor
packet in this scenario.
CRs-Fixed: 2599186
Change-Id: Id7e72fc016a75782b57f05558c615b069b416ffe
Signed-off-by: Mangalaram ARCHANA <mangar@codeaurora.org>
Do not rely on timer expiry to remove bw of current context
if it is getting released. If context release is coming
before timer expiry (from last request submit), we are not
removing current context's vote from hw mgr and thus
from cpas. This will accumulate the bandwidth and causes
clocks to go to turbo and also into overflow issues if
the bw variables in cpas are wrapping around in long
hours testing.
CRs-Fixed: 2617278
Change-Id: I11d837bf7224ac4573fee32518f7f57ad9bf49f0
Signed-off-by: Pavan Kumar Chilamkurthi <pchilamk@codeaurora.org>
EEPROM Read using QUP I2C returns the number of bytes
read from the EEPROM, While CCI/SPI returns zero value.
Return Error only when if the value is less than zero.
CRs-Fixed: 2617882
External Impact: No
Change-Id: I9a9674366c10de4efce779f75dd36b293838c47b
Signed-off-by: Shankar Ravi <rshankar@codeaurora.org>
Turn off the flash while flushing if the flushed request
turns off the flash.
CRs-Fixed: 2576732
Change-Id: I546fc6b6ee79f492af905d163515eb19eed78f41
Signed-off-by: Depeng Shao <depengs@codeaurora.org>
Currently CRM waits for a single trigger to apply settings
for all the devices on a given link. This change provides
provision for CRM to wait on two triggers prior to applying
a given setting.
CRs-Fixed: 2627065
Change-Id: If6e4c9281cfd1bf1a8ffa369daee060d79f3c39e
Signed-off-by: Karthik Anantha Ram <kartanan@codeaurora.org>
Precise flash needs the data for time on duration from UMD.
Add the attribute to fill in by UMD. Also, updating the Macro
for the max led trigger from 3 to 2 as there are only two
physical LED channel is available.
CRs-Fixed: 2633194
Change-Id: I641e1ab42e59bc251d33a1e1dd0dff83afb5b7fb
Signed-off-by: Jigarkumar Zala <jzala@codeaurora.org>
Creates a function to match expectant types for platform device
comparisons during component registration.
CRs-Fixed: 2584631
Change-Id: Ib07160b8d8f1a370ba535ffdbbc6adbe391c68d5
Signed-off-by: Karthik Jayakumar <kjayakum@codeaurora.org>
During VFE reset we mask all bits apart from reset done. Since
the top level bus write IRQ bit is common to all output ports
it is set during the initialize hardware sequence. However since
initialize hardware is not invoked in start only case that follows
flush, we must set it again.
CRs-Fixed: 2590331
Change-Id: I73f09e552779bd65f472178c1025594be03025fb
Signed-off-by: Venkat Chinta <vchinta@codeaurora.org>
