This change updates the number of TFEs and TFE-LITEs
in the sysfs entry (subparts_info).
CRs-Fixed: 3605161
Change-Id: Iff6e79a7764b14b1f368f215020617f10dbd4bb5
Signed-off-by: Karthik Dillibabu <quic_kard@quicinc.com>
In low memory condition, cam_mem_mgr_init can fail after
cam_mem_mgr_state is set to initialize. Since the state is
initialized, subsequent init call return success without
initializing the mem table. So, when cam_mem_mgr_deinit is
called, writing to tbl.bitmap will cause a null ptr derefernce.
This change fixes this issue by setting cam_mem_state to
uninitialize when cam_mem_mgr_init fails.
CRs-Fixed: 3671639
Change-Id: Ie3554bcbbfe10320e5278650c4dd912edd568a10
Signed-off-by: Shivakumar Malke <quic_smalke@quicinc.com>
(cherry picked from commit c655b11b9c6d413748d339ad735837d868b85976)
This change helps to make sure correct IFE & SFE
acquired on some qultivate devices. For example, if
SFE0 is faulty then IFE1 & SFE1 will be acquired.
CRs-Fixed: 3690457
Change-Id: I4200d283e05ec62c9cef968f35e0bc58f9f85290
Signed-off-by: Karthik Dillibabu <quic_kard@quicinc.com>
Updating correct QOS values for Camera CDM port
based on HW recommendation.
CRs-Fixed: 3546181
Change-Id: I5f1721e03e6e6e6ae7871df2db4f294f0bfd5d28
Signed-off-by: Alok Chauhan <quic_alokc@quicinc.com>
(cherry picked from commit 4fefd334d62305a928349d336df6e3c1492c88b9)
When csid init hw failure is seen due to any reason
dont call disable hw. As part of init hw failure
denint hw gets called and disable hw is taken care.
In case if disable hw is called during init hw,
it disables soc resources and when disable hw
gets called again during deinit hw, will land
into NOC errors while accessing registers with soc
resources disabled.
CRs-Fixed: 3577353
Change-Id: I65e05f748684c5b38852bd52ed51799918cb427f
Signed-off-by: Shravya Samala <quic_shravyas@quicinc.com>
CRM pd tbl dev mask need to be updated on mode switch in Auto SHDR,
so that the mode switch request and subsequent requests or slot should
be in ready state if request is submitted by all expected device
in a link. Also enabled error bit related to shdr mode switch in tfe.
Query dev info from CRM to ISP again on activate link call to know if
usecase is SHDR and to identify master and slave context.
CRs-Fixed: 3555900
Change-Id: Ie3ce093a453cda4bb5a9d8ddd31b4c8d2b2a69ed
Signed-off-by: Ayush Kumar <quic_ayushkr@quicinc.com>
This change fixes issues involving out-of-bounds, uninitialized access and
NULL pointer dereference.
Out-of-bounds access issue was present in cam_tfe_mgr_get_hw_caps_v2 as
address of pointer was passed to copy_to_user instead of the pointer.
Uninitialized data access with query_isp as it was not initialized before
being passed to copy_to_user in cam_tfe_mgr_get_hw_caps.
NULL pointer dereference in cam_tfe_process_cmd as in case of invalid
argument there was an attempt to print the TFE core index.
CRs-Fixed: 3555879
Change-Id: Ib706eea896a04e1d4e9612e4e763b674c4256e77
Signed-off-by: Abhilash Kumar <quic_krabhi@quicinc.com>
For PDAF Clients, userspace can allocate a bigger buffer than
the WM Client configuration, in this case stride of the Client
should be updated properly to get proper data from WM Client.
CRs-Fixed: 3555900
Change-Id: Ie2b369b59a14f19100932d912167537cab266e0d
Signed-off-by: Ayush Kumar <quic_ayushkr@quicinc.com>
For legacy SHDR, report bubble even if request is applied
after SOF so that both master and slave context goes to
bubble state in legacy SHDR or SHDR without SFE target.
CRs-Fixed: 3555900
Change-Id: I64e38d14ba3472fa1d298882d6b09a2f14e0d576
Signed-off-by: Ayush Kumar <quic_ayushkr@quicinc.com>
In Type3 usecase, PDAF ports can come as part of IPP config. This will
cause failure during out pdaf acquire resources.
Handle PDAF ports acquire during this usecase as pdlib resource.
CRs-Fixed: 3546181
Change-Id: I9d42e499c87961f5ceec995245e6b599d6015de7
Signed-off-by: Alok Chauhan <quic_alokc@quicinc.com>
This chages is to support blob to update TFE WM dimensions.
This is required as 3A lib allocates max buffer for pdaf ports
but per request dimension can differ from buffer dimension.
CRs-Fixed: 3546181
Change-Id: I98bffa9ef00a7fa2bb543cb0c89f7920ed6780c5
Signed-off-by: Ayush Kumar <quic_ayushkr@quicinc.com>
This change is added to support buffer alignment for TFE
WM in x and y axis. This change is required in SHDR usecase to
align short exposure frame with long exposure frame.
CRs-Fixed: 3538642
Change-Id: I9a3d35d0884bfbd6f62034b207e5784fdf2f7430
Signed-off-by: Ayush Kumar <quic_ayushkr@quicinc.com>
Handle internal recovery in case of csid and bus overflow.
Handle frame size error detection for pixel and line count
mismatch as fatal errors.
Fixed csid side error reproting to hw_mgr layer.
CRs-Fixed: 3532076
Change-Id: Id4f572caf6774797396d70d7a20a4f54fc1b9ea9
Signed-off-by: Pranav Sanwal <quic_psanwal@quicinc.com>
This commit adds support to disable acquired TFE WM clients if the client
is not configured.
CRs-Fixed: 3531808
Change-Id: Ie3be423dfd2ab35031677563d66fd811090148fe
Signed-off-by: Ayush Kumar <quic_ayushkr@quicinc.com>
This change add support to program dual tfe configurations in
SHDR to create sync between two TFEs. This change is required
if MUP bit is used in SHDR mode.
CRs-Fixed: 3508184
Change-Id: I270f7fd8e3cac1f1e50c5f16e7cba2c5e9c2b74f
Signed-off-by: Ayush Kumar <quic_ayushkr@quicinc.com>
This change is to add support for error inducement in TFE HW.
CRs-Fixed: 3426117
Change-Id: I19a5e095bc84fa88c308640a1d490162698bb45f
Signed-off-by: Ayush Kumar <quic_ayushkr@quicinc.com>
In overlap SHDR, epoch irq from TFE need to configure in such
a way that request should be apply at epoch of shorter exposure frame
before start of the next frame of long exposure to make sure that
new settings should apply properly in time.
CRs-Fixed: 3396382
Change-Id: I1ddc3ce95c6d404a3f76a27cc58083e11b03bace
Signed-off-by: Ayush Kumar <quic_ayushkr@quicinc.com>
This change add support for activate and deactivate ISP device in the
link when dual trigger mode in the link is set.
CRs-Fixed: 3374385
Change-Id: Ib6d25ab295d613fa5cd3edf1780362476920d74d
Signed-off-by: Ayush Kumar <quic_ayushkr@quicinc.com>
