This change ensures that if the dsi clock rate is not specified
in the timing modes, setting clkrate_change_pending is not bypassed.
Change-Id: I2475da1e548f29c68a6a4466c5ef540f7f11d553
Signed-off-by: Satya Rama Aditya Pinapala <psraditya30@codeaurora.org>
The current solution triggers the DMA command and waits till
the command dma done and ISR signals completion. This change
introduces asynchronous wait after a DCS command has been
triggered. Enable this mode only during pre kickoff, so as to not
block commit thread.
Change-Id: Iead7b6328883e844147d47ff68dc878943879553
Signed-off-by: Satya Rama Aditya Pinapala <psraditya30@codeaurora.org>
The pin was configured to input mode when panel on. But
if continuous splash was on, driver will not power on panel
when booting up, the first time panel off, this gpio was
the default mode or the UEFI config mode.
Change-Id: Ib352343848ab38cab828cc10388b366aeac8905d
Signed-off-by: Yuan Zhao <yzhao@codeaurora.org>
1.Typecast to avoid distinct pointer type comparison
2.Keep DMA mask aligned with api definition.
3.Add Suffix for literals
4.Remove multfrac func to avoid uncompatible division.
5.64-bit division( operator "/") on 32-bit platforms is not supported.
Using platform independent API's here
Change-Id: I0e7305418e53876bd1adf00c1963f85cbdf980cc
Signed-off-by: Ravikanth Tuniki <rtunik@codeaurora.org>
Reject composition if any seamless transition such as
VRR, dynclk is requested during power on/off commits.
Change-Id: I731bfc06b3bd1e7ae920c12cbc68f95f5cc01687
Signed-off-by: Kalyan Thota <kalyant@codeaurora.org>
Signed-off-by: Jayaprakash <jmadiset@codeaurora.org>
Length of the buffer to be copied is checked
against both source and destination buffer lengths
before copying. This ensures that there is no
buffer overflow while reading as well as writing.
Change-Id: I4bd1a5892b47771aef4c23a4d1594fc1c8361577
Signed-off-by: Satya Rama Aditya Pinapala <psraditya30@codeaurora.org>
Bypass setting clkrate_change_pending flag if the current mode
and the mode to be set has the same preferred clock rate.
Change-Id: Id1f6c45e822492427cf3555beeaa5f0e7ea3243c
Signed-off-by: Vara Reddy <varar@codeaurora.org>
DSI PHY timings must be committed every time the values
are updated after a dynamic mode switch.
Change-Id: Id605c76dfe75ec41ceb89000f24baccda189e82f
Signed-off-by: Satya Rama Aditya Pinapala <psraditya30@codeaurora.org>
There can be a scenario where dynamic mode set can come
for first commit also, allocate memory for current mode
before checking for DMS.
Change-Id: Ief856a372629112380f199bc336160b3fa278eef
Signed-off-by: Vara Reddy <varar@codeaurora.org>
Change overrides the panel physical dimensions with correct
value upto a precision of millimeter, which was getting
truncated to centimeter as drm structures maintain it in
centimeters.
Change-Id: I035357596ed42154b657b791846aee6f940f2e53
Signed-off-by: Vara Reddy <varar@codeaurora.org>
Add changes to support avr mode config update during
prepare commit which happens before gpu fence wait
for the input buffers.
Change-Id: Ib2cb5b7e1f10501914c003f6cf066b85048f79d4
Signed-off-by: Kalyan Thota <kalyant@codeaurora.org>
Signed-off-by: Jayaprakash <jmadiset@codeaurora.org>
Add support to enable one-shot mode during qsync
update. This feature ensures the frame drops can be
reduced due to delayed software flush for the
current commit. Also, add changes to disable the qsync
feature post commit.
Change-Id: Icb158853f52284bcf8fa641e5f62200c5460b660
Signed-off-by: Kalyan Thota <kalyant@codeaurora.org>
Signed-off-by: Jayaprakash <jmadiset@codeaurora.org>
Allow Qsync and VRR features to be supported independently
by display driver. Restrict the feature availability in
same composition cycle.
Change-Id: I696eb72a2b4f9451e142ffdc5acccc8987c36b6d
Signed-off-by: Kalyan Thota <kalyant@codeaurora.org>
Signed-off-by: Jayaprakash <jmadiset@codeaurora.org>
Change adds flag to identify dynamic mode switch with same
resolution and different fps. Block sending PPS command
if we hit this scenario, this optimizes mode switch time.
Change-Id: If5c86084cde641952fe294b512e937cfd1bb5479
Signed-off-by: Vara Reddy <varar@codeaurora.org>
With this change, mdp transfer time updated to userspace
will be the preferred dtsi entry, when both dsi clock
and mdp transfer time nodes are set.
Change-Id: I37cd55e3d6f3f0f78f4ca4bddf921f6cf743c1b9
Signed-off-by: Vara Reddy <varar@codeaurora.org>
This change moves the panel null check to the beginning of the function
so panel can be used throughout the function. This change also replaces
looping through display ctrls with proper display_for_each_ctrl.
Change-Id: I0014ee7ad6d8514734f9233a1abb314e60d29b5f
Signed-off-by: Samantha Tran <samtran@codeaurora.org>
Use usleep_range api instead of msleep in dsi enable path to
improve accuracy, which improves bootup time.
Change-Id: I5d00d666bfacddea58b824267eb0eb39b5b2641c
Signed-off-by: Vara Reddy <varar@codeaurora.org>
When panel exits LP1, need to set OLED power mode.
Change-Id: I045777a0dce941e45b71bc74c7b2908b24df3396
Signed-off-by: Yuan Zhao <yzhao@codeaurora.org>
ELVDD/ELVSS has a dip during AMODE panel AOD exit hand-off.
According to PMIC team's suggestion, need to config the AB/IBB power
to REGULATOR_MODE_IDLE/REGULATOR_MODE_NORMAL to fix dips.
Change-Id: Ia5cbd4d698de262e02a660f670865c03dda1e04a
Signed-off-by: Wenjun Zhang <wjzhan@codeaurora.org>
Signed-off-by: Yuan Zhao <yzhao@codeaurora.org>
Parse the DTS panel type settings. Consider the default
panel physical type as LCD. We need to set OLED in DTS if
the panel is an OLED type.
Change-Id: Ib53651ab3861e75bf061f38d60a2f6135c1f537d
Signed-off-by: Wenjun Zhang <wjzhan@codeaurora.org>
Signed-off-by: Yuan Zhao <yzhao@codeaurora.org>
DSI driver sends nolp commands when DSI connector power
modes is set SDE_MODE_DPMS_ON or SDE_MODE_DPMS_OFF. This
is invalid panel configuration. It should only send nolp
commmand to panel when it is in LP1/LP2 mode.
Change-Id: Ie94eaef6899d292fd20f42c1b7ef2c7a99178d13
Signed-off-by: Wenjun Zhang <wjzhan@codeaurora.org>
Signed-off-by: Yuan Zhao <yzhao@codeaurora.org>
Video and command mode will be included in same timing node
when POMS is enabled, but DFPS is only applicable for video
mode, so add this change to differentiate panel mode, and fill
display mode according to panel mode.
Change-Id: I6aa0f8572f23f0612684ed7cdf406b20ab3df822
Signed-off-by: Lei Chen <chenlei@codeaurora.org>
Change lowers the log level of the debug bus dump to info.
Change-Id: I129f9f2e611428dc392d7888df43870beddac307
Signed-off-by: Vara Reddy <varar@codeaurora.org>
Multi-panel can't be supported by video panel, but multi panel
operating mode can be supported for video mode panel, so enable
multi-mode support for video mode panel for panel operating mode
switch.
Change-Id: I9a62ba0c880d13c7201235b9cb65728fa13e3232
Signed-off-by: Lei Chen <chenlei@codeaurora.org>
ESD check is disabled while switching panel operating mode.
This change enables ESD check after panel operating
mode switch is done.
Change-Id: I421d70d9be4c14107a7b51470801157d28874ffb
Signed-off-by: Lei Chen <chenlei@codeaurora.org>
Add check for max controller count while iterating through
display ctrl structure to avoid out of bounds access.
Change-Id: If4d32c648e7d34591726286226600a92a357479a
Signed-off-by: Vishnuvardhan Prodduturi <vproddut@codeaurora.org>
Minimum threshold time is sum of panel jitter time, prefill lines time
and buffer time of 100usec. For panels with high jitter, we can cross the
default threshold time. Update the calculation to accommodate high jitter
panels in calculating dsi clocks.
Change-Id: I93163a07c7d0b51eb3704609b4efed6c1e277761
Signed-off-by: Vara Reddy <varar@codeaurora.org>
Fix the default value of post PPS command delay to zero, if
it is not specified as a panel device tree property.
Change-Id: I9aa972839d8be0620036595ac2514290cc6cf697
Signed-off-by: Satya Rama Aditya Pinapala <psraditya30@codeaurora.org>
