Enure that ESD check doesn't result in a false negative while
booting up with a simulation panel or if TE based check is enabled
and panel switches it operating mode to video.
Change-Id: I62ff088f513d28d2883ce5a6d22f8bac1783fcd2
Signed-off-by: Satya Rama Aditya Pinapala <psraditya30@codeaurora.org>
During stability stress testing, there are many instances where
the panel is unreachable which results in the ESD check mechanism
failing continuously with PANEL_DEAD events. There are two possible
reasons. Either the device is bad or DSI controller is hung. As of
today, logs/xlog is flooded and info on root cause is missed in the
logs. To catch the root cause for such issues, this patch induces
forced crash when there are five consecutive ESD check failures.
Change-Id: Id0a5762ac977f8a209af651f65cbe9da199cb8d0
Signed-off-by: Lipsa Rout <lrout@codeaurora.org>
Setting a lower load can make the regulator enter into LPM. Now the
lower load was set before the regulator disable, there's a risk here.
The regulator has been LPM, while it was not disable, if the cosumer
has a higher current needed than LPM at this time, that will lead OCP
on this regulator. The right operation for a regulator enable/disable
should be:
1. regulator_set_voltage(vreg, active_min_uV, active_max_uV) and
regulator_set_load(vreg, active_load_uA); in either order
2. regulator_enable()
3. regulator_disable()
4. regulator_set_voltage(vreg, inactive_min_uV, inactive_max_uV)
and regulator_set_load(vreg, inactive_load_uA); in either order
Change-Id: Ibe4f888a5675baf2691e479daa163d8867902e69
Signed-off-by: Zhao, Yuan <yzhao@codeaurora.org>
Currently, SDE relies on DSI to set a flag for POMS however
if a power ON modeset comes with a different mode than
previously configured, DSI is unable to detect the mode change
and does not set the flag nor perform the mode switch itself.
DSI should always align the panel mode to match the timing node
that is selected regardless of prior configurations.
SDE encoder can detect if POMS is required for the INTF block
without the flag from DSI by comparing the currently configured
INTF mode with the panel mode that is being set. The POMS flag
from DSI is still needed for any active panel mode change so
that the post-modeset cleanup operations are triggered.
Change-Id: Ib198b3098f21338ab35b2022b04be1c01c4cbd94
Signed-off-by: Steve Cohen <cohens@codeaurora.org>
Need to check trusted VM environment when loading DSI
firmware. Add this missing check due to propagation
issue.
Change-Id: I7c84b487a58133df49ba23e80e6b6ff8783cdf6c
Signed-off-by: Ray Zhang <rayz@codeaurora.org>
It is not applicable for all DFPS cases to update UIDLE state
according to current frame rate. If DFPS changes frame rate
through vertical front porch values, the SDE clocks and transfer
time will not get changed accordingly, and it always get fixed
at max frame rate configuration of DFPS.
Add this change to check max FPS of DFPS instead of current
frame rate for UIDLE update, if DFPS is enabled with VFP.
Change-Id: I7634bce6a9eb1af212ba19a267735be08b20ae1f
Signed-off-by: Lei Chen <chenlei@codeaurora.org>
Currently,power resource disable fails when pm_runtime_put_sync
returns negative values. Due to this, clock state update is
failing. pm_runtime_put_sync can return negative values in
scenarios where pending resume requests take precedence over
suspends. This change allows pm_runtime_put_sync to return
negative vales also.
Change-Id: I1a46ca574129ba953ddb6300f9b3ab24cdb3171e
Signed-off-by: Lipsa Rout <lrout@codeaurora.org>
Signed-off-by: Steve Cohen <cohens@codeaurora.org>
Currently, power_state variable does not reflect the GDSC
status. Due to this, there are scenarios where ctrl_power_on
is not happening leading to clock failures. This change
updates power_state based on current status of all the
regulators. GDSC enable is moved to pre_clkon and GDSC
disable is moved to post_clkoff.
Change-Id: I6d9508d5dffda0c94bd3b3bd9b5feb4724dc9dc7
Signed-off-by: Ritesh Kumar <riteshk@codeaurora.org>
[cohens@codeaurora.org: fixed static analysis error]
Signed-off-by: Steve Cohen <cohens@codeaurora.org>
The change adds a new mode property allowed_mode_switch. The new
property is a 32bit bitmask that indicates the modes each mode
can switch to. This change is required to pass the driver mode
switching capabilities, so that user mode can reject any mode switch
that is not supported by the driver.
Change-Id: I76d1733a07a6d57487ba9f461055270d7e60e060
Signed-off-by: Satya Rama Aditya Pinapala <psraditya30@codeaurora.org>
This change adds porch calculation support to maintain
constant fps during clock switch for dual DSI controller.
Change-Id: I9a7e6d1f6d028355dba30aafe0234fc30c153059
Signed-off-by: Harigovindan P <harigovi@codeaurora.org>
Signed-off-by: Steve Cohen <cohens@codeaurora.org>
dsi_display_init has to be called after dsi_display has valid
device info, so initialize it before calling request_firmware
in dsi firmware case.
Change-Id: Iec59882c776eb4bd19ce68d3ded052629c344d17
Signed-off-by: Ray Zhang <rayz@codeaurora.org>
Signed-off-by: Steve Cohen <cohens@codeaurora.org>
This change adds support to keep display reset pin high during
suspend state.
Change-Id: I8fab43d8f7b30fce72cc95277d016b72b914aa99
Signed-off-by: Ritesh Kumar <riteshk@codeaurora.org>
Signed-off-by: Steve Cohen <cohens@codeaurora.org>
Currently, for Dual DSI Broadcast command, Overflow error
is masked only for master controller. This changes add
support to mask overflow error for slave controller as well.
Change-Id: Ida73c4166e996fcf2c8c936d0c76d0a89a220d89
Signed-off-by: Harigovindan P <harigovi@codeaurora.org>
Signed-off-by: Ritesh Kumar <riteshk@codeaurora.org>
Signed-off-by: Steve Cohen <cohens@codeaurora.org>
This change adds porch calculation support to maintain
constant fps during clock switch for CPhy.
Change-Id: I74b2f0e064441fba7f452b06438ece7fe3b373eb
Signed-off-by: Ritesh Kumar <riteshk@codeaurora.org>
Signed-off-by: Harigovindan P <harigovi@codeaurora.org>
This change adds support for C-PHY dynamic clock switch feature.
Also add support for phy ver 4.0 C-PHY timing parameters calculation
to be used for clock switch.
Change-Id: I8292860fd8c93a7ba7988ec8c44ea9683f45b6e6
Signed-off-by: Ritesh Kumar <riteshk@codeaurora.org>
Signed-off-by: Harigovindan P <harigovi@codeaurora.org>
Signed-off-by: Steve Cohen <cohens@codeaurora.org>
As per DSI HPG, Soft reset is not required to disable
video mode operation for version 1.3.0 and later. So,
add check to skip it during display disable.
Change-Id: If6d263bdf22f8a6fbef76d78d04bb9d11be05945
Signed-off-by: Ritesh Kumar <riteshk@codeaurora.org>
Signed-off-by: Steve Cohen <cohens@codeaurora.org>
As per DSI HPG, pll delay should be 25usec for phy ver 4.0 and
100usec for phy ver 2.0 and 3.0. This change updates pll delay
calculation during dynamic DSI clock switch accordingly.
Change-Id: Ief5cbdc9304cf5ad025fe3bbe689b93834a1f710
Signed-off-by: Ritesh Kumar <riteshk@codeaurora.org>
During clock switch, Pll delay is calculated considering escape
clock to be in KHz. But escape clock is in Hz. This leads to wrong
pll delay calculation.
Change-Id: I616d16cc3d775a37e77c7c35bb860c23b1f9e37a
Signed-off-by: Ritesh Kumar <riteshk@codeaurora.org>
Add NULL pointer checks, before accessing the controller node.
Change-Id: If24c4fd4352ef5ab7642c817ddaa61a80b725c99
Signed-off-by: Vara Reddy <varar@codeaurora.org>
This change allows dynamic refresh trigger to sw trigger
and mdp intf flush. With this we can make sure that DSI
timing/clock update and mdp intf timings are updated in
one vsync.
Change-Id: Ic807f498e2e47be6dd0f1e11ff1fc0896a8ec758
Signed-off-by: Vara Reddy <varar@codeaurora.org>
The panel regulator votes are added by default during
dsi probe to make sure sync state driver doesn't disable
these regulators for cont_splash use case. These regulator
votes need to be removed when cont_splash feature is
disabled. Add a new connector API to handle this.
CRs-Fixed: 2734419
Change-Id: Ie54c8f246877a042afacddaeae8b90440652116f
Signed-off-by: Chandan Uddaraju <chandanu@codeaurora.org>
Add parsing code for getting the TLMM base address and size
of each GPIO pin register space along with the GPIO pins
used for the specific panel. This list is used to lend
these IO ranges to trusted vm during the trusted UI usecase.
Change-Id: I10429cfa14265d52e898815c6cf94be27daa5677
Signed-off-by: Veera Sundaram Sankaran <veeras@codeaurora.org>
DCS brightness settng can only use HS mode. Add a new
DT property for LP mode choose for DCS brightness setting.
Change-Id: Ibe5867fe344776871eb3a410a8d79d347775f3d4
Signed-off-by: Yuan Zhao <yzhao@codeaurora.org>
The change adds register mapping of MDP_INTF_[1/2]_TEAR_INT_COUNT_VAL
register to DSI controller. This allows for the controller to read the
line count and frame count of the read pointer during trigger and
successful transfer of DMA command.
To enable the debug feature:
echo 1 > /d/<panel_name>/dsi-ctrl-0/enable_cmd_dma_stats.
To disable the debug feature
echo 0 > /d/<panel_name>/dsi-ctrl-0/enable_cmd_dma_stats.
To read line count value:
cat /d/<panel_name>/dsi-ctrl-0/cmd_dma_stats.
Change-Id: I5cdeb54ca941af05b226a9d7ab332b899ecc5797
Signed-off-by: Satya Rama Aditya Pinapala <psraditya30@codeaurora.org>
The change allows for configuring a command DMA window during which
the command is triggered. The DMA window must not intersect with the
MDP tear check window. Once the command transfer is successful, the
trigger control needs to reset to the default DMA trigger specified
by the panel.
Change-Id: I5485ca1f8e141ed92dc8c77c2daf579634271022
Signed-off-by: Satya Rama Aditya Pinapala <psraditya30@codeaurora.org>
The default PWM gpio pin mode was not right for PWM backlight
control. If needs to use PWM backlight, must config the
gpio pinctrl.
Change-Id: I5fd6b947d379b53ef4c358be1b935a2ad4970f99
Signed-off-by: Yuan Zhao <yzhao@codeaurora.org>
