FW may limit the interval and duration during which HW may
use user provided values and attempt to capture.
These values range from 1 us to roughly 16.8 sec.
Max value is 0xFFFFFF which is 16.777215 sec.
Add check to make sure that capture duration cannot exceed
capture interval.
Change-Id: If6f75c737f8ac8cda527eee60f0e67d75e3b5420
The FW has updated the wmi command wmi_vdev_adfs_ch_cfg_cmd_fixed_param so
as to configure the restricted 80p80 channel as the Agile channel.
Add support in ADFS parameter to enable the 165MHz channel as the Agile
channel.
Change-Id: I757bbd9b209118f19e51b7a95881124000f362c8
CRs-Fixed: 2642555
Rebuild the precac tree with 160MHz root channels. Add support to mark the
160MHz precac channel nodes as CAC done and NOL.
Go through the list of available channels to find the unique PreCAC Tree
roots. Find the root channels that are not part of the 160MHz channel.
Example, consider a case where a country supports only until channel 144,
then the precac tree will have two 160MHz root nodes(36HT160, 100HT160) and
one 80MHz root node(132HT80).
Add support include the 165MHz channel to the precac tree for Pine by
considering the 165MHz channel as a 80p80MHz channel with a center channel
number 146. Adjust the channel frequency offset to mark the 165MHz
channel as precac done and NOL.
When a 160MHz or the 165MHz channel encloses a nonDFS channel, mark that
nonDFS channel as precac done.
Change-Id: Ia9bb2cc5c845c4d636e35329cdf76ace2eb63c72
CRs-Fixed: 2628373
Protect access to cfr lookup table, since error handling
mechanism attempts to cleanup CFR entries in timer context,
this leads to contention between bottom-half and timer.
Change-Id: I6a414e0da883250a90451824367c12fcca33c27e
For Pine, the agile channel width needs to be 160MHz when the current
channel width is 160MHz or restricted 80+80MHz.
Change-Id: Id1339400c6e86daf9febe364de62be42c9732f14
CRs-Fixed: 2628370
For Pine chip, where true 160MHz (single detector for 160MHz)
is supported, the agile detector ID is 1 (instead of 2 for
chipsets like Hawkeye with two primary 80MHz detectors).
Assign the dfs_agile_detector_id to the proper value based on
true 160MHz capability.
Introduce a new API to get the agile_detector_id based on the
chip's capability. Use the new API to get the agile_detector_id
instead of using the existing enum.
CRs-Fixed: 2637793
Change-Id: I8033e541c09632a9e4c7be1a5067d1dbcedd0d48
While excluding the current operating channel for preCAC, the
entire tree is skipped if the current operating channel is selected
by the algorithm. In case of a tree node with two 40MHz nodes, if the
selected channel is the current operating channel but the other 40MHz
channel is still pCAC required, that channel should be selected.
To achieve this, move the logic, of excluding the current operating
channels, inside the tree traversal algorithm.
CRs-Fixed: 2621410
Change-Id: Ib8ea3dea168d27ea98a0bf2a9ea1eb57872b285f
Issue:
Bring up the AP on channel 100 HE80 in ETSI domain and enable preCAC config
(option preCACEn 1). The AP begins CAC on channel 100 and does preCAC
on the channel 58 (the first HE80 channel in the preCAC list). The default
preCACtimeout is 6 min. Inject radar on channel 100 using bangradar.
AP does a VDEV RESTART to a new random channel (say 36) and aborts
preCAC on channel 58. After VDEV RESTART on new random channel (say 36),
AP chooses a new random channel to do preCAC and marks channel 58 as
preCAC done. Channel 58 can be marked preCAC done only after 6 min
of CAC completion. However, within 6 min, if primary channel detects
radar, channel 58 incorrectly marked as preCAC done.
When primary channel 100 is marked as NOL, "dfs_agile_precac_freq_mhz"
(the variable that holds the value of the last agile frequency)
which was assigned 5290MHZ (chan 58) is not cleared.
"dfs_agile_precac_freq_mhz" continues to hold the preCAC channel freq
5290. After VDEV RESTART to new random channel (36), preCAC is initated
again invoking dfs_start_agile_precac_timer() using a zero second
timer. As "dfs_agile_precac_freq_mhz" is not 0,
dfs_mark_precac_done_for_freq() marks channel 5290 (58) as preCAC done.
Solution:
To solve the issue mentioned above, reset "dfs_mark_precac_done_for_freq"
to 0 on radar detect so that preCAC done channel is not marked
incorrectly.
Change-Id: If6dae4b3527f060d5512d82ebd437ea1b6db1425
CRs-Fixed: 2631779
RCC specific debug counters has been moved to DP layer.
Update capture BW from RXTLV instead of VDEV
Capture BW is the bandwidth at which Station operates.
Error handling for pdev referencce count.
Add support to clear CFR ppdu counters
Use same event ENUM for HKV2 and Cypress.
Change-Id: Ic1f5da16c5c1ac5893dce1023eb57f96d78d4cfa
When multivdev restart request fails due to any reason, the
same is not notified to the vdev state machine. Due to VDEV
SM is stuck in restart state indefinitely.
Handle multivdev restart request failure by dispatching
RESTART_REQ_FAIL event.
Change-Id: I1cdbcf8efb5cd51e803cef4a8980d1276c410e13
CRs-Fixed: 2622197
1. Change the default values of TA\RA entries
Host sends out one default RCC setting to FW during
the initialization of target specific CFR component.
Change the default setting of TA, RA address from
00:00:00:00:00:00 to FF:FF:FF:FF:FF:FF and TA_MASK and RA_MASK
should be 00:00:00:00:00:00. This will avoid
the scenario where the system will allow all packets
irrespective of the filter settings provided by the user.
2. In case default configuration is being sent to the FW
successfully during CFR init, those configurations will
be updated as part of global config. So that it can be
reflected as part of rcc_config_details command.
3. Code clean up
Change-Id: I719ddeee48f14992b2210562596b1ea3d61fcc1c
In the current implementaion, if multivdev restart req is not sent
due to error cases, then the multivdev restart timer gets restarted
after every timeout and the vdev sm is stuck in same state.
Add multivdev restart timeout wait counter and assert after the wait
timeout expires.
Change-Id: I5e249583e309660281b4a9cd7253b0731c5483cd
CRs-Fixed: 2621230
A new flag "is_cfr_rcc_capable", is introduced to enable RCC.
Currently, this flag is enabled only for QCA6018.
Change-Id: Ifdd1922c655c0bb743147e3f51d3ca32cac3dd2e
Add counters for following scenarios -
1. Ucode aborts DMA of CFR data when a higher priority TX/RX activity
needs to be scheduled, add counters in host to identify the no. of
aborts.
2. Add counters to track the total no. of TX-based CFR captures since
wifi up.
Change-Id: I3c0e0e68651348c3484a14dfcd1f664962c8647f
1. Remove the handler that flushes all pending DBR and txrx
events, since that is not being used.
2. PPDU TLV subscribe logic is integrated with ol stats layer,
remove redundant subscriber alloc.
3. Downgrade debug level of timer prints, as error handling timer
fires every 3 secs.
Change-Id: I2a5d2ae10ebee069dd30c1ed87d6560b30f77427
In CFR error handling lut ageout timer, following fixes are made -
1. Fire error handling timer every 3 secs
2. Start/Stop timer only when pdev->cfr_rcc_mode transitions from enable
to disable and vice versa
3. Stop/Free timer during deinit of pdev, incase user issues wifi down
without disabling cfr
Change-Id: I2f9819706d1440d675edfdd933839dbc3ebddbb0
Do not flush the DBR event for which the corresponding
TX/RX event is yet to be received.
Once the new PPDU TLV is received, flush the previous
pending DBR events.
Change-Id: I4495a45db139128d2af01f79744021c6ad6bf322
Address the compilation issues when the DFS feature Auto channel
switch support is disabled(WLAN_DFS_PRECAC_AUTO_CHAN_SUPPORT=0).
Change-Id: I6eda4bf133552e145a49a60aea50a0ce29a11373
CRs-Fixed: 2608450
1. In CFR RCC mode, when ucode aborts DMA of CFR data, 2 (or)
more PPDU status TLVs are likely to have same phy_addr+cookie in
RX location TLV, so the host will be flushing out the older PPDU
status TLV events instead of DBR events in LUT table,
since DBR events signify the actual DMA completion.
2. Same fix has been made for LUT entry ageout logic.
Change-Id: Ifc0717e97d21ba3463cc2f5ceb2f22a657177002
This changes removes references to dp_handle in CFR component, to ensure
consistency with FR#56622.
Change-Id: I3539e958ed3fe4ef68f22adf473349b5639cb4b1
Supported dynamic HW mode switches:
DBS (full band 5G and 2G) <-> DBS_SBS (low band 5G, high band 5G and 2G)
Description of the changes:
1. NOL conversion:
a. Introduce a temporary NOL list copy structure in DFS psoc obj.
b. When mode switch is triggered:
i. Stop the NOL timers and clear the data, to avoid processing NOL
expiry during mode switch.
ii. Allocate the psoc NOL copy for the target num_radios.
iii. Store the NOL data of each radio to the target pdev ID
(pdev ID after mode switch) in the psoc NOL copy,
using a unified mux/demux API.
c. After mode switch is completed:
i. Resume NOL by re-initializing the list from the temporary psoc
copy.
ii. Free the psoc copy after mode switch is complete.
iii. Note: changes are made to support pause and resume of NOL,
increasing NOL timeout by a few milliseconds.
2. PreCAC list conversion:
a. When mode switch is triggered:
i. Stop the existing preCAC timer and send ADFS abort command to FW.
b. When mode switch is completed:
i. Unify/separate the preCAC list if the target mode is DBS/DBS_SBS
respectively, using a single API.
ii. Start ADFS again.
3. Radar detection lock:
a. While detecting radar, acquire a lock to avoid handling user triggered
mode_switch during this process. Release the lock once radar
processing is completed and CSA start is triggered.
4. Radar detection/CAC completion defer during mode switch:
a. While detecting radar or CAC completion, check if mode switch is
in progress. If yes, wait for mode switch to complete before
handling the events.
b. Note: Precedence is Radar over CAC, i.e., if CAC processing is waiting
and radar is received, CAC completion is no longer handled.
CRs-Fixed: 2535058
Change-Id: I55e03dae9da994c21b1aafe7b7686f5299221a40
Framework to accumulate RCC configurations until user issues commit
command. Once commit command is issued, all the gathered configurations
are sent to FW through WMI fixed and variable TLVs.
Change-Id: I84fec42d22a3b4eceb710b72d89a7c3047fed1f6
CRs-Fixed: 2582833
Channel Frequency Response(CFR) captures FFT bins corresponding to a PPDU
received and this is relayed to user space application along with
additional information about the PPDU gathered in the host. Usecases of
this feature include location sensing, motion detection.
Change-Id: If0da492bc1fcc0fc2b6e42339c56f9a54ee813f7
CRs-Fixed: 2541307
On sending STOP req, RESTART pending, RESTART send flags are being cleared.
This is already being done before moving out of RESTART_PROGRESS sub state,
so avoiding it.
Change-Id: If8b358eb83571e11d6e0d3bcbedcf833894bf0d6
CRs-Fixed: 2578106
While configuring the precac timeout as part of starting the agile
engine, the timeout value sent to FW and HOST timer were both equal,
resulting in two separate timeout.
1. Zero second timeout due to OCAC complete event from FW.
2. preCAC timer timeout.
Because of these timeouts, same channel is marked as OCAC complete
twice. To avoid this, increase the HOST timer timeout value by
2 seconds.
Change-Id: I9b649b5c783df962df2b8410691ee00d1abb4a9d
CRs-Fixed: 2556726
Introduce a phyerror sample analogous to the phyerrors given by FW and
store itin the text file. Read the text file and Inject this phyerror to
the DFS algorithm.
Change-Id: Iff33b6554911e4f3e8101cb81df5c500cd96f041
CRs-Fixed: 2484584
