It is not applicable for all DFPS cases to update UIDLE state
according to current frame rate. If DFPS changes frame rate
through vertical front porch values, the SDE clocks and transfer
time will not get changed accordingly, and it always get fixed
at max frame rate configuration of DFPS.
Add this change to check max FPS of DFPS instead of current
frame rate for UIDLE update, if DFPS is enabled with VFP.
Change-Id: I7634bce6a9eb1af212ba19a267735be08b20ae1f
Signed-off-by: Lei Chen <chenlei@codeaurora.org>
Currently,power resource disable fails when pm_runtime_put_sync
returns negative values. Due to this, clock state update is
failing. pm_runtime_put_sync can return negative values in
scenarios where pending resume requests take precedence over
suspends. This change allows pm_runtime_put_sync to return
negative vales also.
Change-Id: I1a46ca574129ba953ddb6300f9b3ab24cdb3171e
Signed-off-by: Lipsa Rout <lrout@codeaurora.org>
Signed-off-by: Steve Cohen <cohens@codeaurora.org>
Currently, power_state variable does not reflect the GDSC
status. Due to this, there are scenarios where ctrl_power_on
is not happening leading to clock failures. This change
updates power_state based on current status of all the
regulators. GDSC enable is moved to pre_clkon and GDSC
disable is moved to post_clkoff.
Change-Id: I6d9508d5dffda0c94bd3b3bd9b5feb4724dc9dc7
Signed-off-by: Ritesh Kumar <riteshk@codeaurora.org>
[cohens@codeaurora.org: fixed static analysis error]
Signed-off-by: Steve Cohen <cohens@codeaurora.org>
The change adds a new mode property allowed_mode_switch. The new
property is a 32bit bitmask that indicates the modes each mode
can switch to. This change is required to pass the driver mode
switching capabilities, so that user mode can reject any mode switch
that is not supported by the driver.
Change-Id: I76d1733a07a6d57487ba9f461055270d7e60e060
Signed-off-by: Satya Rama Aditya Pinapala <psraditya30@codeaurora.org>
This change adds porch calculation support to maintain
constant fps during clock switch for dual DSI controller.
Change-Id: I9a7e6d1f6d028355dba30aafe0234fc30c153059
Signed-off-by: Harigovindan P <harigovi@codeaurora.org>
Signed-off-by: Steve Cohen <cohens@codeaurora.org>
dsi_display_init has to be called after dsi_display has valid
device info, so initialize it before calling request_firmware
in dsi firmware case.
Change-Id: Iec59882c776eb4bd19ce68d3ded052629c344d17
Signed-off-by: Ray Zhang <rayz@codeaurora.org>
Signed-off-by: Steve Cohen <cohens@codeaurora.org>
This change adds support to keep display reset pin high during
suspend state.
Change-Id: I8fab43d8f7b30fce72cc95277d016b72b914aa99
Signed-off-by: Ritesh Kumar <riteshk@codeaurora.org>
Signed-off-by: Steve Cohen <cohens@codeaurora.org>
Currently, for Dual DSI Broadcast command, Overflow error
is masked only for master controller. This changes add
support to mask overflow error for slave controller as well.
Change-Id: Ida73c4166e996fcf2c8c936d0c76d0a89a220d89
Signed-off-by: Harigovindan P <harigovi@codeaurora.org>
Signed-off-by: Ritesh Kumar <riteshk@codeaurora.org>
Signed-off-by: Steve Cohen <cohens@codeaurora.org>
This change adds porch calculation support to maintain
constant fps during clock switch for CPhy.
Change-Id: I74b2f0e064441fba7f452b06438ece7fe3b373eb
Signed-off-by: Ritesh Kumar <riteshk@codeaurora.org>
Signed-off-by: Harigovindan P <harigovi@codeaurora.org>
This change adds support for C-PHY dynamic clock switch feature.
Also add support for phy ver 4.0 C-PHY timing parameters calculation
to be used for clock switch.
Change-Id: I8292860fd8c93a7ba7988ec8c44ea9683f45b6e6
Signed-off-by: Ritesh Kumar <riteshk@codeaurora.org>
Signed-off-by: Harigovindan P <harigovi@codeaurora.org>
Signed-off-by: Steve Cohen <cohens@codeaurora.org>
As per DSI HPG, Soft reset is not required to disable
video mode operation for version 1.3.0 and later. So,
add check to skip it during display disable.
Change-Id: If6d263bdf22f8a6fbef76d78d04bb9d11be05945
Signed-off-by: Ritesh Kumar <riteshk@codeaurora.org>
Signed-off-by: Steve Cohen <cohens@codeaurora.org>
As per DSI HPG, pll delay should be 25usec for phy ver 4.0 and
100usec for phy ver 2.0 and 3.0. This change updates pll delay
calculation during dynamic DSI clock switch accordingly.
Change-Id: Ief5cbdc9304cf5ad025fe3bbe689b93834a1f710
Signed-off-by: Ritesh Kumar <riteshk@codeaurora.org>
During clock switch, Pll delay is calculated considering escape
clock to be in KHz. But escape clock is in Hz. This leads to wrong
pll delay calculation.
Change-Id: I616d16cc3d775a37e77c7c35bb860c23b1f9e37a
Signed-off-by: Ritesh Kumar <riteshk@codeaurora.org>
Add NULL pointer checks, before accessing the controller node.
Change-Id: If24c4fd4352ef5ab7642c817ddaa61a80b725c99
Signed-off-by: Vara Reddy <varar@codeaurora.org>
This change allows dynamic refresh trigger to sw trigger
and mdp intf flush. With this we can make sure that DSI
timing/clock update and mdp intf timings are updated in
one vsync.
Change-Id: Ic807f498e2e47be6dd0f1e11ff1fc0896a8ec758
Signed-off-by: Vara Reddy <varar@codeaurora.org>
The panel regulator votes are added by default during
dsi probe to make sure sync state driver doesn't disable
these regulators for cont_splash use case. These regulator
votes need to be removed when cont_splash feature is
disabled. Add a new connector API to handle this.
CRs-Fixed: 2734419
Change-Id: Ie54c8f246877a042afacddaeae8b90440652116f
Signed-off-by: Chandan Uddaraju <chandanu@codeaurora.org>
Add parsing code for getting the TLMM base address and size
of each GPIO pin register space along with the GPIO pins
used for the specific panel. This list is used to lend
these IO ranges to trusted vm during the trusted UI usecase.
Change-Id: I10429cfa14265d52e898815c6cf94be27daa5677
Signed-off-by: Veera Sundaram Sankaran <veeras@codeaurora.org>
DCS brightness settng can only use HS mode. Add a new
DT property for LP mode choose for DCS brightness setting.
Change-Id: Ibe5867fe344776871eb3a410a8d79d347775f3d4
Signed-off-by: Yuan Zhao <yzhao@codeaurora.org>
The change adds register mapping of MDP_INTF_[1/2]_TEAR_INT_COUNT_VAL
register to DSI controller. This allows for the controller to read the
line count and frame count of the read pointer during trigger and
successful transfer of DMA command.
To enable the debug feature:
echo 1 > /d/<panel_name>/dsi-ctrl-0/enable_cmd_dma_stats.
To disable the debug feature
echo 0 > /d/<panel_name>/dsi-ctrl-0/enable_cmd_dma_stats.
To read line count value:
cat /d/<panel_name>/dsi-ctrl-0/cmd_dma_stats.
Change-Id: I5cdeb54ca941af05b226a9d7ab332b899ecc5797
Signed-off-by: Satya Rama Aditya Pinapala <psraditya30@codeaurora.org>
The change allows for configuring a command DMA window during which
the command is triggered. The DMA window must not intersect with the
MDP tear check window. Once the command transfer is successful, the
trigger control needs to reset to the default DMA trigger specified
by the panel.
Change-Id: I5485ca1f8e141ed92dc8c77c2daf579634271022
Signed-off-by: Satya Rama Aditya Pinapala <psraditya30@codeaurora.org>
The default PWM gpio pin mode was not right for PWM backlight
control. If needs to use PWM backlight, must config the
gpio pinctrl.
Change-Id: I5fd6b947d379b53ef4c358be1b935a2ad4970f99
Signed-off-by: Yuan Zhao <yzhao@codeaurora.org>
During a dynamic mode switch if the DSI clocks need to be changed,
it would result in a sequence of clock off and on operations. If
this happens after a partial update even though the commands are
sent with an asynchronous wait flag, the clock off forces the commit
thread to wait till the DSI command wait_for_done thread is
scheduled and completed. The change ensures that the clock change is
the first operation that occurs during pre kickoff.
Change-Id: I1b4e765cd0281f1539fc4af309247f3bc0867c1b
Signed-off-by: Satya Rama Aditya Pinapala <psraditya30@codeaurora.org>
This change ensure that in cases panel transfer time is specified,
the final transfer time is calculated in accordance with the minimum
threshold time allowed.
Change-Id: I3442d4d3e8a27ec30d93725cb96b229bb94f2ce2
Signed-off-by: Satya Rama Aditya Pinapala <psraditya30@codeaurora.org>
During CWB case where writeback connector is disabled
and connectors_changed is set, add support to allow
disabling of corresponding encoder for this connector.
Modify the seamless check for connector to handle
the same. With this cwb + dfps concurrency can
be handled.
Change-Id: Ia8f86bd12ac3c5ab622334fb04cdcb2e2b60f111
Signed-off-by: Krishna Manikandan <mkrishn@codeaurora.org>
Signed-off-by: Steve Cohen <cohens@codeaurora.org>
Creates a deep copy of a struct which previously was shallow.
Also adds null checks which prevent segmentation faults.
Change-Id: I9155f632736fdb30e31f28f55ebe92954956a82d
Signed-off-by: Orion Brody <obrody@codeaurora.org>
This change adds DSI pll support for 10nm architecture.
Change-Id: I3819dd828dbcc168b115bd718c5d656ea9fd12c8
Signed-off-by: Rajeev Nandan <rajeevny@codeaurora.org>
Add support to read register ranges and IRQ lines that needs
isolation during VM switch in dsi ctrl and dsi phy.
Register for VM resource collection event providing the
callback function.
Change-Id: I5eae4699b0a97ffed438627ccea855c401b3fbeb
Signed-off-by: Jeykumar Sankaran <jsanka@codeaurora.org>
Display in trusted VM works in a handover mode i.e, all
display components need to be initialized by the primary VM
before switching to trusted VM on the usecase boundary.
That makes it a hard requirement for the trusted VM not to
re-program any of the display configuration registers before
it could hand the HW back to the primary VM.
Also, most of the linux framework drivers including pintrl, clocks
are not enabled in the trusted VM.
In order to address the above two limitations and to control the
probe/commit sequences, this change adapts the same path as that
of continuous splash to bypass some of the critical functions
which are identified to be HW intrusive. Based on the DT property
read from SDE handle, dsi drivers will choose to bypass
enable/disable HW state updates when executing in the vm environment.
Change-Id: Ica71c924d189ab65fe3be5b0ac870633e3b749e1
Signed-off-by: Jeykumar Sankaran <jsanka@codeaurora.org>
Signed-off-by: Veera Sundaram Sankaran <veeras@codeaurora.org>
